📄 loadm_c.c
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/****************************************/
/* Copyright (c) 2004, 通信工程学院戴佳 */
/* All rights reserved. */
/* 作 者：戴佳 */
/****************************************/
#include <other.h>
//为用户特有操作装载所有控制寄存器
void LoadM1_C()
{
//INTERNAL PROCESSOR(SPOT)
M1_005=0x00;
M1_006=0x00;
M1_007=0x00;
M1_008=0x00;
//CONTROL DESCRIPTIONS
M1_010=0xC0;//MOD1=MOD0=1,AAHZE=BAHZE=0,BLOCK=0,NPIA=NPIB=NPIC=0
M1_011=0xDD;//SBTEN=1,DRPBT=1(DROP MODE),ABD=0,LATEN=1,TAISE=1,RAISE=0,TCLKI=1(时钟上升沿发送E1）
//RCLKI=1(时钟下降沿接收E1)
M1_012=0x29;//IPOS=1,INEG=0,RFIE=1(使RFI产生中断）
M1_013=0x12;//HEAISE=0,DV1SEL=0,DV1REF=0,RDIEN=1,UQAE=1,TOBWZ=0
M1_055=0x02;
M1_085=0x02;
M1_0B5=0x02;
M1_0E5=0x02;
//PROVISIONING DESCRIPTIONS
M1_014=0x13;//UEAME=1,SE1AIS=0,!!!!!!! PTALTE=1,HDWIE=1
//DESYNCHRONIZER POINTER LEAK REGISTER
M1_049=0x59;
M1_079=0x59;
M1_0A9=0x59;
M1_0D9=0x59;
//TnSEL1,TnSEL0,RnSEL,ByPass
M1_04A=M1_04A|0x44;
M1_07A=M1_07A|0x44;
M1_0AA=M1_0AA|0x44;
M1_0DA=M1_0DA|0x44;
M1_04B=0xF0;
M1_07B=0xF0;
M1_0AB=0xF0;
M1_0DB=0xF0;
M1_0F1=M1_0F1|0x08; //V4EN=1
//1BnRDI=1---SINGLE BIT RDI;J2nTEN=1,J2nSIZE=0,J2nCOM=1,J2nAISE=1(Enable ALARM CREATED BY J2)
M1_048=0x1B;
M1_078=0x1B;
M1_0A8=0x1B;
M1_0D8=0x1B;
//A Drop Bus Port n MicroProcessor-written SIGNAL LABEL =0X02
M1_053=0x02;
M1_083=0x02;
M1_0B3=0x02;
M1_0E3=0x02;
//Transmit J2 赋值
M1_540=0xE0;
M1_541=0x57;
M1_542=0x47;
M1_543=0x20;
M1_544=0x4C;
M1_545=0x50;
M1_546=0x2D;
M1_547=0x54;
M1_548=0x52;
M1_549=0x41;
M1_54A=0x43;
M1_54B=0x45;
M1_54C=0x20;
M1_54D=0x20;
M1_54E=0x20;
M1_54F=0x20;
M1_5C0=0xE0;
M1_5C1=0x57;
M1_5C2=0x47;
M1_5C3=0x20;
M1_5C4=0x4C;
M1_5C5=0x50;
M1_5C6=0x2D;
M1_5C7=0x54;
M1_5C8=0x52;
M1_5C9=0x41;
M1_5CA=0x43;
M1_5CB=0x45;
M1_5CC=0x20;
M1_5CD=0x20;
M1_5CE=0x20;
M1_5CF=0x20;
M1_640=0xE0;
M1_641=0x57;
M1_642=0x47;
M1_643=0x20;
M1_644=0x4C;
M1_645=0x50;
M1_646=0x2D;
M1_647=0x54;
M1_648=0x52;
M1_649=0x41;
M1_64A=0x43;
M1_64B=0x45;
M1_64C=0x20;
M1_64D=0x20;
M1_64E=0x20;
M1_64F=0x20;
M1_6C0=0xE0;
M1_6C1=0x57;
M1_6C2=0x47;
M1_6C3=0x20;
M1_6C4=0x4C;
M1_6C5=0x50;
M1_6C6=0x2D;
M1_6C7=0x54;
M1_6C8=0x52;
M1_6C9=0x41;
M1_6CA=0x43;
M1_6CB=0x45;
M1_6CC=0x20;
M1_6CD=0x20;
M1_6CE=0x20;
M1_6CF=0x20;
//A side Microprocessor-Written Received J2 赋值
M1_150=0xE0;
M1_151=0x57;
M1_152=0x47;
M1_153=0x20;
M1_154=0x4C;
M1_155=0x50;
M1_156=0x2D;
M1_157=0x54;
M1_158=0x52;
M1_159=0x41;
M1_15A=0x43;
M1_15B=0x45;
M1_15C=0x20;
M1_15D=0x20;
M1_15E=0x20;
M1_15F=0x20;
M1_250=0xE0;
M1_251=0x57;
M1_252=0x47;
M1_253=0x20;
M1_254=0x4C;
M1_255=0x50;
M1_256=0x2D;
M1_257=0x54;
M1_258=0x52;
M1_259=0x41;
M1_25A=0x43;
M1_25B=0x45;
M1_25C=0x20;
M1_25D=0x20;
M1_25E=0x20;
M1_25F=0x20;
M1_350=0xE0;
M1_351=0x57;
M1_352=0x47;
M1_353=0x20;
M1_354=0x4C;
M1_355=0x50;
M1_356=0x2D;
M1_357=0x54;
M1_358=0x52;
M1_359=0x41;
M1_35A=0x43;
M1_35B=0x45;
M1_35C=0x20;
M1_35D=0x20;
M1_35E=0x20;
M1_35F=0x20;
M1_450=0xE0;
M1_451=0x57;
M1_452=0x47;
M1_453=0x20;
M1_454=0x4C;
M1_455=0x50;
M1_456=0x2D;
M1_457=0x54;
M1_458=0x52;
M1_459=0x41;
M1_45A=0x43;
M1_45B=0x45;
M1_45C=0x20;
M1_45D=0x20;
M1_45E=0x20;
M1_45F=0x20;
//TCnEN=0
M1_051=M1_051&0xEF;
M1_081=M1_081&0xEF;
M1_0B1=M1_0B1&0xEF;
M1_0E1=M1_0E1&0xEF;
// M1_051=M1_051|0x10;
M1_010=M1_010|0x10;//B ADD BUS HIGH IMPEDANCE
M1_011=M1_011|0x10 ; //LATEN=1
M1_04A=M1_04A|0x44;//T1SEL0=1;
M1_04A=M1_04A&0x5F; //T1SEL1=0,R1SEL=0; Single Undirectional Ring Mode
M1_07A=M1_07A|0x44;//T1SEL0=1;
M1_07A=M1_07A&0x5F; //T1SEL1=0,R1SEL=0; Single Undirectional Ring Mode
M1_0AA=M1_0AA|0x44;//T1SEL0=1;
M1_0AA=M1_0AA&0x5F; //T1SEL1=0,R1SEL=0; Single Undirectional Ring Mode
M1_0DA=M1_0DA|0x44;//T1SEL0=1;
M1_0DA=M1_0DA&0x5F; //T1SEL1=0,R1SEL=0; Single Undirectional Ring Mode
M1_04C=0x00;//RTUN1
M1_04D=0x00;//TTUN1
M1_04A=M1_04A&0xFD; //RnEN=0
M1_07C=0x00;//RTUN1
M1_07D=0x00;//TTUN1
M1_07A=M1_07A&0xFD; //RnEN=0
M1_0AC=0x00;
M1_0AD=0x00;
M1_0AA=M1_0AA&0xFD; //RnEN=0
M1_0DC=0x00;
M1_0DD=0x00;
M1_0DA=M1_0DA&0xFD; //RnEN=0
}
void LoadM2_C()
{
//INTERNAL PROCESSOR(SPOT)
M2_005=0x00;
M2_006=0x00;
M2_007=0x00;
M2_008=0x00;
//CONTROL DESCRIPTIONS
M2_010=0xC0;//MOD1=MOD0=1,AAHZE=BAHZE=0,BLOCK=0,NPIA=NPIB=NPIC=0
M2_011=0xDD;//SBTEN=1,DRPBT=1(DROP MODE),ABD=0,LATEN=1,TAISE=1,RAISE=0,TCLKI=1(时钟上升沿）,RCLKI=1(时钟下降沿)
M2_012=0x29;//IPOS=1,INEG=0,RFIE=1(使RFI产生中断）
M2_013=0x12;//HEAISE=0,DV1SEL=0,DV1REF=0,RDIEN=1,UQAE=1,TOBWZ=0
M2_055=0x02;
M2_085=0x02;
M2_0B5=0x02;
M2_0E5=0x02;
//PROVISIONING DESCRIPTIONS
M2_014=0x13;//UEAME=1,SE1AIS=0,!!!!!!! PTALTE=1,HDWIE=1
//DESYNCHRONIZER POINTER LEAK REGISTER
M2_049=0x59;
M2_079=0x59;
M2_0A9=0x59;
M2_0D9=0x59;
//TnSEL1,TnSEL0,RnSEL,ByPass
M2_04A=M2_04A|0x44;
M2_07A=M2_07A|0x44;
M2_0AA=M2_0AA|0x44;
M2_0DA=M2_0DA|0x44;
M2_04B=0xF0;
M2_07B=0xF0;
M2_0AB=0xF0;
M2_0DB=0xF0;
M2_0F1=M2_0F1|0x08; //V4EN=1
//1BnRDI=1---SINGLE BIT RDI;J2nTEN=1,J2nSIZE=0,J2nCOM=1,J2nAISE=1(Enable ALARM CREATED BY J2)
M2_048=0x1B;
M2_078=0x1B;
M2_0A8=0x1B;
M2_0D8=0x1B;
//A Drop Bus Port n MicroProcessor-written SIGNAL LABEL =0X02
M2_053=0x02;
M2_083=0x02;
M2_0B3=0x02;
M2_0E3=0x02;
//Transmit J2 赋值
M2_540=0xE0;
M2_541=0x57;
M2_542=0x47;
M2_543=0x20;
M2_544=0x4C;
M2_545=0x50;
M2_546=0x2D;
M2_547=0x54;
M2_548=0x52;
M2_549=0x41;
M2_54A=0x43;
M2_54B=0x45;
M2_54C=0x20;
M2_54D=0x20;
M2_54E=0x20;
M2_54F=0x20;
M2_5C0=0xE0;
M2_5C1=0x57;
M2_5C2=0x47;
M2_5C3=0x20;
M2_5C4=0x4C;
M2_5C5=0x50;
M2_5C6=0x2D;
M2_5C7=0x54;
M2_5C8=0x52;
M2_5C9=0x41;
M2_5CA=0x43;
M2_5CB=0x45;
M2_5CC=0x20;
M2_5CD=0x20;
M2_5CE=0x20;
M2_5CF=0x20;
M2_640=0xE0;
M2_641=0x57;
M2_642=0x47;
M2_643=0x20;
M2_644=0x4C;
M2_645=0x50;
M2_646=0x2D;
M2_647=0x54;
M2_648=0x52;
M2_649=0x41;
M2_64A=0x43;
M2_64B=0x45;
M2_64C=0x20;
M2_64D=0x20;
M2_64E=0x20;
M2_64F=0x20;
M2_6C0=0xE0;
M2_6C1=0x57;
M2_6C2=0x47;
M2_6C3=0x20;
M2_6C4=0x4C;
M2_6C5=0x50;
M2_6C6=0x2D;
M2_6C7=0x54;
M2_6C8=0x52;
M2_6C9=0x41;
M2_6CA=0x43;
M2_6CB=0x45;
M2_6CC=0x20;
M2_6CD=0x20;
M2_6CE=0x20;
M2_6CF=0x20;
//A side Microprocessor-Written Received J2 赋值
M2_150=0xE0;
M2_151=0x57;
M2_152=0x47;
M2_153=0x20;
M2_154=0x4C;
M2_155=0x50;
M2_156=0x2D;
M2_157=0x54;
M2_158=0x52;
M2_159=0x41;
M2_15A=0x43;
M2_15B=0x45;
M2_15C=0x20;
M2_15D=0x20;
M2_15E=0x20;
M2_15F=0x20;
M2_250=0xE0;
M2_251=0x57;
M2_252=0x47;
M2_253=0x20;
M2_254=0x4C;
M2_255=0x50;
M2_256=0x2D;
M2_257=0x54;
M2_258=0x52;
M2_259=0x41;
M2_25A=0x43;
M2_25B=0x45;
M2_25C=0x20;
M2_25D=0x20;
M2_25E=0x20;
M2_25F=0x20;
M2_350=0xE0;
M2_351=0x57;
M2_352=0x47;
M2_353=0x20;
M2_354=0x4C;
M2_355=0x50;
M2_356=0x2D;
M2_357=0x54;
M2_358=0x52;
M2_359=0x41;
M2_35A=0x43;
M2_35B=0x45;
M2_35C=0x20;
M2_35D=0x20;
M2_35E=0x20;
M2_35F=0x20;
M2_450=0xE0;
M2_451=0x57;
M2_452=0x47;
M2_453=0x20;
M2_454=0x4C;
M2_455=0x50;
M2_456=0x2D;
M2_457=0x54;
M2_458=0x52;
M2_459=0x41;
M2_45A=0x43;
M2_45B=0x45;
M2_45C=0x20;
M2_45D=0x20;
M2_45E=0x20;
M2_45F=0x20;
//TCnEN=0
M2_051=M2_051&0xEF;
M2_081=M2_081&0xEF;
M2_0B1=M2_0B1&0xEF;
M2_0E1=M2_0E1&0xEF;
// M2_051=M2_051|0x10;
M2_010=M2_010|0x10;//B ADD BUS HIGH IMPEDANCE
M2_011=M2_011|0x10 ; //LATEN=1
M2_04A=M2_04A|0x44;//T1SEL0=1;
M2_04A=M2_04A&0x5F; //T1SEL1=0,R1SEL=0; Single Undirectional Ring Mode
M2_07A=M2_07A|0x44;//T1SEL0=1;
M2_07A=M2_07A&0x5F; //T1SEL1=0,R1SEL=0; Single Undirectional Ring Mode
M2_0AA=M2_0AA|0x44;//T1SEL0=1;
M2_0AA=M2_0AA&0x5F; //T1SEL1=0,R1SEL=0; Single Undirectional Ring Mode
M2_0DA=M2_0DA|0x44;//T1SEL0=1;
M2_0DA=M2_0DA&0x5F; //T1SEL1=0,R1SEL=0; Single Undirectional Ring Mode
M2_04C=0x00;//RTUN1
M2_04D=0x00;//TTUN1
M2_04A=M2_04A&0xFD; //RnEN=0
M2_07C=0x00;//RTUN1
M2_07D=0x00;//TTUN1
M2_07A=M2_07A&0xFD; //RnEN=0
M2_0AC=0x00;
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