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📄 genace.tcl

📁 基于EDK的多通道MGT测试程序
💻 TCL
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###############################################################################
##
## Copyright (c) 1995-2002 Xilinx, Inc.  All rights reserved.
##
## genace.tcl
## Generate SystemACE configuration file from FPGA bitstream 
## and PowerPC ELF program
## 
###############################################################################

# Quick Start:
#
# USAGE: 
# Copy this file into your project directory and run :
#  xmd genace.tcl [-jprog] [-hw <Bitstream>] [-elf <Executable>] [-board <ml300|memec>] -ace <ACE file> 
#
# Note: 
# This script has been tested for ML300 V2P4/7 and Memec V2P4/7 boards. 
# For other boards, the options that may have to be modified below are :
# "xmd_powerpc_options", "jtag_v2p_position" and "jtag_devices" 


set usage "USAGE:\nxmd genace.tcl \[-jprog\] \[-hw <bitstream>\] \[-elf {ELF files}\]  \[-board <target board>\] -ace <output ACE file>"

# Setting some default options

set param(board) "atca"
set param(hw) ""
set param(sw) [list]
set param(ace) ""
set param(jprog) "false"

# Setting some board specific options
set ml300(xmd_powerpc_options) "-configdevice devicenr 1 idcode 0x123e093 irLength 10 partname xc2vp7 -debugdevice devicenr 1 cpunr 1"
set ml300(jtag_v2p_position) 1
set ml300(jtag_devices) "xc2vp7"

set memec(xmd_powerpc_options) "-configdevice devicenr 1 irlength 8 partname xc18v04 -configdevice devicenr 2 irlength 8 partname xc18v04 -configdevice devicenr 3 idcode 0x123E093 irLength 10 partname xc2vp4 -debugdevice devicenr 3 cpunr 1"
set memec(jtag_v2p_position) 3
set memec(jtag_devices) "xc18v04 xc18v04 xc2vp4"

set atca50(xmd_powerpc_options) "-configdevice devicenr 1 idcode 0x1129e093 irLength 14 partname xc2vp50 -debugdevice devicenr 1 cpunr 1"
set atca50(jtag_v2p_position) 1
set atca50(jtag_devices) "xc2vp50"

set atca70(xmd_powerpc_options) "-configdevice devicenr 1 idcode 0x12ba093 irLength 14 partname xc2vp70 -debugdevice devicenr 1 cpunr 1"
set atca70(jtag_v2p_position) 1
set atca70(jtag_devices) "xc2vp70"


#
#
# Detailed description of the genace.tcl script :
#
#
# This script works in xmd (EDK3.2 or later) and generates a SystemACE file
# from a bitstream and one or more PowerPC software (ELF) program.
#
# The main steps in generating the SystemACE file are :
#   1. Converting a V2Pro bitstream into an SVF file using iMPACT
#         The SVF file contains the sequence of JTAG instructions 
#         used to configure the FPGA and bring it up. (Done pin going high)
#      NOTE: 
#         In order to create a valid SVF file, the JTAG chain of the 
#         board has to be specified correctly in the "jtag_v2p_position",
#         and "jtag_devices" options at the beginning of this script.
# 
#   2. Converting PowerPC executables into SVF files using XMD
#         This SVF file contains the JTAG sequence used by XMD to
#         download the ELF executable to internal/external memory
#         through the JTAG debug port of the PowerPC on the Virtex2Pro.
#      NOTE: 
#         (i) This step assumes that the FPGA was configured with a 
#         bitstream containing a PowerPC hardware system in which the 
#         the JTAG debug port has been connected to the FPGA JTAG pins 
#         using the JTAGPPC.
#         (ii) In order to create a valid SVF file, 
#         the position of the PowerPC in the V2Pro and the JTAG chain of 
#         the board has to be specified correctly in the 
#         "xmd_powerpc_options" at the beginning of this script. Refer the 
#         XMD documentation for more information about these options.
#             NOTE on NOTE: 
#                These options could be used to create ACE files that would 
#                directly write to PPC I/DCaches, etc
#   3. Concatenating the two SVF files from step 1 and 2
#   4. Generating a SystemACE file from the combined SVF file using iMPACT
#
# IMPORTANT NOTE: 
#   The JTAG chain options for step 1 and 2 have to be specified based on 
#   the relative position of each device in the JTAG chain from 
#   the SystemACE controller.
#


#######################################################################
#  Procedures to convert bit->svf, elf->svf and svf->ave
#######################################################################

proc impact_bit2svf { bitfile jtag_v2p_position jtag_devices } {

    set svffile "[file rootname $bitfile]_hw.svf"
    set script [open "bit2svf.scr" "w"]
    puts $script "setmode -bs"
    puts $script "setCable -p svf -file $svffile"
    
    set devicePos 0
    foreach device $jtag_devices {
	incr devicePos 
	if { $devicePos != $jtag_v2p_position } {
	    puts $script "addDevice -p $devicePos -part $device"
	}
    }
    puts $script "addDevice -p $jtag_v2p_position -file $bitfile"
    puts $script "program -p $jtag_v2p_position"
    puts $script "quit"
    close $script

    puts "\n############################################################"
    puts "Converting Bitstream '$bitfile' to SVF file '$svffile'"
    puts "Executing 'impact -batch bit2svf.scr'"
    if { [catch {exec impact -batch bit2svf.scr} msg] } {
	if { ![string match "*Programmed successfully.*" $msg] } {
	    puts $msg
	    error "ERROR in SVF file generation"
	}
    }
    return
}

proc xmd_elf2svf { elffile xmd_powerpc_options } {
    set svffile "[file rootname $elffile]_elf.svf"
    puts "\n############################################################"
    puts "Converting PowerPC ELF file '$elffile' to SVF file '$svffile'"

    set tgt 0
    set a "xconnect ppc_hw -cable type xilinx_svffile fname $svffile $xmd_powerpc_options"
    if { [catch {set tgt [eval $a]} retval] } {
	puts "$retval"
	error "ERROR: Unable to create SVF file '$svffile' for ELF file : $elffile"
    }
    xreset $tgt
    xdownload $tgt $elffile
#   The following continue should be done in the end
#    xcontinue $tgt -quit 
    xdisconnect $tgt
    return
}

proc write_swsuffix { elffile xmd_powerpc_options } {
    set svffile "[file rootname $elffile].svf"
    puts "\n############################################################"
    puts "Writing PowerPC JTAG \"continue\" command to SVF file '$svffile'"

    set tgt 0
    set a "xconnect ppc_hw -cable type xilinx_svffile fname $svffile $xmd_powerpc_options"
    if { [catch {set tgt [eval $a]} retval] } {
	puts "$retval"
	error "ERROR: Unable to create SVF file '$svffile' for ELF file : $elffile"
    }
    xcontinue $tgt -quit 
    xdisconnect $tgt
    return
}

proc impact_svf2ace { acefile } {
    set svffile "[file rootname $acefile].svf"
    set script [open "svf2ace.scr" "w"]
    puts $script "svf2ace -wtck -d -m 16776192 -i $svffile -o $acefile"
    puts $script quit
    close $script
    
    puts "\n############################################################"
    puts "Converting SVF file '$svffile' to SystemACE file '$acefile'"    
    puts "Executing 'impact -batch svf2ace.scr'"
    catch {exec impact -batch svf2ace.scr}
    return
}

proc write_swprefix { svffile } {
    puts $svffile "
//======================================================= 
// proghdr.svf 
// 
STATE RESET IDLE; 
RUNTEST 1000000 TCK; 
HIR 0 ; 
HDR 0 ; 
TIR 0 ; 
TDR 0 ; 
// start ELF downloading here 
//======================================================="
    return
}

proc write_hwprefix { svffile use_jprog } {
    puts $svffile "
//======================================================= 
// Initial JTAG Reset
// 
HIR 0 ; 
TIR 0 ; 
TDR 0 ; 
HDR 0 ; 
STATE RESET IDLE; 
//======================================================="

    if { $use_jprog == "true" } {
	puts $svffile "
// For runtime reconfiguration, using 'jprog_b' instruction
// Loading device with 'jprog_b' instruction. 
SIR 14 TDI (3cb) SMASK (3ff) ; 
RUNTEST 1000 TCK ; 
// end of jprog_b 
// NOTE - The following delay will have to be modified in genace.tcl 
//        for non-ML300, non-xc2vp7 devices
// Send into bypass and idle until program latency is over 
//   4 us per frame.  XC2VP7 is 1320 frames = 5280 us 
//   @maximum TCK freq 33 MHz = 174240 cycles 
// The number of frames is found in the Virtex-II Pro Users Guide
// For the XC2VP50: 2628 frames = 10512 us 
//   @maximum TCK freq 33 MHz = 346896 cycles
// For the XC2VP70: 3064 frames = 12256 us 
//   @maximum TCK freq 33 MHz = 404448 cycles
SIR 14 TDI (3ff) SMASK (3ff) ; 
RUNTEST 500000 TCK ; 
//======================================================="
    }
    return
}


proc write_prefix { svffile argv } {
    puts $svffile "
//======================================================= 
//======================================================= 
//  SVF file automatically created using XMD + genace.tcl
//  Commandline : xmd genace.tcl $argv
//  Date/Time : [clock format [clock seconds]]
//======================================================= 
//======================================================= 
"
    return
}
#######################################################################
#  Procedure to generate the ACE file from .bit and .elf
#######################################################################

proc genace { } {
    global param ml300 memec atca50 atca70
    global argv

    set acefile $param(ace)
    set final_svf [open "[file rootname $acefile].svf" "w"]

    write_prefix $final_svf $argv

    set board $param(board)
    set xmd_powerpc_options [lindex [array get $board "xmd_powerpc_options"] 1]
    set jtag_devices [lindex [array get $board "jtag_devices"] 1]
    set jtag_v2p_position [lindex [array get $board "jtag_v2p_position"] 1]

    set bitfile $param(hw)
    if { $bitfile != "" } {
	if { ![file readable $bitfile] } {
	    error "ERROR: Unable to open Bitstream file : $bitfile"
	}

	write_hwprefix $final_svf $param(jprog)
	impact_bit2svf $bitfile $jtag_v2p_position $jtag_devices
	set bitsvf [open "[file rootname $bitfile]_hw.svf" "r"]
	fcopy $bitsvf $final_svf
	close $bitsvf
    }
    
    set elf_files $param(sw)
    if { [llength $elf_files] > 0 } {
	write_swprefix $final_svf
	foreach elf $elf_files { 
	    if { ![file readable $elf] } {
		error "ERROR: Unable to open PowerPC executable file : $elf"
	    }

	    xmd_elf2svf $elf $xmd_powerpc_options
	    set elfsvf [open "[file rootname $elf]_elf.svf" "r"]
	    puts $final_svf "\n// Starting Download of ELF file : $elf\n"
	    fcopy $elfsvf $final_svf
	    close $elfsvf
	}
	write_swsuffix "sw_suffix.elf" $xmd_powerpc_options
	set suffixsvf [open "sw_suffix.svf" "r"]
	puts $final_svf "\n// Issuing Run command to PowerPC to start execution\n"
	fcopy $suffixsvf $final_svf
	close $suffixsvf
    }

    close $final_svf
    impact_svf2ace $acefile
    
    puts "\nSystemACE file '$acefile' created successfully"
    return
}

#######################################################################
# Proc to parse genace commandline options
#######################################################################


proc parse_genace_options {optc optv} {
    global param
    
    for {set i 0} { $i < $optc } { incr i } {
	set arg [lindex $optv $i]
	switch -- $arg {
	    -jprog { 
		set param(jprog) "true"
	    }
	    -hw  {
		incr i
		set param(hw) [lindex $optv $i]
	    }
	    -elf {
		incr i
		set next_option_index [lsearch [lrange $optv $i end] "-*"]
		if {$next_option_index == -1 } {
		    set next_option_index $optc
		} else {
		    incr next_option_index $i
		}
		while {$i < $next_option_index} {
		    set param(sw) [concat $param(sw) [lindex $optv $i]]
		    incr i
		}
		# go back one arg as outer loop would "incr i" too
		incr i -1 
	    }
	    -board {
		incr i
		set param(board) [lindex $optv $i]
	    }
	    -ace {
		incr i
		set param(ace) [lindex $optv $i]
	    }
	    default {
		error "Unknown option $arg"
	    }
	}
    }
    return
}

if { [catch {parse_genace_options $argc $argv} err] } {
    puts "Commandline Error: $err"
    puts $usage
    return
}

# Check if either -elf or -hw options are specified 
if { [llength $param(sw)] == 0 && $param(hw) == "" } {
    puts "ERROR : Either a hw bitstream or sw ELF files should be provided to generate the ACE file"
    puts $usage
    return
}

# Check if -ace option has beeb specified
if { $param(ace) == "" } {
    puts "ERROR : An output ACE file should be specified using the -ace option"
    puts $usage
    return
}

puts "user sw is $param(sw)"
puts "user hw is $param(hw)"
puts "user ace is $param(ace)"
puts "jprog is $param(jprog)"
puts "board is $param(board)"


if { [catch {genace} err] } {
    puts "Error: $err"
    puts $errorInfo
    return
}


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