armexio_syn_hier_info

来自「usoc在北京博创兴业有限公司的实验平台s3c2410上运行。 2. 各实验的全」· 代码 · 共 408 行 · 第 1/2 页

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address[0] => un1_iop1_6_0_i_0_1_~0.DATAC
address[0] => un1_iop1_6_0_i_0_and2_1_2_.DATAB
address[0] => un1_iop1_6_0_i_0_2_~0.DATAC
address[0] => un1_iop1_6_0_i_0_and2_1_3_.DATAB
address[0] => un1_iop1_6_0_i_0_3_~0.DATAC
address[0] => un1_iop1_6_0_i_0_and2_1_4_.DATAB
address[0] => un1_iop1_6_0_i_0_4_~0.DATAC
address[0] => un1_iop1_6_0_i_0_and2_1_5_.DATAB
address[0] => un1_iop1_6_0_i_0_5_~0.DATAC
address[0] => un1_iop1_6_0_i_0_and2_1_6_.DATAB
address[0] => un1_iop1_6_0_i_0_6_~0.DATAC
address[0] => un1_iop1_6_0_i_0_and2_1_7_.DATAB
address[0] => un1_iop1_6_0_i_0_7_~0.DATAC
address[0] => un1_iop1_6_0_0_0_and2_1_i_8_.DATAB
address[0] => un1_iop1_6_0_0_0_8_571~0.DATAB
address[0] => un1_iop1_6_0_i_0_1_539_cand~9.DATAC
address[0] => un1_iop1_6_0_i_0_2_554_cand~9.DATAC
address[0] => un1_iop1_6_0_i_0_3_549_cand~9.DATAC
address[0] => un1_iop1_6_0_i_0_4_524_cand~9.DATAC
address[0] => un1_iop1_6_0_i_0_5_519_cand~9.DATAC
address[0] => un1_iop1_6_0_i_0_6_534_cand~9.DATAC
address[0] => un1_iop1_6_0_i_0_7_529_cand~9.DATAC
address[0] => un1_iop1_6_0_i_0_and2_2_i_1_.DATAB
address[0] => un1_iop1_6_0_i_0_1_536_cand~9.DATAB
address[0] => un1_iop1_6_0_i_0_and2_2_i_2_.DATAB
address[0] => un1_iop1_6_0_i_0_2_551_cand~9.DATAB
address[0] => un1_iop1_6_0_i_0_and2_2_i_3_.DATAB
address[0] => un1_iop1_6_0_i_0_3_546_cand~9.DATAB
address[0] => un1_iop1_6_0_i_0_and2_2_i_4_.DATAB
address[0] => un1_iop1_6_0_i_0_4_521_cand~9.DATAB
address[0] => un1_iop1_6_0_i_0_and2_2_i_5_.DATAB
address[0] => un1_iop1_6_0_i_0_5_516_cand~9.DATAB
address[0] => un1_iop1_6_0_i_0_and2_2_i_6_.DATAB
address[0] => un1_iop1_6_0_i_0_6_531_cand~9.DATAB
address[0] => un1_iop1_6_0_i_0_and2_2_i_7_.DATAB
address[0] => un1_iop1_6_0_i_0_7_526_cand~9.DATAB
address[0] => G_368~1.DATAD
address[0] => G_356~1.DATAD
address[4] => G_352.DATAB
address[4] => un1_wr_6_0_and2_0_and2_508~0.DATAC
address[4] => G_356~1.DATAB
address[3] => G_352.DATAC
address[3] => un1_wr_6_0_and2_0_and2_508~0.DATAD
address[3] => G_356~1.DATAC
mclk => led_aaaa_0_.CLK
mclk => led_aaaa_1_.CLK
mclk => led_aaaa_2_.CLK
mclk => led_cnt1_0_.CLK
mclk => led_cnt1_1_.CLK
mclk => led_cnt3_18_.CLK
mclk => led_cnt3_17_.CLK
mclk => led_cnt3_19_.CLK
mclk => led_cnt3_16_.CLK
mclk => led_cnt3_15_.CLK
mclk => led_cnt3_11_.CLK
mclk => led_cnt3_10_.CLK
mclk => led_cnt3_13_.CLK
mclk => led_cnt3_12_.CLK
mclk => led_cnt3_9_.CLK
mclk => led_cnt3_6_.CLK
mclk => led_cnt3_8_.CLK
mclk => led_cnt3_7_.CLK
mclk => led_cnt3_14_.CLK
mclk => led_cnt2_6_.CLK
mclk => led_cnt2_7_.CLK
mclk => led_cnt2_4_.CLK
mclk => led_cnt2_5_.CLK
mclk => led_cnt3_4_.CLK
mclk => led_cnt3_5_.CLK
mclk => led_cnt2_2_.CLK
mclk => led_cnt2_3_.CLK
mclk => led_cnt3_2_.CLK
mclk => led_cnt3_3_.CLK
mclk => led_cnt2_0_.CLK
mclk => led_cnt2_1_.CLK
mclk => led_cnt3_0_.CLK
mclk => led_cnt3_1_.CLK
rd => un1_un30_rd_0_and2_0_15_.DATAC
address[5] => G_350_504.DATAA
address[9] => G_350_504.DATAB
address[8] => G_350_504.DATAC
address[7] => G_350_504.DATAD
address[6] => G_350.DATAB
data[0] <= un1_iop1_6_0_i_0_0_
data[1] <= un1_iop1_6_0_i_0_1_~0
data[2] <= un1_iop1_6_0_i_0_2_~0
data[3] <= un1_iop1_6_0_i_0_3_~0
data[4] <= un1_iop1_6_0_i_0_4_~0
data[5] <= un1_iop1_6_0_i_0_5_~0
data[6] <= un1_iop1_6_0_i_0_6_~0
data[7] <= un1_iop1_6_0_i_0_7_~0
data[8] <= un1_iop1_6_0_0_0_8_
data[9] <= un1_iop1_6_0_0_0_9_
data[10] <= un1_iop1_iv_0_0_10_
data[11] <= un1_iop1_iv_0_0_11_
data[12] <= un1_iop1_iv_0_0_12_
data[13] <= un1_iop1_iv_0_0_13_
data[14] <= un1_iop1_iv_0_0_14_
data[15] <= un1_iop1_iv_0_0_15_
IOP1[0] <= lpm_latch:iop1_0_|q[0]~1
IOP1[1] <= lpm_latch:iop1_1_|q[0]~1
IOP1[2] <= lpm_latch:iop1_2_|q[0]~1
IOP1[3] <= lpm_latch:iop1_3_|q[0]~1
IOP1[4] <= lpm_latch:iop1_4_|q[0]~1
IOP1[5] <= lpm_latch:iop1_5_|q[0]~1
IOP1[6] <= lpm_latch:iop1_6_|q[0]~1
IOP1[7] <= lpm_latch:iop1_7_|q[0]~1
IOP1[8] <= lpm_latch:iop1_8_|q[0]~1
IOP1[9] <= lpm_latch:iop1_9_|q[0]~1
IOP1[10] <= lpm_latch:iop1_10_|q[0]~1
IOP1[11] <= lpm_latch:iop1_11_|q[0]~1
IOP1[12] <= lpm_latch:iop1_12_|q[0]~1
IOP1[13] <= lpm_latch:iop1_13_|q[0]~1
IOP1[14] <= lpm_latch:iop1_14_|q[0]~1
IOP1[15] <= lpm_latch:iop1_15_|q[0]~1
IOP1[16] <= lpm_latch:iop1_16_|q[0]~1
IOP1[17] <= lpm_latch:iop1_17_|q[0]~1
IOP1[18] <= lpm_latch:iop1_18_|q[0]~1
IOP1[19] <= lpm_latch:iop1_19_|q[0]~1
IOP1[20] <= lpm_latch:iop1_20_|q[0]~1
IOP1[21] <= lpm_latch:iop1_21_|q[0]~1
IOP1[22] <= lpm_latch:iop1_22_|q[0]~1
IOP1[23] <= lpm_latch:iop1_23_|q[0]~1
IOP1[24] <= lpm_latch:iop1_24_|q[0]~1
IOP1[25] <= lpm_latch:iop1_25_|q[0]~1
IOP1[26] <= lpm_latch:iop1_26_|q[0]~1
IOP1[27] <= lpm_latch:iop1_27_|q[0]~1
IOP1[28] <= lpm_latch:iop1_28_|q[0]~1
IOP1[29] <= lpm_latch:iop1_29_|q[0]~1
IOP1[30] <= lpm_latch:iop1_30_|q[0]~1
IOP1[31] <= lpm_latch:iop1_31_|q[0]~1
IOP1[32] <= GND
IOP1[33] <= GND
IOP1[34] <= GND
IOP1[35] <= GND
IOP1[36] <= GND
IOP2[0] <= lpm_latch:iop2_0_|q[0]~1
IOP2[1] <= lpm_latch:iop2_1_|q[0]~1
IOP2[2] <= lpm_latch:iop2_2_|q[0]~1
IOP2[3] <= lpm_latch:iop2_3_|q[0]~1
IOP2[4] <= lpm_latch:iop2_4_|q[0]~1
IOP2[5] <= lpm_latch:iop2_5_|q[0]~1
IOP2[6] <= lpm_latch:iop2_6_|q[0]~1
IOP2[7] <= lpm_latch:iop2_7_|q[0]~1
IOP2[8] <= lpm_latch:iop2_8_|q[0]~1
IOP2[9] <= lpm_latch:iop2_9_|q[0]~1
IOP2[10] <= lpm_latch:iop2_10_|q[0]~1
IOP2[11] <= lpm_latch:iop2_11_|q[0]~1
IOP2[12] <= lpm_latch:iop2_12_|q[0]~1
IOP2[13] <= lpm_latch:iop2_13_|q[0]~1
IOP2[14] <= lpm_latch:iop2_14_|q[0]~1
IOP2[15] <= lpm_latch:iop2_15_|q[0]~1
IOP2[16] <= lpm_latch:iop2_16_|q[0]~1
IOP2[17] <= lpm_latch:iop2_17_|q[0]~1
IOP2[18] <= lpm_latch:iop2_18_|q[0]~1
IOP2[19] <= lpm_latch:iop2_19_|q[0]~1
IOP2[20] <= lpm_latch:iop2_20_|q[0]~1
IOP2[21] <= lpm_latch:iop2_21_|q[0]~1
IOP2[22] <= lpm_latch:iop2_22_|q[0]~1
IOP2[23] <= lpm_latch:iop2_23_|q[0]~1
IOP2[24] <= lpm_latch:iop2_24_|q[0]~1
IOP2[25] <= lpm_latch:iop2_25_|q[0]~1
IOP2[26] <= lpm_latch:iop2_26_|q[0]~1
IOP2[27] <= lpm_latch:iop2_27_|q[0]~1
IOP2[28] <= lpm_latch:iop2_28_|q[0]~1
IOP2[29] <= lpm_latch:iop2_29_|q[0]~1
IOP2[30] <= lpm_latch:iop2_30_|q[0]~1
IOP2[31] <= lpm_latch:iop2_31_|q[0]~1
IOP2[32] <= GND
IOP2[33] <= GND
IOP2[34] <= GND
IOP2[35] <= GND
IOP2[36] <= GND
IOP3[0] <= lpm_latch:iop3_0_|q[0]~1
IOP3[1] <= lpm_latch:iop3_1_|q[0]~1
IOP3[2] <= lpm_latch:iop3_2_|q[0]~1
IOP3[3] <= lpm_latch:iop3_3_|q[0]~1
IOP3[4] <= lpm_latch:iop3_4_|q[0]~1
IOP3[5] <= lpm_latch:iop3_5_|q[0]~1
IOP3[6] <= lpm_latch:iop3_6_|q[0]~1
IOP3[7] <= lpm_latch:iop3_7_|q[0]~1
IOP3[8] <= lpm_latch:iop3_8_|q[0]~1
IOP3[9] <= lpm_latch:iop3_9_|q[0]~1
IOP3[10] <= lpm_latch:iop3_10_|q[0]~1
IOP3[11] <= lpm_latch:iop3_11_|q[0]~1
IOP3[12] <= lpm_latch:iop3_12_|q[0]~1
IOP3[13] <= lpm_latch:iop3_13_|q[0]~1
IOP3[14] <= lpm_latch:iop3_14_|q[0]~1
IOP3[15] <= lpm_latch:iop3_15_|q[0]~1
IOP3[16] <= lpm_latch:iop3_16_|q[0]~1
IOP3[17] <= lpm_latch:iop3_17_|q[0]~1
IOP3[18] <= lpm_latch:iop3_18_|q[0]~1
IOP3[19] <= lpm_latch:iop3_19_|q[0]~1
IOP3[20] <= lpm_latch:iop3_20_|q[0]~1
IOP3[21] <= lpm_latch:iop3_21_|q[0]~1
IOP3[22] <= lpm_latch:iop3_22_|q[0]~1
IOP3[23] <= lpm_latch:iop3_23_|q[0]~1
IOP3[24] <= lpm_latch:iop3_24_|q[0]~1
IOP3[25] <= lpm_latch:iop3_25_|q[0]~1
led[0] <= led_aaaa_0_
led[1] <= led_aaaa_1_
led[2] <= led_aaaa_2_

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