armexio_hier_info

来自「usoc在北京博创兴业有限公司的实验平台s3c2410上运行。 2. 各实验的全」· 代码 · 共 1,605 行 · 第 1/3 页

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1,605 行
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aclr => prn[0].IN0
aset => altr_temp~1.IN0
aset => altr_temp~2.IN0
q[0] <= q[0]~0.DB_MAX_OUTPUT_PORT_TYPE


|armExIO|LPM_LATCH:iop2_8_
data[0] => clrn[0]~1.IN1
data[0] => altr_temp~4.IN0
gate => altr_temp~0.IN0
gate => altr_temp~3.IN0
aclr => clrn[0]~0.IN0
aclr => prn[0].IN0
aset => altr_temp~1.IN0
aset => altr_temp~2.IN0
q[0] <= q[0]~0.DB_MAX_OUTPUT_PORT_TYPE


|armExIO|LPM_LATCH:iop2_9_
data[0] => clrn[0]~1.IN1
data[0] => altr_temp~4.IN0
gate => altr_temp~0.IN0
gate => altr_temp~3.IN0
aclr => clrn[0]~0.IN0
aclr => prn[0].IN0
aset => altr_temp~1.IN0
aset => altr_temp~2.IN0
q[0] <= q[0]~0.DB_MAX_OUTPUT_PORT_TYPE


|armExIO|LPM_LATCH:iop3_0_
data[0] => clrn[0]~1.IN1
data[0] => altr_temp~4.IN0
gate => altr_temp~0.IN0
gate => altr_temp~3.IN0
aclr => clrn[0]~0.IN0
aclr => prn[0].IN0
aset => altr_temp~1.IN0
aset => altr_temp~2.IN0
q[0] <= q[0]~0.DB_MAX_OUTPUT_PORT_TYPE


|armExIO|LPM_LATCH:iop3_1_
data[0] => clrn[0]~1.IN1
data[0] => altr_temp~4.IN0
gate => altr_temp~0.IN0
gate => altr_temp~3.IN0
aclr => clrn[0]~0.IN0
aclr => prn[0].IN0
aset => altr_temp~1.IN0
aset => altr_temp~2.IN0
q[0] <= q[0]~0.DB_MAX_OUTPUT_PORT_TYPE


|armExIO|LPM_LATCH:iop3_10_
data[0] => clrn[0]~1.IN1
data[0] => altr_temp~4.IN0
gate => altr_temp~0.IN0
gate => altr_temp~3.IN0
aclr => clrn[0]~0.IN0
aclr => prn[0].IN0
aset => altr_temp~1.IN0
aset => altr_temp~2.IN0
q[0] <= q[0]~0.DB_MAX_OUTPUT_PORT_TYPE


|armExIO|LPM_LATCH:iop3_11_
data[0] => clrn[0]~1.IN1
data[0] => altr_temp~4.IN0
gate => altr_temp~0.IN0
gate => altr_temp~3.IN0
aclr => clrn[0]~0.IN0
aclr => prn[0].IN0
aset => altr_temp~1.IN0
aset => altr_temp~2.IN0
q[0] <= q[0]~0.DB_MAX_OUTPUT_PORT_TYPE


|armExIO|LPM_LATCH:iop3_12_
data[0] => clrn[0]~1.IN1
data[0] => altr_temp~4.IN0
gate => altr_temp~0.IN0
gate => altr_temp~3.IN0
aclr => clrn[0]~0.IN0
aclr => prn[0].IN0
aset => altr_temp~1.IN0
aset => altr_temp~2.IN0
q[0] <= q[0]~0.DB_MAX_OUTPUT_PORT_TYPE


|armExIO|LPM_LATCH:iop3_13_
data[0] => clrn[0]~1.IN1
data[0] => altr_temp~4.IN0
gate => altr_temp~0.IN0
gate => altr_temp~3.IN0
aclr => clrn[0]~0.IN0
aclr => prn[0].IN0
aset => altr_temp~1.IN0
aset => altr_temp~2.IN0
q[0] <= q[0]~0.DB_MAX_OUTPUT_PORT_TYPE


|armExIO|LPM_LATCH:iop3_14_
data[0] => clrn[0]~1.IN1
data[0] => altr_temp~4.IN0
gate => altr_temp~0.IN0
gate => altr_temp~3.IN0
aclr => clrn[0]~0.IN0
aclr => prn[0].IN0
aset => altr_temp~1.IN0
aset => altr_temp~2.IN0
q[0] <= q[0]~0.DB_MAX_OUTPUT_PORT_TYPE


|armExIO|LPM_LATCH:iop3_15_
data[0] => clrn[0]~1.IN1
data[0] => altr_temp~4.IN0
gate => altr_temp~0.IN0
gate => altr_temp~3.IN0
aclr => clrn[0]~0.IN0
aclr => prn[0].IN0
aset => altr_temp~1.IN0
aset => altr_temp~2.IN0
q[0] <= q[0]~0.DB_MAX_OUTPUT_PORT_TYPE


|armExIO|LPM_LATCH:iop3_16_
data[0] => clrn[0]~1.IN1
data[0] => altr_temp~4.IN0
gate => altr_temp~0.IN0
gate => altr_temp~3.IN0
aclr => clrn[0]~0.IN0
aclr => prn[0].IN0
aset => altr_temp~1.IN0
aset => altr_temp~2.IN0
q[0] <= q[0]~0.DB_MAX_OUTPUT_PORT_TYPE


|armExIO|LPM_LATCH:iop3_17_
data[0] => clrn[0]~1.IN1
data[0] => altr_temp~4.IN0
gate => altr_temp~0.IN0
gate => altr_temp~3.IN0
aclr => clrn[0]~0.IN0
aclr => prn[0].IN0
aset => altr_temp~1.IN0
aset => altr_temp~2.IN0
q[0] <= q[0]~0.DB_MAX_OUTPUT_PORT_TYPE


|armExIO|LPM_LATCH:iop3_18_
data[0] => clrn[0]~1.IN1
data[0] => altr_temp~4.IN0
gate => altr_temp~0.IN0
gate => altr_temp~3.IN0
aclr => clrn[0]~0.IN0
aclr => prn[0].IN0
aset => altr_temp~1.IN0
aset => altr_temp~2.IN0
q[0] <= q[0]~0.DB_MAX_OUTPUT_PORT_TYPE


|armExIO|LPM_LATCH:iop3_19_
data[0] => clrn[0]~1.IN1
data[0] => altr_temp~4.IN0
gate => altr_temp~0.IN0
gate => altr_temp~3.IN0
aclr => clrn[0]~0.IN0
aclr => prn[0].IN0
aset => altr_temp~1.IN0
aset => altr_temp~2.IN0
q[0] <= q[0]~0.DB_MAX_OUTPUT_PORT_TYPE


|armExIO|LPM_LATCH:iop3_2_
data[0] => clrn[0]~1.IN1
data[0] => altr_temp~4.IN0
gate => altr_temp~0.IN0
gate => altr_temp~3.IN0
aclr => clrn[0]~0.IN0
aclr => prn[0].IN0
aset => altr_temp~1.IN0
aset => altr_temp~2.IN0
q[0] <= q[0]~0.DB_MAX_OUTPUT_PORT_TYPE


|armExIO|LPM_LATCH:iop3_20_
data[0] => clrn[0]~1.IN1
data[0] => altr_temp~4.IN0
gate => altr_temp~0.IN0
gate => altr_temp~3.IN0
aclr => clrn[0]~0.IN0
aclr => prn[0].IN0
aset => altr_temp~1.IN0
aset => altr_temp~2.IN0
q[0] <= q[0]~0.DB_MAX_OUTPUT_PORT_TYPE


|armExIO|LPM_LATCH:iop3_21_
data[0] => clrn[0]~1.IN1
data[0] => altr_temp~4.IN0
gate => altr_temp~0.IN0
gate => altr_temp~3.IN0
aclr => clrn[0]~0.IN0
aclr => prn[0].IN0
aset => altr_temp~1.IN0
aset => altr_temp~2.IN0
q[0] <= q[0]~0.DB_MAX_OUTPUT_PORT_TYPE


|armExIO|LPM_LATCH:iop3_22_
data[0] => clrn[0]~1.IN1
data[0] => altr_temp~4.IN0
gate => altr_temp~0.IN0
gate => altr_temp~3.IN0
aclr => clrn[0]~0.IN0
aclr => prn[0].IN0
aset => altr_temp~1.IN0
aset => altr_temp~2.IN0
q[0] <= q[0]~0.DB_MAX_OUTPUT_PORT_TYPE


|armExIO|LPM_LATCH:iop3_23_
data[0] => clrn[0]~1.IN1
data[0] => altr_temp~4.IN0
gate => altr_temp~0.IN0
gate => altr_temp~3.IN0
aclr => clrn[0]~0.IN0
aclr => prn[0].IN0
aset => altr_temp~1.IN0
aset => altr_temp~2.IN0
q[0] <= q[0]~0.DB_MAX_OUTPUT_PORT_TYPE


|armExIO|LPM_LATCH:iop3_24_
data[0] => clrn[0]~1.IN1
data[0] => altr_temp~4.IN0
gate => altr_temp~0.IN0
gate => altr_temp~3.IN0
aclr => clrn[0]~0.IN0
aclr => prn[0].IN0
aset => altr_temp~1.IN0
aset => altr_temp~2.IN0
q[0] <= q[0]~0.DB_MAX_OUTPUT_PORT_TYPE


|armExIO|LPM_LATCH:iop3_25_
data[0] => clrn[0]~1.IN1
data[0] => altr_temp~4.IN0
gate => altr_temp~0.IN0
gate => altr_temp~3.IN0
aclr => clrn[0]~0.IN0
aclr => prn[0].IN0
aset => altr_temp~1.IN0
aset => altr_temp~2.IN0
q[0] <= q[0]~0.DB_MAX_OUTPUT_PORT_TYPE


|armExIO|LPM_LATCH:iop3_3_
data[0] => clrn[0]~1.IN1
data[0] => altr_temp~4.IN0
gate => altr_temp~0.IN0
gate => altr_temp~3.IN0
aclr => clrn[0]~0.IN0
aclr => prn[0].IN0
aset => altr_temp~1.IN0
aset => altr_temp~2.IN0
q[0] <= q[0]~0.DB_MAX_OUTPUT_PORT_TYPE


|armExIO|LPM_LATCH:iop3_4_
data[0] => clrn[0]~1.IN1
data[0] => altr_temp~4.IN0
gate => altr_temp~0.IN0
gate => altr_temp~3.IN0
aclr => clrn[0]~0.IN0
aclr => prn[0].IN0
aset => altr_temp~1.IN0
aset => altr_temp~2.IN0
q[0] <= q[0]~0.DB_MAX_OUTPUT_PORT_TYPE


|armExIO|LPM_LATCH:iop3_5_
data[0] => clrn[0]~1.IN1
data[0] => altr_temp~4.IN0
gate => altr_temp~0.IN0
gate => altr_temp~3.IN0
aclr => clrn[0]~0.IN0
aclr => prn[0].IN0
aset => altr_temp~1.IN0
aset => altr_temp~2.IN0
q[0] <= q[0]~0.DB_MAX_OUTPUT_PORT_TYPE


|armExIO|LPM_LATCH:iop3_6_
data[0] => clrn[0]~1.IN1
data[0] => altr_temp~4.IN0
gate => altr_temp~0.IN0
gate => altr_temp~3.IN0
aclr => clrn[0]~0.IN0
aclr => prn[0].IN0
aset => altr_temp~1.IN0
aset => altr_temp~2.IN0
q[0] <= q[0]~0.DB_MAX_OUTPUT_PORT_TYPE


|armExIO|LPM_LATCH:iop3_7_
data[0] => clrn[0]~1.IN1
data[0] => altr_temp~4.IN0
gate => altr_temp~0.IN0
gate => altr_temp~3.IN0
aclr => clrn[0]~0.IN0
aclr => prn[0].IN0
aset => altr_temp~1.IN0
aset => altr_temp~2.IN0
q[0] <= q[0]~0.DB_MAX_OUTPUT_PORT_TYPE


|armExIO|LPM_LATCH:iop3_8_
data[0] => clrn[0]~1.IN1
data[0] => altr_temp~4.IN0
gate => altr_temp~0.IN0
gate => altr_temp~3.IN0
aclr => clrn[0]~0.IN0
aclr => prn[0].IN0
aset => altr_temp~1.IN0
aset => altr_temp~2.IN0
q[0] <= q[0]~0.DB_MAX_OUTPUT_PORT_TYPE


|armExIO|LPM_LATCH:iop3_9_
data[0] => clrn[0]~1.IN1
data[0] => altr_temp~4.IN0
gate => altr_temp~0.IN0
gate => altr_temp~3.IN0
aclr => clrn[0]~0.IN0
aclr => prn[0].IN0
aset => altr_temp~1.IN0
aset => altr_temp~2.IN0
q[0] <= q[0]~0.DB_MAX_OUTPUT_PORT_TYPE


|armExIO|L2_8:led_cnt2_3_0_and2_L_6_
I0 => G_1.IN1
I1 => G_1.IN0
Z <= G_1.DB_MAX_OUTPUT_PORT_TYPE


|armExIO|L2_8:led_cnt2_3_0_and2_L_7_
I0 => G_1.IN1
I1 => G_1.IN0
Z <= G_1.DB_MAX_OUTPUT_PORT_TYPE


|armExIO|L3_78:un6_cnt3_L_17_
I0 => G_1.IN1
I1 => G_1.IN0
I2 => 21MUX:G_3.s
Z <= 21MUX:G_3.y


|armExIO|L3_78:un6_cnt3_L_17_|21MUX:G_3
Y <= 5.DB_MAX_OUTPUT_PORT_TYPE
A => 6.IN0
S => 6.IN1
S => 7.IN1
B => 8.IN0


|armExIO|L3_78:un6_cnt3_L_19_
I0 => G_1.IN1
I1 => G_1.IN0
I2 => 21MUX:G_3.s
Z <= 21MUX:G_3.y


|armExIO|L3_78:un6_cnt3_L_19_|21MUX:G_3
Y <= 5.DB_MAX_OUTPUT_PORT_TYPE
A => 6.IN0
S => 6.IN1
S => 7.IN1
B => 8.IN0


|armExIO|L2_6:un6_cnt3_L_20_
I0 => 21MUX:G_2.b
I0 => G_1.IN0
I1 => 21MUX:G_2.s
Z <= 21MUX:G_2.y


|armExIO|L2_6:un6_cnt3_L_20_|21MUX:G_2
Y <= 5.DB_MAX_OUTPUT_PORT_TYPE
A => 6.IN0
S => 6.IN1
S => 7.IN1
B => 8.IN0


|armExIO|L3_78:un6_cnt3_L_21_
I0 => G_1.IN1
I1 => G_1.IN0
I2 => 21MUX:G_3.s
Z <= 21MUX:G_3.y


|armExIO|L3_78:un6_cnt3_L_21_|21MUX:G_3
Y <= 5.DB_MAX_OUTPUT_PORT_TYPE
A => 6.IN0
S => 6.IN1
S => 7.IN1
B => 8.IN0


|armExIO|L2_6:un6_cnt3_L_22_
I0 => 21MUX:G_2.b
I0 => G_1.IN0
I1 => 21MUX:G_2.s
Z <= 21MUX:G_2.y


|armExIO|L2_6:un6_cnt3_L_22_|21MUX:G_2
Y <= 5.DB_MAX_OUTPUT_PORT_TYPE
A => 6.IN0
S => 6.IN1
S => 7.IN1
B => 8.IN0


|armExIO|L2_6:un6_cnt3_L_24_
I0 => 21MUX:G_2.b
I0 => G_1.IN0
I1 => 21MUX:G_2.s
Z <= 21MUX:G_2.y


|armExIO|L2_6:un6_cnt3_L_24_|21MUX:G_2
Y <= 5.DB_MAX_OUTPUT_PORT_TYPE
A => 6.IN0
S => 6.IN1
S => 7.IN1
B => 8.IN0


|armExIO|L3_78:un6_cnt3_L_25_
I0 => G_1.IN1
I1 => G_1.IN0
I2 => 21MUX:G_3.s
Z <= 21MUX:G_3.y


|armExIO|L3_78:un6_cnt3_L_25_|21MUX:G_3
Y <= 5.DB_MAX_OUTPUT_PORT_TYPE
A => 6.IN0
S => 6.IN1
S => 7.IN1
B => 8.IN0


|armExIO|L3_78:un6_cnt3_L_27_
I0 => G_1.IN1
I1 => G_1.IN0
I2 => 21MUX:G_3.s
Z <= 21MUX:G_3.y


|armExIO|L3_78:un6_cnt3_L_27_|21MUX:G_3
Y <= 5.DB_MAX_OUTPUT_PORT_TYPE
A => 6.IN0
S => 6.IN1
S => 7.IN1
B => 8.IN0


|armExIO|L2_6:un6_cnt3_L_28_
I0 => 21MUX:G_2.b
I0 => G_1.IN0
I1 => 21MUX:G_2.s
Z <= 21MUX:G_2.y


|armExIO|L2_6:un6_cnt3_L_28_|21MUX:G_2
Y <= 5.DB_MAX_OUTPUT_PORT_TYPE
A => 6.IN0
S => 6.IN1
S => 7.IN1
B => 8.IN0


|armExIO|L3_78:un6_cnt3_L_29_
I0 => G_1.IN1
I1 => G_1.IN0
I2 => 21MUX:G_3.s
Z <= 21MUX:G_3.y


|armExIO|L3_78:un6_cnt3_L_29_|21MUX:G_3
Y <= 5.DB_MAX_OUTPUT_PORT_TYPE
A => 6.IN0
S => 6.IN1
S => 7.IN1
B => 8.IN0


|armExIO|L2_6:un6_cnt3_L_30_
I0 => 21MUX:G_2.b
I0 => G_1.IN0
I1 => 21MUX:G_2.s
Z <= 21MUX:G_2.y


|armExIO|L2_6:un6_cnt3_L_30_|21MUX:G_2
Y <= 5.DB_MAX_OUTPUT_PORT_TYPE
A => 6.IN0
S => 6.IN1
S => 7.IN1
B => 8.IN0


|armExIO|L3_3C:un6_cnt3_L_31_
I1 => 21MUX:G_2.b
I1 => G_1.IN0
I2 => 21MUX:G_2.s
Z <= 21MUX:G_2.y


|armExIO|L3_3C:un6_cnt3_L_31_|21MUX:G_2
Y <= 5.DB_MAX_OUTPUT_PORT_TYPE
A => 6.IN0
S => 6.IN1
S => 7.IN1
B => 8.IN0
123

armexio_hier_info - 源码说明

本页面展示了「usoc在北京博创兴业有限公司的实验平台s3c2410上运行。 2. 各实验的全部源代码分别存放在各实验目录下面。」中的 armexio_hier_info 源码文件，采用 编程语言编写，共 1,605 行代码。您可以在线阅读完整代码内容，也可以返回资源详情页下载完整源码包进行本地学习和开发。

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