armexio.fit.eqn

来自「usoc在北京博创兴业有限公司的实验平台s3c2410上运行。 2. 各实验的全」· EQN 代码 · 共 2,642 行 · 第 1/5 页

C46L1 = !un1_wr_6_0_and2_0_and2 & (un1_wr_5_0_and2_0_and2 & data_7_ # !un1_wr_5_0_and2_0_and2 & C46L1);


--C56L1 is lpm_latch:iop2_24_|q[0]~1 at LC5_J34
--operation mode is normal

C56L1 = !un1_wr_6_0_and2_0_and2 & (un1_wr_5_0_and2_0_and2 & data_8_ # !un1_wr_5_0_and2_0_and2 & C56L1);


--C66L1 is lpm_latch:iop2_25_|q[0]~1 at LC8_J31
--operation mode is normal

C66L1 = !un1_wr_6_0_and2_0_and2 & (un1_wr_5_0_and2_0_and2 & data_9_ # !un1_wr_5_0_and2_0_and2 & C66L1);


--C76L1 is lpm_latch:iop2_26_|q[0]~1 at LC1_I31
--operation mode is normal

C76L1 = !un1_wr_6_0_and2_0_and2 & (un1_wr_5_0_and2_0_and2 & data_10_ # !un1_wr_5_0_and2_0_and2 & C76L1);


--C86L1 is lpm_latch:iop2_27_|q[0]~1 at LC3_H30
--operation mode is normal

C86L1 = !un1_wr_6_0_and2_0_and2 & (un1_wr_5_0_and2_0_and2 & data_11_ # !un1_wr_5_0_and2_0_and2 & C86L1);


--C96L1 is lpm_latch:iop2_28_|q[0]~1 at LC5_H34
--operation mode is normal

C96L1 = !un1_wr_6_0_and2_0_and2 & (un1_wr_5_0_and2_0_and2 & data_12_ # !un1_wr_5_0_and2_0_and2 & C96L1);


--C07L1 is lpm_latch:iop2_29_|q[0]~1 at LC7_H30
--operation mode is normal

C07L1 = !un1_wr_6_0_and2_0_and2 & (un1_wr_5_0_and2_0_and2 & data_13_ # !un1_wr_5_0_and2_0_and2 & C07L1);


--C17L1 is lpm_latch:iop2_30_|q[0]~1 at LC2_H26
--operation mode is normal

C17L1 = !un1_wr_6_0_and2_0_and2 & (un1_wr_5_0_and2_0_and2 & data_14_ # !un1_wr_5_0_and2_0_and2 & C17L1);


--C27L1 is lpm_latch:iop2_31_|q[0]~1 at LC3_H25
--operation mode is normal

C27L1 = !un1_wr_6_0_and2_0_and2 & (un1_wr_5_0_and2_0_and2 & data_15_ # !un1_wr_5_0_and2_0_and2 & C27L1);


--G_365 is G_365 at LC3_F18
--operation mode is normal

G_365 = G_356_lc & G_355_lc;


--C37L1 is lpm_latch:iop3_0_|q[0]~1 at LC5_F18
--operation mode is normal

C37L1 = !un1_wr_6_0_and2_0_and2 & (A1L713 & data_0_ # !A1L713 & C37L1);


--C47L1 is lpm_latch:iop3_1_|q[0]~1 at LC8_I15
--operation mode is normal

C47L1 = !un1_wr_6_0_and2_0_and2 & (A1L713 & data_1_ # !A1L713 & C47L1);


--C57L1 is lpm_latch:iop3_2_|q[0]~1 at LC6_I15
--operation mode is normal

C57L1 = !un1_wr_6_0_and2_0_and2 & (A1L713 & data_2_ # !A1L713 & C57L1);


--C67L1 is lpm_latch:iop3_3_|q[0]~1 at LC1_H14
--operation mode is normal

C67L1 = !un1_wr_6_0_and2_0_and2 & (A1L713 & data_3_ # !A1L713 & C67L1);


--C77L1 is lpm_latch:iop3_4_|q[0]~1 at LC3_H14
--operation mode is normal

C77L1 = !un1_wr_6_0_and2_0_and2 & (A1L713 & data_4_ # !A1L713 & C77L1);


--C87L1 is lpm_latch:iop3_5_|q[0]~1 at LC6_H14
--operation mode is normal

C87L1 = !un1_wr_6_0_and2_0_and2 & (A1L713 & data_5_ # !A1L713 & C87L1);


--C97L1 is lpm_latch:iop3_6_|q[0]~1 at LC4_H11
--operation mode is normal

C97L1 = !un1_wr_6_0_and2_0_and2 & (A1L713 & data_6_ # !A1L713 & C97L1);


--C08L1 is lpm_latch:iop3_7_|q[0]~1 at LC1_H11
--operation mode is normal

C08L1 = !un1_wr_6_0_and2_0_and2 & (A1L713 & data_7_ # !A1L713 & C08L1);


--C18L1 is lpm_latch:iop3_8_|q[0]~1 at LC4_I9
--operation mode is normal

C18L1 = !un1_wr_6_0_and2_0_and2 & (A1L713 & data_8_ # !A1L713 & C18L1);


--C28L1 is lpm_latch:iop3_9_|q[0]~1 at LC1_I9
--operation mode is normal

C28L1 = !un1_wr_6_0_and2_0_and2 & (A1L713 & data_9_ # !A1L713 & C28L1);


--C38L1 is lpm_latch:iop3_10_|q[0]~1 at LC4_I7
--operation mode is normal

C38L1 = !un1_wr_6_0_and2_0_and2 & (A1L713 & data_10_ # !A1L713 & C38L1);


--C48L1 is lpm_latch:iop3_11_|q[0]~1 at LC1_I7
--operation mode is normal

C48L1 = !un1_wr_6_0_and2_0_and2 & (A1L713 & data_11_ # !A1L713 & C48L1);


--C58L1 is lpm_latch:iop3_12_|q[0]~1 at LC4_H6
--operation mode is normal

C58L1 = !un1_wr_6_0_and2_0_and2 & (A1L713 & data_12_ # !A1L713 & C58L1);


--C68L1 is lpm_latch:iop3_13_|q[0]~1 at LC5_H6
--operation mode is normal

C68L1 = !un1_wr_6_0_and2_0_and2 & (A1L713 & data_13_ # !A1L713 & C68L1);


--C78L1 is lpm_latch:iop3_14_|q[0]~1 at LC2_H6
--operation mode is normal

C78L1 = !un1_wr_6_0_and2_0_and2 & (A1L713 & data_14_ # !A1L713 & C78L1);


--C88L1 is lpm_latch:iop3_15_|q[0]~1 at LC2_H4
--operation mode is normal

C88L1 = !un1_wr_6_0_and2_0_and2 & (A1L713 & data_15_ # !A1L713 & C88L1);


--C98L1 is lpm_latch:iop3_16_|q[0]~1 at LC3_H4
--operation mode is normal

C98L1 = !un1_wr_6_0_and2_0_and2 & (A1L613 & data_0_ # !A1L613 & C98L1);


--C09L1 is lpm_latch:iop3_17_|q[0]~1 at LC6_H4
--operation mode is normal

C09L1 = !un1_wr_6_0_and2_0_and2 & (A1L613 & data_1_ # !A1L613 & C09L1);


--C19L1 is lpm_latch:iop3_18_|q[0]~1 at LC3_H1
--operation mode is normal

C19L1 = !un1_wr_6_0_and2_0_and2 & (A1L613 & data_2_ # !A1L613 & C19L1);


--C29L1 is lpm_latch:iop3_19_|q[0]~1 at LC2_H1
--operation mode is normal

C29L1 = !un1_wr_6_0_and2_0_and2 & (A1L613 & data_3_ # !A1L613 & C29L1);


--C39L1 is lpm_latch:iop3_20_|q[0]~1 at LC1_H1
--operation mode is normal

C39L1 = !un1_wr_6_0_and2_0_and2 & (A1L613 & data_4_ # !A1L613 & C39L1);


--C49L1 is lpm_latch:iop3_21_|q[0]~1 at LC2_G17
--operation mode is normal

C49L1 = !un1_wr_6_0_and2_0_and2 & (A1L613 & data_5_ # !A1L613 & C49L1);


--C59L1 is lpm_latch:iop3_22_|q[0]~1 at LC6_H21
--operation mode is normal

C59L1 = !un1_wr_6_0_and2_0_and2 & (A1L613 & data_6_ # !A1L613 & C59L1);


--C69L1 is lpm_latch:iop3_23_|q[0]~1 at LC8_H4
--operation mode is normal

C69L1 = !un1_wr_6_0_and2_0_and2 & (A1L613 & data_7_ # !A1L613 & C69L1);


--C79L1 is lpm_latch:iop3_24_|q[0]~1 at LC1_H4
--operation mode is normal

C79L1 = !un1_wr_6_0_and2_0_and2 & (A1L613 & data_8_ # !A1L613 & C79L1);


--C89L1 is lpm_latch:iop3_25_|q[0]~1 at LC4_I4
--operation mode is normal

C89L1 = !un1_wr_6_0_and2_0_and2 & (A1L613 & data_9_ # !A1L613 & C89L1);


--led_cnt1_0_ is led_cnt1_0_ at LC3_F2
--operation mode is normal

led_cnt1_0__lut_out = !led_cnt1_0_ & !led_cnt1_1_;
led_cnt1_0_ = DFFEA(led_cnt1_0__lut_out, !GLOBAL(mclk), , , un1_cnt3_2_0, , );


--led_cnt1_1_ is led_cnt1_1_ at LC2_F2
--operation mode is normal

led_cnt1_1__lut_out = led_cnt1_0_ & !led_cnt1_1_;
led_cnt1_1_ = DFFEA(led_cnt1_1__lut_out, !GLOBAL(mclk), , , un1_cnt3_2_0, , );


--un1_iop1_6_0_i_0_0_540 is un1_iop1_6_0_i_0_0_540 at LC1_H5
--operation mode is normal

un1_iop1_6_0_i_0_0_540 = address[0] & C52L1 # !address[0] & C9L1 # !G_353;


--un1_iop1_6_0_i_0_and2_3_0_ is un1_iop1_6_0_i_0_and2_3_0_ at LC2_H5
--operation mode is normal

un1_iop1_6_0_i_0_and2_3_0_ = address[1] & !address[2] & !address[0] & !C14L1;


--un1_iop1_6_0_i_0_and2_2_0_ is un1_iop1_6_0_i_0_and2_2_0_ at LC6_H5
--operation mode is normal

un1_iop1_6_0_i_0_and2_2_0_ = address[1] & !address[2] & address[0] & !C75L1;


--un1_iop1_6_0_i_0_0_ is un1_iop1_6_0_i_0_0_ at LC3_H5
--operation mode is normal

un1_iop1_6_0_i_0_0_ = !un1_iop1_6_0_i_0_and2_2_0_ & !un1_iop1_6_0_i_0_and2_3_0_ & un1_iop1_6_0_i_0_0_540 & A1L052;


--un1_un30_rd_0_and2_0_1_512 is un1_un30_rd_0_and2_0_1_512 at LC8_F18
--operation mode is normal

un1_un30_rd_0_and2_0_1_512 = G_352 & (!address[2] # !address[1]);


--un1_un30_rd_0_and2_0_15_ is un1_un30_rd_0_and2_0_15_ at LC1_F18
--operation mode is normal

un1_un30_rd_0_and2_0_15_ = !cs & !rd & (G_356_lc # un1_un30_rd_0_and2_0_1_512);


--un1_iop1_6_0_0_0_8_573 is un1_iop1_6_0_0_0_8_573 at LC2_J34
--operation mode is normal

un1_iop1_6_0_0_0_8_573 = address[0] & !C33L1 # !address[0] & !C71L1 # !G_353;


--un1_iop1_6_0_0_0_8_572 is un1_iop1_6_0_0_0_8_572 at LC8_J34
--operation mode is normal

un1_iop1_6_0_0_0_8_572 = address[0] & !C79L1 # !address[0] & !C18L1 # !G_355_lc;


--un1_iop1_6_0_0_0_8_ is un1_iop1_6_0_0_0_8_ at LC4_J34
--operation mode is normal

un1_iop1_6_0_0_0_8_ = !A1L932 # !un1_iop1_6_0_0_0_8_573 # !un1_iop1_6_0_0_0_8_572;


--un1_iop1_6_0_0_0_and2_2_9_ is un1_iop1_6_0_0_0_and2_2_9_ at LC1_J31
--operation mode is normal

un1_iop1_6_0_0_0_and2_2_9_ = address[1] & !address[2] & !address[0] & C05L1;


--un1_iop1_6_0_0_0_and2_1_9_ is un1_iop1_6_0_0_0_and2_1_9_ at LC3_J31
--operation mode is normal

un1_iop1_6_0_0_0_and2_1_9_ = address[1] & !address[2] & address[0] & C66L1;


--un1_iop1_6_0_0_0_9_569 is un1_iop1_6_0_0_0_9_569 at LC4_J31
--operation mode is normal

un1_iop1_6_0_0_0_9_569 = address[0] & !C43L1 # !address[0] & !C81L1 # !G_353;


--un1_iop1_6_0_0_0_9_568 is un1_iop1_6_0_0_0_9_568 at LC5_J31
--operation mode is normal

un1_iop1_6_0_0_0_9_568 = address[0] & !C89L1 # !address[0] & !C28L1 # !G_355_lc;


--un1_iop1_6_0_0_0_9_ is un1_iop1_6_0_0_0_9_ at LC2_J31
--operation mode is normal

un1_iop1_6_0_0_0_9_ = un1_iop1_6_0_0_0_and2_1_9_ # un1_iop1_6_0_0_0_and2_2_9_ # !un1_iop1_6_0_0_0_9_569 # !un1_iop1_6_0_0_0_9_568;


--un1_iop1_iv_0_0_10_578 is un1_iop1_iv_0_0_10_578 at LC3_I31
--operation mode is normal

un1_iop1_iv_0_0_10_578 = G_366 & !C15L1 & (!C76L1 # !G_369) # !G_366 & (!C76L1 # !G_369);


--un1_iop1_iv_0_0_10_579 is un1_iop1_iv_0_0_10_579 at LC2_I6
--operation mode is normal

un1_iop1_iv_0_0_10_579 = A1L07 & !C53L1 & (!C38L1 # !G_365) # !A1L07 & (!C38L1 # !G_365);


--un1_iop1_iv_0_0_10_ is un1_iop1_iv_0_0_10_ at LC8_I31
--operation mode is normal

un1_iop1_iv_0_0_10_ = A1L96 & C91L1 # !un1_iop1_iv_0_0_10_578 # !un1_iop1_iv_0_0_10_579;


--un1_iop1_iv_0_0_11_575 is un1_iop1_iv_0_0_11_575 at LC4_I31
--operation mode is normal

un1_iop1_iv_0_0_11_575 = G_366 & !C25L1 & (!C86L1 # !G_369) # !G_366 & (!C86L1 # !G_369);


--un1_iop1_iv_0_0_11_576 is un1_iop1_iv_0_0_11_576 at LC5_I31
--operation mode is normal

un1_iop1_iv_0_0_11_576 = A1L07 & !C63L1 & (!C48L1 # !G_365) # !A1L07 & (!C48L1 # !G_365);


--un1_iop1_iv_0_0_11_ is un1_iop1_iv_0_0_11_ at LC6_I31
--operation mode is normal

un1_iop1_iv_0_0_11_ = A1L96 & C02L1 # !un1_iop1_iv_0_0_11_575 # !un1_iop1_iv_0_0_11_576;


--un1_iop1_iv_0_0_12_558 is un1_iop1_iv_0_0_12_558 at LC1_I29
--operation mode is normal

un1_iop1_iv_0_0_12_558 = G_366 & !C35L1 & (!C96L1 # !G_369) # !G_366 & (!C96L1 # !G_369);


--un1_iop1_iv_0_0_12_559 is un1_iop1_iv_0_0_12_559 at LC4_I29
--operation mode is normal

un1_iop1_iv_0_0_12_559 = A1L07 & !C73L1 & (!C58L1 # !G_365) # !A1L07 & (!C58L1 # !G_365);


--un1_iop1_iv_0_0_12_ is un1_iop1_iv_0_0_12_ at LC2_I29
--operation mode is normal

un1_iop1_iv_0_0_12_ = A1L96 & C12L1 # !un1_iop1_iv_0_0_12_558 # !un1_iop1_iv_0_0_12_559;


--un1_iop1_iv_0_0_13_555 is un1_iop1_iv_0_0_13_555 at LC6_I29
--operation mode is normal

un1_iop1_iv_0_0_13_555 = G_366 & !C45L1 & (!C07L1 # !G_369) # !G_366 & (!C07L1 # !G_369);


--un1_iop1_iv_0_0_13_556 is un1_iop1_iv_0_0_13_556 at LC7_I29
--operation mode is normal

un1_iop1_iv_0_0_13_556 = A1L07 & !C83L1 & (!C68L1 # !G_365) # !A1L07 & (!C68L1 # !G_365);


--un1_iop1_iv_0_0_13_ is un1_iop1_iv_0_0_13_ at LC8_I29
--operation mode is normal

un1_iop1_iv_0_0_13_ = A1L96 & C22L1 # !un1_iop1_iv_0_0_13_555 # !un1_iop1_iv_0_0_13_556;


--un1_iop1_iv_0_0_14_564 is un1_iop1_iv_0_0_14_564 at LC5_H26
--operation mode is normal

un1_iop1_iv_0_0_14_564 = G_366 & !C55L1 & (!C17L1 # !G_369) # !G_366 & (!C17L1 # !G_369);


--un1_iop1_iv_0_0_14_565 is un1_iop1_iv_0_0_14_565 at LC1_H9
--operation mode is normal

un1_iop1_iv_0_0_14_565 = A1L07 & !C93L1 & (!C78L1 # !G_365) # !A1L07 & (!C78L1 # !G_365);


--un1_iop1_iv_0_0_14_ is un1_iop1_iv_0_0_14_ at LC6_H26
--operation mode is normal

un1_iop1_iv_0_0_14_ = A1L96 & C32L1 # !un1_iop1_iv_0_0_14_564 # !un1_iop1_iv_0_0_14_565;


--un1_iop1_iv_0_0_15_561 is un1_iop1_iv_0_0_15_561 at LC1_H25
--operation mode is normal

un1_iop1_iv_0_0_15_561 = G_366 & !C65L1 & (!C27L1 # !G_369) # !G_366 & (!C27L1 # !G_369);


--un1_iop1_iv_0_0_15_562 is un1_iop1_iv_0_0_15_562 at LC4_H26
--operation mode is normal

un1_iop1_iv_0_0_15_562 = A1L07 & !C04L1 & (!C88L1 # !G_365) # !A1L07 & (!C88L1 # !G_365);


--un1_iop1_iv_0_0_15_ is un1_iop1_iv_0_0_15_ at LC4_H25
--operation mode is normal

un1_iop1_iv_0_0_15_ = A1L96 & C42L1 # !un1_iop1_iv_0_0_15_561 # !un1_iop1_iv_0_0_15_562;


--G_350_504 is G_350_504 at LC3_F8
--operation mode is normal

G_350_504 = !address[7] & !address[8] & !address[9] & !address[5];


--G_350_lc is G_350_lc at LC4_F8
--operation mode is normal

G_350_lc = !address[6] & G_350_504;

--A1L85 is G_350_lc~0 at LC4_F8
--operation mode is normal

A1L85 = !address[6] & G_350_504;


--G_355_lc is G_355_lc at LC7_F8
--operation mode is normal

G_355_lc = !address[1] & address[2];

--A1L36 is G_355_lc~0 at LC7_F8
--operation mode is normal

A1L36 = !address[1] & address[2];


--led_un1_cnt2_lt7_cry is led_un1_cnt2_lt7_cry at LC4_F7
--operation mode is arithmetic

led_un1_cnt2_lt7_cry = C8L1 & (led_un1_cnt2_lt6_cry # !un2_cnt2_cry_1_) # !C8L1 & !un2_cnt2_cry_1_ & led_un1_cnt2_lt6_cry;

--A1L722 is led_un1_cnt2_lt7_cry~COUT at LC4_F7
--operation mode is arithmetic

A1L722 = CARRY(C8L1 & (led_un1_cnt2_lt6_cry # !un2_cnt2_cry_1_) # !C8L1 & !un2_cnt2_cry_1_ & led_un1_cnt2_lt6_cry);


--un1_cnt3_2_0 is un1_cnt3_2_0 at LC5_F7
--operation mode is normal

un1_cnt3_2_0 = !A1L722 & A1L45;


--A1L223 is un1_wr_6_0_and2_0_and2_508~0 at LC5_F8
--operation mode is normal

A1L223 = (address[3] & address[4] & address[1] & address[2]) & CASCADE(A1L85);


--A1L613 is un1_wr_1_0_and2_0_and2~60 at LC8_F8
--operation mode is normal

A1L613 = (address[0] & G_352 & !cs & !wr) & CASCADE(A1L36);


--un1_iop1_6_0_i_0_and2_i_0_ is un1_iop1_6_0_i_0_and2_i_0_ at LC4_H5
--operation mode is normal

un1_iop1_6_0_i_0_and2_i_0_ = C1L1 # !address[2] # !address[1];


--A1L052 is un1_iop1_6_0_i_0_0_543~0 at LC5_H5
--operation mode is normal

A1L052 = (address[0] & C98L1 # !address[0] & C37L1 # !G_355_lc) & CASCADE(un1_iop1_6_0_i_0_and2_i_0_);


--un1_iop1_6_0_i_0_and2_1_1_ is un1_iop1_6_0_i_0_and2_1_1_ at LC5_G5
--operation mode is normal

un1_iop1_6_0_i_0_and2_1_1_ = G_355_lc & !address[0] & !C47L1;


--un1_iop1_6_0_i_0_1_537 is un1_iop1_6_0_i_0_1_537 at LC7_G5
--operation mode is normal

un1_iop1_6_0_i_0_1_537 = !un1_iop1_6_0_i_0_and2_1_1_ & (C2L1 # !address[2] # !address[1]);


--A1L452 is un1_iop1_6_0_i_0_1_~0 at LC4_G5
--operation mode is normal

A1L452 = (un1_iop1_6_0_i_0_1_537 & (C09L1 # !address[0] # !G_355_lc)) & CASCADE(A1L352);


--un1_iop1_6_0_i_0_and2_1_2_ is un1_iop1_6_0_i_0_and2_1_2_ at LC1_G4
--operation mode is normal

un1_iop1_6_0_i_0_and2_1_2_ = G_355_lc & !address[0] & !C57L1;


--un1_iop1_6_0_i_0_2_552 is un1_iop1_6_0_i_0_2_552 at LC7_G4
--operation mode is normal

un1_iop1_6_0_i_0_2_552 = !un1_iop1_6_0_i_0_and2_1_2_ & (C3L1 # !address[2] # !address[1]);


--A1L852 is un1_iop1_6_0_i_0_2_~0 at LC6_G4
--operation mode is normal

A1L852 = (un1_iop1_6_0_i_0_2_552 & (C19L1 # !address[0] # !G_355_lc)) & CASCADE(A1L752);


--un1_iop1_6_0_i_0_and2_1_3_ is un1_iop1_6_0_i_0_and2_1_3_ at LC2_J3
--operation mode is normal

un1_iop1_6_0_i_0_and2_1_3_ = G_355_lc & !address[0] & !C67L1;