📄 cmd_i2c.c.svn-base
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printf(" %04lx", (data >> 16) & 0x0000FFFF); } else { printf(" %08lx", data); } } nbytes = readline (" ? "); if (nbytes == 0) { /* * <CR> pressed as only input, don't modify current * location and move to next. */ if (incrflag) addr += size; nbytes = size;#ifdef CONFIG_BOOT_RETRY_TIME reset_cmd_timeout(); /* good enough to not time out */#endif }#ifdef CONFIG_BOOT_RETRY_TIME else if (nbytes == -2) { break; /* timed out, exit the command */ }#endif else { char *endp; data = simple_strtoul(console_buffer, &endp, 16); if(size == 1) { data = data << 24; } else if(size == 2) { data = data << 16; } data = be32_to_cpu(data); nbytes = endp - console_buffer; if (nbytes) {#ifdef CONFIG_BOOT_RETRY_TIME /* * good enough to not time out */ reset_cmd_timeout();#endif if(i2c_write(chip, addr, alen, (char *)&data, size) != 0) { puts ("Error writing the chip.\n"); }#ifdef CFG_EEPROM_PAGE_WRITE_DELAY_MS udelay(CFG_EEPROM_PAGE_WRITE_DELAY_MS * 1000);#endif if (incrflag) addr += size; } } } while (nbytes); chip = i2c_mm_last_chip; addr = i2c_mm_last_addr; alen = i2c_mm_last_alen; return 0;}/* * Syntax: * iprobe {addr}{.0, .1, .2} */int do_i2c_probe (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]){ int j;#if defined(CFG_I2C_NOPROBES) int k, skip;#endif puts ("Valid chip addresses:"); for(j = 0; j < 128; j++) {#if defined(CFG_I2C_NOPROBES) skip = 0; for (k = 0; k < sizeof(i2c_no_probes); k++){ if (j == i2c_no_probes[k]){ skip = 1; break; } } if (skip) continue;#endif if(i2c_probe(j) == 0) { printf(" %02X", j); } } putc ('\n');#if defined(CFG_I2C_NOPROBES) puts ("Excluded chip addresses:"); for( k = 0; k < sizeof(i2c_no_probes); k++ ) printf(" %02X", i2c_no_probes[k] ); putc ('\n');#endif return 0;}/* * Syntax: * iloop {i2c_chip} {addr}{.0, .1, .2} [{length}] [{delay}] * {length} - Number of bytes to read * {delay} - A DECIMAL number and defaults to 1000 uSec */int do_i2c_loop(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]){ u_char chip; ulong alen; uint addr; uint length; u_char bytes[16]; int delay; int j; if (argc < 3) { printf ("Usage:\n%s\n", cmdtp->usage); return 1; } /* * Chip is always specified. */ chip = simple_strtoul(argv[1], NULL, 16); /* * Address is always specified. */ addr = simple_strtoul(argv[2], NULL, 16); alen = 1; for(j = 0; j < 8; j++) { if (argv[2][j] == '.') { alen = argv[2][j+1] - '0'; if (alen > 4) { printf ("Usage:\n%s\n", cmdtp->usage); return 1; } break; } else if (argv[2][j] == '\0') { break; } } /* * Length is the number of objects, not number of bytes. */ length = 1; length = simple_strtoul(argv[3], NULL, 16); if(length > sizeof(bytes)) { length = sizeof(bytes); } /* * The delay time (uSec) is optional. */ delay = 1000; if (argc > 3) { delay = simple_strtoul(argv[4], NULL, 10); } /* * Run the loop... */ while(1) { if(i2c_read(chip, addr, alen, bytes, length) != 0) { puts ("Error reading the chip.\n"); } udelay(delay); } /* NOTREACHED */ return 0;}/* * The SDRAM command is separately configured because many * (most?) embedded boards don't use SDRAM DIMMs. */#if (CONFIG_COMMANDS & CFG_CMD_SDRAM)/* * Syntax: * sdram {i2c_chip} */int do_sdram ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]){ u_char chip; u_char data[128]; u_char cksum; int j; if (argc < 2) { printf ("Usage:\n%s\n", cmdtp->usage); return 1; } /* * Chip is always specified. */ chip = simple_strtoul(argv[1], NULL, 16); if(i2c_read(chip, 0, 1, data, sizeof(data)) != 0) { puts ("No SDRAM Serial Presence Detect found.\n"); return 1; } cksum = 0; for (j = 0; j < 63; j++) { cksum += data[j]; } if(cksum != data[63]) { printf ("WARNING: Configuration data checksum failure:\n" " is 0x%02x, calculated 0x%02x\n", data[63], cksum); } printf("SPD data revision %d.%d\n", (data[62] >> 4) & 0x0F, data[62] & 0x0F); printf("Bytes used 0x%02X\n", data[0]); printf("Serial memory size 0x%02X\n", 1 << data[1]); puts ("Memory type "); switch(data[2]) { case 2: puts ("EDO\n"); break; case 4: puts ("SDRAM\n"); break; default: puts ("unknown\n"); break; } puts ("Row address bits "); if((data[3] & 0x00F0) == 0) { printf("%d\n", data[3] & 0x0F); } else { printf("%d/%d\n", data[3] & 0x0F, (data[3] >> 4) & 0x0F); } puts ("Column address bits "); if((data[4] & 0x00F0) == 0) { printf("%d\n", data[4] & 0x0F); } else { printf("%d/%d\n", data[4] & 0x0F, (data[4] >> 4) & 0x0F); } printf("Module rows %d\n", data[5]); printf("Module data width %d bits\n", (data[7] << 8) | data[6]); puts ("Interface signal levels "); switch(data[8]) { case 0: puts ("5.0v/TTL\n"); break; case 1: puts ("LVTTL\n"); break; case 2: puts ("HSTL 1.5\n"); break; case 3: puts ("SSTL 3.3\n"); break; case 4: puts ("SSTL 2.5\n"); break; default: puts ("unknown\n"); break; } printf("SDRAM cycle time %d.%d nS\n", (data[9] >> 4) & 0x0F, data[9] & 0x0F); printf("SDRAM access time %d.%d nS\n", (data[10] >> 4) & 0x0F, data[10] & 0x0F); puts ("EDC configuration "); switch(data[11]) { case 0: puts ("None\n"); break; case 1: puts ("Parity\n"); break; case 2: puts ("ECC\n"); break; default: puts ("unknown\n"); break; } if((data[12] & 0x80) == 0) { puts ("No self refresh, rate "); } else { puts ("Self refresh, rate "); } switch(data[12] & 0x7F) { case 0: puts ("15.625uS\n"); break; case 1: puts ("3.9uS\n"); break; case 2: puts ("7.8uS\n"); break; case 3: puts ("31.3uS\n"); break; case 4: puts ("62.5uS\n"); break; case 5: puts ("125uS\n"); break; default: puts ("unknown\n"); break; } printf("SDRAM width (primary) %d\n", data[13] & 0x7F); if((data[13] & 0x80) != 0) { printf(" (second bank) %d\n", 2 * (data[13] & 0x7F)); } if(data[14] != 0) { printf("EDC width %d\n", data[14] & 0x7F); if((data[14] & 0x80) != 0) { printf(" (second bank) %d\n", 2 * (data[14] & 0x7F)); } } printf("Min clock delay, back-to-back random column addresses %d\n", data[15]); puts ("Burst length(s) "); if (data[16] & 0x80) puts (" Page"); if (data[16] & 0x08) puts (" 8"); if (data[16] & 0x04) puts (" 4"); if (data[16] & 0x02) puts (" 2"); if (data[16] & 0x01) puts (" 1"); putc ('\n'); printf("Number of banks %d\n", data[17]); puts ("CAS latency(s) "); if (data[18] & 0x80) puts (" TBD"); if (data[18] & 0x40) puts (" 7"); if (data[18] & 0x20) puts (" 6"); if (data[18] & 0x10) puts (" 5"); if (data[18] & 0x08) puts (" 4"); if (data[18] & 0x04) puts (" 3"); if (data[18] & 0x02) puts (" 2"); if (data[18] & 0x01) puts (" 1"); putc ('\n'); puts ("CS latency(s) "); if (data[19] & 0x80) puts (" TBD"); if (data[19] & 0x40) puts (" 6"); if (data[19] & 0x20) puts (" 5"); if (data[19] & 0x10) puts (" 4"); if (data[19] & 0x08) puts (" 3"); if (data[19] & 0x04) puts (" 2"); if (data[19] & 0x02) puts (" 1"); if (data[19] & 0x01) puts (" 0"); putc ('\n'); puts ("WE latency(s) "); if (data[20] & 0x80) puts (" TBD"); if (data[20] & 0x40) puts (" 6"); if (data[20] & 0x20) puts (" 5"); if (data[20] & 0x10) puts (" 4"); if (data[20] & 0x08) puts (" 3"); if (data[20] & 0x04) puts (" 2"); if (data[20] & 0x02) puts (" 1"); if (data[20] & 0x01) puts (" 0"); putc ('\n'); puts ("Module attributes:\n"); if (!data[21]) puts (" (none)\n"); if (data[21] & 0x80) puts (" TBD (bit 7)\n"); if (data[21] & 0x40) puts (" Redundant row address\n"); if (data[21] & 0x20) puts (" Differential clock input\n"); if (data[21] & 0x10) puts (" Registerd DQMB inputs\n"); if (data[21] & 0x08) puts (" Buffered DQMB inputs\n"); if (data[21] & 0x04) puts (" On-card PLL\n"); if (data[21] & 0x02) puts (" Registered address/control lines\n"); if (data[21] & 0x01) puts (" Buffered address/control lines\n"); puts ("Device attributes:\n"); if (data[22] & 0x80) puts (" TBD (bit 7)\n"); if (data[22] & 0x40) puts (" TBD (bit 6)\n"); if (data[22] & 0x20) puts (" Upper Vcc tolerance 5%\n"); else puts (" Upper Vcc tolerance 10%\n"); if (data[22] & 0x10) puts (" Lower Vcc tolerance 5%\n"); else puts (" Lower Vcc tolerance 10%\n"); if (data[22] & 0x08) puts (" Supports write1/read burst\n"); if (data[22] & 0x04) puts (" Supports precharge all\n"); if (data[22] & 0x02) puts (" Supports auto precharge\n"); if (data[22] & 0x01) puts (" Supports early RAS# precharge\n"); printf("SDRAM cycle time (2nd highest CAS latency) %d.%d nS\n", (data[23] >> 4) & 0x0F, data[23] & 0x0F); printf("SDRAM access from clock (2nd highest CAS latency) %d.%d nS\n", (data[24] >> 4) & 0x0F, data[24] & 0x0F); printf("SDRAM cycle time (3rd highest CAS latency) %d.%d nS\n", (data[25] >> 4) & 0x0F, data[25] & 0x0F); printf("SDRAM access from clock (3rd highest CAS latency) %d.%d nS\n", (data[26] >> 4) & 0x0F, data[26] & 0x0F); printf("Minimum row precharge %d nS\n", data[27]); printf("Row active to row active min %d nS\n", data[28]); printf("RAS to CAS delay min %d nS\n", data[29]); printf("Minimum RAS pulse width %d nS\n", data[30]); puts ("Density of each row "); if (data[31] & 0x80) puts (" 512"); if (data[31] & 0x40) puts (" 256"); if (data[31] & 0x20) puts (" 128"); if (data[31] & 0x10) puts (" 64"); if (data[31] & 0x08) puts (" 32"); if (data[31] & 0x04) puts (" 16"); if (data[31] & 0x02) puts (" 8"); if (data[31] & 0x01) puts (" 4"); puts ("MByte\n"); printf("Command and Address setup %c%d.%d nS\n", (data[32] & 0x80) ? '-' : '+', (data[32] >> 4) & 0x07, data[32] & 0x0F); printf("Command and Address hold %c%d.%d nS\n", (data[33] & 0x80) ? '-' : '+', (data[33] >> 4) & 0x07, data[33] & 0x0F); printf("Data signal input setup %c%d.%d nS\n", (data[34] & 0x80) ? '-' : '+', (data[34] >> 4) & 0x07, data[34] & 0x0F); printf("Data signal input hold %c%d.%d nS\n", (data[35] & 0x80) ? '-' : '+', (data[35] >> 4) & 0x07, data[35] & 0x0F); puts ("Manufacturer's JEDEC ID "); for(j = 64; j <= 71; j++) printf("%02X ", data[j]); putc ('\n'); printf("Manufacturing Location %02X\n", data[72]); puts ("Manufacturer's Part Number "); for(j = 73; j <= 90; j++) printf("%02X ", data[j]); putc ('\n'); printf("Revision Code %02X %02X\n", data[91], data[92]); printf("Manufacturing Date %02X %02X\n", data[93], data[94]); puts ("Assembly Serial Number "); for(j = 95; j <= 98; j++) printf("%02X ", data[j]); putc ('\n'); printf("Speed rating PC%d\n", data[126] == 0x66 ? 66 : data[126]); return 0;}#endif /* CFG_CMD_SDRAM *//***************************************************/U_BOOT_CMD( imd, 4, 1, do_i2c_md, \ "imd - i2c memory display\n", \ "chip address[.0, .1, .2] [# of objects]\n - i2c memory display\n" \);U_BOOT_CMD( imm, 3, 1, do_i2c_mm, "imm - i2c memory modify (auto-incrementing)\n", "chip address[.0, .1, .2]\n" " - memory modify, auto increment address\n");U_BOOT_CMD( inm, 3, 1, do_i2c_nm, "inm - memory modify (constant address)\n", "chip address[.0, .1, .2]\n - memory modify, read and keep address\n");U_BOOT_CMD( imw, 5, 1, do_i2c_mw, "imw - memory write (fill)\n", "chip address[.0, .1, .2] value [count]\n - memory write (fill)\n");U_BOOT_CMD( icrc32, 5, 1, do_i2c_crc, "icrc32 - checksum calculation\n", "chip address[.0, .1, .2] count\n - compute CRC32 checksum\n");U_BOOT_CMD( iprobe, 1, 1, do_i2c_probe, "iprobe - probe to discover valid I2C chip addresses\n", "\n -discover valid I2C chip addresses\n");/* * Require full name for "iloop" because it is an infinite loop! */U_BOOT_CMD( iloop, 5, 1, do_i2c_loop, "iloop - infinite loop on address range\n", "chip address[.0, .1, .2] [# of objects]\n" " - loop, reading a set of addresses\n");#if (CONFIG_COMMANDS & CFG_CMD_SDRAM)U_BOOT_CMD( isdram, 2, 1, do_sdram, "isdram - print SDRAM configuration information\n", "chip\n - print SDRAM configuration information\n" " (valid chip values 50..57)\n");#endif#endif /* CFG_CMD_I2C */
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