280xcanloopback.c

TMS320F2808的完整驱动测试程序源码

/*H*****************************************************************************
*
* $Archive::                                                                   $
* $Revision::                                                                  $
* $Date::                                                                      $
* $Author::                                                                    $
*
* DESCRIPTION: R2808 Post
*
* GLOBALS 
*
* PUBLIC FUNCTIONS:
*                              
* PRIVATE FUNCTIONS:
*
* USAGE/LIMITATIONS:
*
* NOTES:  
*     
* (C) Copyright 2004 by Spectrum Digital Incorporated
* All rights reserved
*
*H*****************************************************************************/

#include "DSP280x_Device.h"
#include "r2808cfg.h"


volatile unsigned Error_Can  = 0;		// The memory errors
static struct ECAN_REGS ECanaShadow;
static struct ECAN_REGS ECanbShadow;

int can_config()
{		
	long     Timeout;
	unsigned CCE;
	
	EALLOW;
		
/* Configure eCAN RX and TX pins for eCAN transmissions using eCAN regs*/  
    
    ECanaRegs.CANTIOC.bit.TXFUNC = 1;
    ECanaRegs.CANRIOC.bit.RXFUNC = 1;  
    
    ECanbRegs.CANTIOC.bit.TXFUNC = 1;
    ECanbRegs.CANRIOC.bit.RXFUNC = 1;   

/* Configure eCAN for HECC mode - (reqd to access mailboxes 16 thru 31) */
									// HECC mode also enables time-stamping feature
	
	ECanaShadow.CANMC.all = ECanaRegs.CANMC.all;
	ECanaShadow.CANMC.bit.SCB = 1;				
	ECanaRegs.CANMC.all = ECanaShadow.CANMC.all;
	
	ECanbShadow.CANMC.all = ECanbRegs.CANMC.all;
	ECanbShadow.CANMC.bit.SCB = 1;				
	ECanbRegs.CANMC.all = ECanbShadow.CANMC.all;
	
/* Initialize all bits of 'Master Control Field' to zero */
// Some bits of MSGCTRL register come up in an unknown state. For proper operation,
// all bits (including reserved bits) of MSGCTRL must be initialized to zero
 
    ECanaMboxes.MBOX0.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX1.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX2.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX3.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX4.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX5.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX6.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX7.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX8.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX9.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX10.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX11.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX12.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX13.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX14.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX15.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX16.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX17.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX18.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX19.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX20.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX21.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX22.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX23.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX24.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX25.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX26.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX27.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX28.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX29.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX30.MSGCTRL.all = 0x00000000;
    ECanaMboxes.MBOX31.MSGCTRL.all = 0x00000000;
    
    ECanbMboxes.MBOX0.MSGCTRL.all = 0x00000000;
    ECanbMboxes.MBOX1.MSGCTRL.all = 0x00000000;
    ECanbMboxes.MBOX2.MSGCTRL.all = 0x00000000;
    ECanbMboxes.MBOX3.MSGCTRL.all = 0x00000000;
    ECanbMboxes.MBOX4.MSGCTRL.all = 0x00000000;
    ECanbMboxes.MBOX5.MSGCTRL.all = 0x00000000;
    ECanbMboxes.MBOX6.MSGCTRL.all = 0x00000000;
    ECanbMboxes.MBOX7.MSGCTRL.all = 0x00000000;
    ECanbMboxes.MBOX8.MSGCTRL.all = 0x00000000;
    ECanbMboxes.MBOX9.MSGCTRL.all = 0x00000000;
    ECanbMboxes.MBOX10.MSGCTRL.all = 0x00000000;
    ECanbMboxes.MBOX11.MSGCTRL.all = 0x00000000;
    ECanbMboxes.MBOX12.MSGCTRL.all = 0x00000000;
    ECanbMboxes.MBOX13.MSGCTRL.all = 0x00000000;
    ECanbMboxes.MBOX14.MSGCTRL.all = 0x00000000;
    ECanbMboxes.MBOX15.MSGCTRL.all = 0x00000000;
    ECanbMboxes.MBOX16.MSGCTRL.all = 0x00000000;
    ECanbMboxes.MBOX17.MSGCTRL.all = 0x00000000;
    ECanbMboxes.MBOX18.MSGCTRL.all = 0x00000000;
    ECanbMboxes.MBOX19.MSGCTRL.all = 0x00000000;
    ECanbMboxes.MBOX20.MSGCTRL.all = 0x00000000;
    ECanbMboxes.MBOX21.MSGCTRL.all = 0x00000000;
    ECanbMboxes.MBOX22.MSGCTRL.all = 0x00000000;
    ECanbMboxes.MBOX23.MSGCTRL.all = 0x00000000;
    ECanbMboxes.MBOX24.MSGCTRL.all = 0x00000000;
    ECanbMboxes.MBOX25.MSGCTRL.all = 0x00000000;
    ECanbMboxes.MBOX26.MSGCTRL.all = 0x00000000;
    ECanbMboxes.MBOX27.MSGCTRL.all = 0x00000000;
    ECanbMboxes.MBOX28.MSGCTRL.all = 0x00000000;
    ECanbMboxes.MBOX29.MSGCTRL.all = 0x00000000;
    ECanbMboxes.MBOX30.MSGCTRL.all = 0x00000000;
    ECanbMboxes.MBOX31.MSGCTRL.all = 0x00000000;

// TAn, RMPn, GIFn bits are all zero upon reset and are cleared again
//	as a matter of precaution. 

/* Clear all TAn bits */      
	
	ECanaRegs.CANTA.all	= 0xFFFFFFFF;
	ECanbRegs.CANTA.all	= 0xFFFFFFFF;

/* Clear all RMPn bits */      
	
	ECanaRegs.CANRMP.all = 0xFFFFFFFF;
	ECanbRegs.CANRMP.all = 0xFFFFFFFF;
	
/* Clear all interrupt flag bits */      
	
	ECanaRegs.CANGIF0.all = 0xFFFFFFFF;
	ECanaRegs.CANGIF1.all = 0xFFFFFFFF;
	ECanbRegs.CANGIF0.all = 0xFFFFFFFF;
	ECanbRegs.CANGIF1.all = 0xFFFFFFFF;
	
/* Configure bit timing parameters for eCANA*/

	ECanaShadow.CANMC.all = ECanaRegs.CANMC.all;
	ECanaShadow.CANMC.bit.CCR = 1 ;            // Set CCR = 1
    ECanaRegs.CANMC.all = ECanaShadow.CANMC.all;
    
    //while(ECanaRegs.CANES.bit.CCE != 1 ) {}   // Wait for CCE bit to be set..
        Timeout = 100;
    do
    {
    	CCE = ECanaRegs.CANES.bit.CCE;
    	DELAY_US(1);
    }while( ( Timeout-- != 0 ) && ( CCE != 1 ));
    	
    if( Timeout <= 0 )
    {
        EDIS;
    	return( -1 );
    }
    
    ECanaShadow.CANBTC.all = 0;
    ECanaShadow.CANBTC.bit.BRPREG = 9;
    ECanaShadow.CANBTC.bit.TSEG2REG = 1;
    ECanaShadow.CANBTC.bit.TSEG1REG = 6; 
    ECanaShadow.CANBTC.bit.SAM = 1;
    ECanaRegs.CANBTC.all = ECanaShadow.CANBTC.all;
    
    ECanaShadow.CANMC.all = ECanaRegs.CANMC.all;
	ECanaShadow.CANMC.bit.CCR = 0 ;            // Set CCR = 0
    ECanaRegs.CANMC.all = ECanaShadow.CANMC.all;
    
    //while(ECanaRegs.CANES.bit.CCE == !0 ) {}   // Wait for CCE bit to be cleared..
   
    do
    {
    	CCE = ECanaRegs.CANES.bit.CCE;
    	DELAY_US(1);
    }while( ( Timeout-- != 0 ) && ( CCE != 0 ));
    	
    if( Timeout <= 0 )
    {
    	EDIS;
    	return( -1 );
    }
    
/* Configure bit timing parameters for eCANB*/

	ECanbShadow.CANMC.all = ECanbRegs.CANMC.all;
	ECanbShadow.CANMC.bit.CCR = 1 ;            // Set CCR = 1
    ECanbRegs.CANMC.all = ECanbShadow.CANMC.all;
    
    //while(ECanbRegs.CANES.bit.CCE != 1 ) {}   // Wait for CCE bit to be set..
    
    do
    {
    	CCE = ECanbRegs.CANES.bit.CCE;
    	DELAY_US(1);
    }while( ( Timeout-- != 0 ) && ( CCE != 1 ));
    	
    if( Timeout <= 0 )
    {
    	EDIS;
    	return( -1 );
    }
    
    ECanbShadow.CANBTC.all = 0;
    ECanbShadow.CANBTC.bit.BRPREG = 9;
    ECanbShadow.CANBTC.bit.TSEG2REG = 1;
    ECanbShadow.CANBTC.bit.TSEG1REG = 6; 
    ECanbShadow.CANBTC.bit.SAM = 1;
    ECanbRegs.CANBTC.all = ECanbShadow.CANBTC.all;
    
    ECanbShadow.CANMC.all = ECanbRegs.CANMC.all;
	ECanbShadow.CANMC.bit.CCR = 0 ;            // Set CCR = 0
    ECanbRegs.CANMC.all = ECanbShadow.CANMC.all;
    
    //while(ECanbRegs.CANES.bit.CCE == !0 ) {}   // Wait for CCE bit to be cleared..
    do
    {
    	CCE = ECanbRegs.CANES.bit.CCE;
    	DELAY_US(1);
    }while( ( Timeout-- != 0 ) && ( CCE != 0 ));
    	
    if( Timeout <= 0 )
    {
    	EDIS;
    	return( -1 );
    }	
/* Disable all Mailboxes  */
	
 	ECanaRegs.CANME.all = 0;		// Required before writing the MSGIDs
 	ECanbRegs.CANME.all = 0;		// Required before writing the MSGIDs
 	
 	EDIS;
 	return(0);
	 	
}

#define TXCOUNT  100  // Transmission will take place (TXCOUNT) times..

int CAN_LoopBack(void)
{

	long      i;
	int  Ta;
	long Timeout;
	   
	if( can_config() != 0 )
	{
		EDIS;
		Error_Can = (unsigned)-1;
		return( -1 );
	}
	 	
	/* Write to the MSGID field  */	
	ECanaMboxes.MBOX25.MSGID.all = 0x95555555; // Extended Identifier
	   
	/* Configure Mailbox under test as a Transmit mailbox */	
	ECanaShadow.CANMD.all = ECanaRegs.CANMD.all;	
	ECanaShadow.CANMD.bit.MD25 = 0;
	ECanaRegs.CANMD.all = ECanaShadow.CANMD.all; 
	
	/* Enable Mailbox under test */	
	ECanaShadow.CANME.all = ECanaRegs.CANME.all;	
	ECanaShadow.CANME.bit.ME25 = 1;
	ECanaRegs.CANME.all = ECanaShadow.CANME.all; 
	
	/* Write to DLC field in Master Control reg */	
	ECanaMboxes.MBOX25.MSGCTRL.bit.DLC = 8;
	
	/* Write to the mailbox RAM field */
	ECanaMboxes.MBOX25.MDL.all = 0x55555555;
	ECanaMboxes.MBOX25.MDH.all = 0x55555555;	 
	 	
	/* Begin transmitting.  We are not really checking the dat.  Just that
	*  the xmit/recv protocol is working which ensures both rx/tx are 
	*  functional.
	*/
	for(i=0; i < TXCOUNT; i++)			  	
	{
		ECanaShadow.CANTRS.all = 0; 	
		ECanaShadow.CANTRS.bit.TRS25 = 1;     // Set TRS for mailbox under test       
		ECanaRegs.CANTRS.all = ECanaShadow.CANTRS.all; 
		
		Timeout = 30;
		do{
		
			Ta = ( ECanaRegs.CANTA.bit.TA25 == 0 ) ? 0:1;// Wait for TA5 bit to be set..	
			DELAY_US(10);
		}while( ( Timeout-- > 0) && (!Ta) );
		
		if( Timeout <= 0 )
		{
			Error_Can = (unsigned)-1;
			return( -1 );
		}
				    
		ECanaShadow.CANTA.all = 0; 	
		ECanaShadow.CANTA.bit.TA25 = 1;     	 // Clear TA5       
		ECanaRegs.CANTA.all = ECanaShadow.CANTA.all;
	}  
	
	return(0);
}