clkdiv.qws

来自「EPM240CPLD的原理图」· QWS 代码 · 共 22 行

[ProjectWorkspace]
ptn_Child1=Frames
[ProjectWorkspace.Frames]
ptn_Child1=ChildFrames
[ProjectWorkspace.Frames.ChildFrames]
ptn_Child1=Document-0
ptn_Child2=Document-1
ptn_Child3=Document-2
[ProjectWorkspace.Frames.ChildFrames.Document-0]
ptn_Child1=ViewFrame-0
[ProjectWorkspace.Frames.ChildFrames.Document-0.ViewFrame-0]
DocPathName=../../../../../../../../altera/70/quartus/bin/pin_planner.ppl
DocumentCLSID={428be327-2a68-4a16-a2c9-0502a8811afc}
WindowPlacement=MCAAAAAAAAAAAAAABAAAAAAAPPPPPPPPPPPPPPPPMPPPPPPPCOPPPPPPAAAAAAAAAAAAAAAAJMDAAAAADGBAAAAA
IsChildFrameDetached=False
IsActiveChildFrame=False
ptn_Child1=StateMap
[ProjectWorkspace.Frames.ChildFrames.Document-0.ViewFrame-0.StateMap]
AFC_CMP_AP_NAME=clkdiv
AFC_PROJ_DB_PATH=C:/Documents and Settings/admin/桌面/1230/EPM资料/实验例程以及说明文档/1、分频计数器/clkdivverilog/db/clkdiv.quartus_db
AFC_IN_REPORT=False