led_seg7.fit.summary

EPM240CPLD的原理图

Fitter Status : Successful - Tue Dec 30 15:58:04 2008
Quartus II Version : 7.0 Build 33 02/05/2007 SJ Full Version
Revision Name : led_seg7
Top-level Entity Name : led_seg7
Family : MAX II
Device : EPM240T100C5
Timing Models : Final
Total logic elements : 45 / 240 ( 19 % )
Total pins : 11 / 80 ( 14 % )
Total virtual pins : 0
UFM blocks : 0 / 1 ( 0 % )