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📄 csl_chiphal.h

📁 麦克风阵列的TLS自适应波束形成算法仿真
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    |_PER_FDEFAULT(CHIP,FMCR,M1UNDER)\    |_PER_FDEFAULT(CHIP,FMCR,M1INEX)\    |_PER_FDEFAULT(CHIP,FMCR,M1OVER)\    |_PER_FDEFAULT(CHIP,FMCR,M1INFO)\    |_PER_FDEFAULT(CHIP,FMCR,M1INVAL)\    |_PER_FDEFAULT(CHIP,FMCR,M1DEN2)\    |_PER_FDEFAULT(CHIP,FMCR,M1DEN1)\    |_PER_FDEFAULT(CHIP,FMCR,M1NAN2)\    |_PER_FDEFAULT(CHIP,FMCR,M1NAN1)\  )  #define CHIP_FMCR_MK(m2rmode,m2under,m2index,m2over,m2info,m2inval,\    m2den2,m2den1,m2nan2,m2nan1,m1rmode,m1under,m1inex,m1over,m1info,\    m1inval,m1den2,m1den1,m1nan2,m1nan1) (Uint32)( \     _PER_FMK(CHIP,FMCR,M2RMODE,m2rmode)\    |_PER_FMK(CHIP,FMCR,M2UNDER,m2under)\    |_PER_FMK(CHIP,FMCR,M2INEX,m2inex)\    |_PER_FMK(CHIP,FMCR,M2OVER,m2over)\    |_PER_FMK(CHIP,FMCR,M2INFO,m2info)\    |_PER_FMK(CHIP,FMCR,M2INVAL,m2inval)\    |_PER_FMK(CHIP,FMCR,M2DEN2,m2den2)\    |_PER_FMK(CHIP,FMCR,M2DEN1,m2den1)\    |_PER_FMK(CHIP,FMCR,M2NAN2,m2nan2)\    |_PER_FMK(CHIP,FMCR,M2NAN1,m2nan1)\    |_PER_FMK(CHIP,FMCR,M1RMODE,m1rmode)\    |_PER_FMK(CHIP,FMCR,M1UNDER,m1under)\    |_PER_FMK(CHIP,FMCR,M1INEX,m1inex)\    |_PER_FMK(CHIP,FMCR,M1OVER,m1over)\    |_PER_FMK(CHIP,FMCR,M1INFO,m1info)\    |_PER_FMK(CHIP,FMCR,M1INVAL,m1inval)\    |_PER_FMK(CHIP,FMCR,M1DEN2,m1den2)\    |_PER_FMK(CHIP,FMCR,M1DEN1,m1den1)\    |_PER_FMK(CHIP,FMCR,M1NAN2,m1nan2)\    |_PER_FMK(CHIP,FMCR,M1NAN1,m1nan1)\  )  #define _CHIP_FMCR_FGET(FIELD)\    _PER_CFGET(CHIP,FMCR,##FIELD)  #define _CHIP_FMCR_FSET(FIELD,field)\    _PER_CFSET(CHIP,FMCR,##FIELD,field)  #define _CHIP_FMCR_FSETS(FIELD,SYM)\    _PER_CFSETS(CHIP,FMCR,##FIELD,##SYM)#endif/******************************************************************************\* _____________________* |                   |* |  D I E R          |* |___________________|** DIER - DSP interrupt exception register (1)** FIELDS (msb -> lsb)** (1) only supported on C64x family of devices*\******************************************************************************/#if (C64_SUPPORT)  extern cregister volatile unsigned int DIER;#endif/******************************************************************************\* _____________________* |                   |* |  E M              |* |___________________|** EM - exception mask register (1)** FIELDS (msb -> lsb)** (1) only supported on C64x family of devices*\******************************************************************************/#if (C64_SUPPORT)  extern cregister volatile unsigned int EM;#endif/******************************************************************************\* _____________________* |                   |* |  E R              |* |___________________|** ER - exception flag register (1)** FIELDS (msb -> lsb)** (1) only supported on C64x family of devices*\******************************************************************************/#if (C64_SUPPORT)  extern cregister volatile unsigned int ER;#endif/******************************************************************************\* _____________________* |                   |* |  G F P G F R      |* |___________________|** GFPGFR - Galois field polynomial generator function register (1)** FIELDS (msb -> lsb)* (rw) SIZE* (rw) POLY* (1) only supported on C64x family of devices*\******************************************************************************/#if (C64_SUPPORT)  extern cregister volatile unsigned int GFPGFR;    #define _CHIP_GFPGFR_POLY_MASK          0x000000FFu  #define _CHIP_GFPGFR_POLY_SHIFT         0x00000000u  #define  CHIP_GFPGFR_POLY_DEFAULT       0x0000001Du  #define  CHIP_GFPGFR_POLY_OF(x)         _VALUEOF(x)  #define _CHIP_GFPGFR_SIZE_MASK          0x07000000u  #define _CHIP_GFPGFR_SIZE_SHIFT         0x00000018u  #define  CHIP_GFPGFR_SIZE_DEFAULT       0x00000007u  #define  CHIP_GFPGFR_SIZE_OF(x)         _VALUEOF(x)  #define  CHIP_GFPGFR_OF(x)              _VALUEOF(x)    #define CHIP_GFPGFR_DEFAULT (Uint32)( \     _PER_FDEFAULT(CHIP,GFPGFR,SIZE) \    |_PER_FDEFAULT(CHIP,GFPGFR,POLY) \  )      #define CHIP_GFPGFR_RMK(size,poly) (Uint32)( \     _PER_FMK(CHIP,GFPGFR,SIZE,size) \    |_PER_FMK(CHIP,GFPGFR,POLY,poly) \  )    #define _CHIP_GFPGFR_FGET(FIELD)\    _PER_CFGET(CHIP,GFPGFR,##FIELD)  #define _CHIP_GFPGFR_FSET(FIELD,field)\    _PER_CFSET(CHIP,GFPGFR,##FIELD,field)  #define _CHIP_GFPGFR_FSETS(FIELD,SYM)\    _PER_CFSETS(CHIP,GFPGFR,##FIELD,##SYM)#endif/******************************************************************************\* _____________________* |                   |* |  D E V C F G      |* |___________________|** DEVCFG - Device Configuration register (1)** FIELDS (msb -> lsb)  CHIP_6713* (rw) EKSRC* (rw) TOUT1SEL* (rw) TOUT0SEL* (rw) MCBSP0DIS* (rw) MCBSP1DIS* (rw) GPIO1EN (only for CHIP_DA610) * * FIELDS (msb -> lsb)  CHIP_DM642 
* (rw) VP2EN  * (rw) VP1EN* (rw) VP0EN* (rw) I2C0EN* (rw) MCBSP1EN
* (rw) MCBSP0EN
* (rw) MCASP0EN  
* 
* FIELDS (msb -> lsb)  CHIP_6412 
* (rw) I2C0EN
* (rw) MCBSP1EN
* (rw) MCBSP0EN
* 
*\******************************************************************************/  #if (CHIP_DA610)    #define   _CHIP_DEVCFG_ADDR              0x019C0200u  #define   _CHIP_DEVCFG_OFFSET             0  #define _CHIP_DEVCFG_GPIO1EN_MASK        0x00010000u  #define _CHIP_DEVCFG_GPIO1EN_SHIFT       0x0000000Fu  #define  CHIP_DEVCFG_GPIO1EN_DEFAULT     0x00000000u  #define  CHIP_DEVCFG_GPIO1EN_OF(x)       _VALUEOF(x)  #define  CHIP_DEVCFG_GPIO1EN_0           0x00000000u  #define  CHIP_DEVCFG_GPIO1EN_1           0x00000001u  #define _CHIP_DEVCFG_EKSRC_MASK          0x00000010u  #define _CHIP_DEVCFG_EKSRC_SHIFT         0x00000004u  #define  CHIP_DEVCFG_EKSRC_DEFAULT       0x00000000u  #define  CHIP_DEVCFG_EKSRC_OF(x)         _VALUEOF(x)  #define  CHIP_DEVCFG_EKSRC_SYSCLK3       0x00000000u  #define  CHIP_DEVCFG_EKSRC_ECLKIN        0x00000001u  #define _CHIP_DEVCFG_TOUT1SEL_MASK       0x00000008u  #define _CHIP_DEVCFG_TOUT1SEL_SHIFT      0x00000003u  #define  CHIP_DEVCFG_TOUT1SEL_DEFAULT    0x00000000u  #define  CHIP_DEVCFG_TOUT1SEL_OF(x)       _VALUEOF(x)  #define  CHIP_DEVCFG_TOUT1SEL_TOUT1PIN   0x00000000u  #define  CHIP_DEVCFG_TOUT1SEL_MCASPPIN   0x00000001u  #define _CHIP_DEVCFG_TOUT0SEL_MASK       0x00000004u  #define _CHIP_DEVCFG_TOUT0SEL_SHIFT      0x00000002u  #define  CHIP_DEVCFG_TOUT0SEL_DEFAULT    0x00000000u  #define  CHIP_DEVCFG_TOUT0SEL_OF(x)       _VALUEOF(x)  #define  CHIP_DEVCFG_TOUT0SEL_TOUT0PIN   0x00000000u  #define  CHIP_DEVCFG_TOUT0SEL_MCASPPIN   0x00000001u  #define _CHIP_DEVCFG_MCBSP0DIS_MASK       0x00000002u  #define _CHIP_DEVCFG_MCBSP0DIS_SHIFT      0x00000001u  #define  CHIP_DEVCFG_MCBSP0DIS_DEFAULT    0x00000000u  #define  CHIP_DEVCFG_MCBSP0DIS_OF(x)       _VALUEOF(x)  #define  CHIP_DEVCFG_MCBSP0DIS_0          0x00000000u  #define  CHIP_DEVCFG_MCBSP0DIS_1          0x00000001u  #define _CHIP_DEVCFG_MCBSP1DIS_MASK         0x00000001u  #define _CHIP_DEVCFG_MCBSP1DIS_SHIFT        0x00000000u  #define  CHIP_DEVCFG_MCBSP1DIS_DEFAULT      0x00000000u  #define  CHIP_DEVCFG_MCBSP1DIS_OF(x)        _VALUEOF(x)  #define  CHIP_DEVCFG_MCBSP1DIS_0            0x00000000u  #define  CHIP_DEVCFG_MCBSP1DIS_1            0x00000001u    #define  CHIP_DEVCFG_OF(x)              _VALUEOF(x)    #define CHIP_DEVCFG_DEFAULT (Uint32)( \     _PER_FDEFAULT(CHIP,DEVCFG,EKSRC) \    |_PER_FDEFAULT(CHIP,DEVCFG,TOUT1SEL) \    |_PER_FDEFAULT(CHIP,DEVCFG,TOUT0SEL) \    |_PER_FDEFAULT(CHIP,DEVCFG,MCBSP0DIS) \    |_PER_FDEFAULT(CHIP,DEVCFG,MCBSP1DIS) \    |_PER_FDEFAULT(CHIP,DEVCFG,GPIO1EN) \ )      #define CHIP_DEVCFG_RMK(eksrc,tout1sel,tout0sel,mcbsp0dis,mcbsp1dis,\                          gpio1en ) (Uint32)( \      _PER_FMK(CHIP,DEVCFG,EKSRC,eksrc) \    |_PER_FMK(CHIP,DEVCFG,TOUT1SEL,tout1sel) \    |_PER_FMK(CHIP,DEVCFG,TOUT0SEL,tout0sel) \    |_PER_FMK(CHIP,DEVCFG,MCBSP0DIS,mcbsp0dis) \    |_PER_FMK(CHIP,DEVCFG,MCBSP1DIS,mcbsp1dis) \    |_PER_FMK(CHIP,DEVCFG,GPIO1EN,gpio1en) \)#elif (CHIP_6713)  #define   _CHIP_DEVCFG_ADDR              0x019C0200u  #define   _CHIP_DEVCFG_OFFSET             0  #define _CHIP_DEVCFG_EKSRC_MASK          0x00000010u  #define _CHIP_DEVCFG_EKSRC_SHIFT         0x00000004u  #define  CHIP_DEVCFG_EKSRC_DEFAULT       0x00000000u  #define  CHIP_DEVCFG_EKSRC_OF(x)         _VALUEOF(x)  #define  CHIP_DEVCFG_EKSRC_SYSCLK3       0x00000000u  #define  CHIP_DEVCFG_EKSRC_ECLKIN        0x00000001u  #define _CHIP_DEVCFG_TOUT1SEL_MASK       0x00000008u  #define _CHIP_DEVCFG_TOUT1SEL_SHIFT      0x00000003u  #define  CHIP_DEVCFG_TOUT1SEL_DEFAULT    0x00000000u  #define  CHIP_DEVCFG_TOUT1SEL_OF(x)       _VALUEOF(x)  #define  CHIP_DEVCFG_TOUT1SEL_TOUT1PIN   0x00000000u  #define  CHIP_DEVCFG_TOUT1SEL_MCASPPIN   0x00000001u  #define _CHIP_DEVCFG_TOUT0SEL_MASK       0x00000004u  #define _CHIP_DEVCFG_TOUT0SEL_SHIFT      0x00000002u  #define  CHIP_DEVCFG_TOUT0SEL_DEFAULT    0x00000000u  #define  CHIP_DEVCFG_TOUT0SEL_OF(x)       _VALUEOF(x)  #define  CHIP_DEVCFG_TOUT0SEL_TOUT0PIN   0x00000000u  #define  CHIP_DEVCFG_TOUT0SEL_MCASPPIN   0x00000001u  #define _CHIP_DEVCFG_MCBSP0DIS_MASK      0x00000002u  #define _CHIP_DEVCFG_MCBSP0DIS_SHIFT     0x00000001u  #define  CHIP_DEVCFG_MCBSP0DIS_DEFAULT   0x00000000u  #define  CHIP_DEVCFG_MCBSP0DIS_OF(x)     _VALUEOF(x)  #define  CHIP_DEVCFG_MCBSP0DIS_0         0x00000000u  #define  CHIP_DEVCFG_MCBSP0DIS_1         0x00000001u  #define _CHIP_DEVCFG_MCBSP1DIS_MASK      0x00000001u  #define _CHIP_DEVCFG_MCBSP1DIS_SHIFT     0x00000000u  #define  CHIP_DEVCFG_MCBSP1DIS_DEFAULT   0x00000000u  #define  CHIP_DEVCFG_MCBSP1DIS_OF(x)     _VALUEOF(x)  #define  CHIP_DEVCFG_MCBSP1DIS_0         0x00000000u  #define  CHIP_DEVCFG_MCBSP1DIS_1         0x00000001u  #define  CHIP_DEVCFG_OF(x)              _VALUEOF(x)    #define CHIP_DEVCFG_DEFAULT (Uint32)( \     _PER_FDEFAULT(CHIP,DEVCFG,EKSRC) \    |_PER_FDEFAULT(CHIP,DEVCFG,TOUT1SEL) \    |_PER_FDEFAULT(CHIP,DEVCFG,TOUT0SEL) \    |_PER_FDEFAULT(CHIP,DEVCFG,MCBSP0DIS) \    |_PER_FDEFAULT(CHIP,DEVCFG,MCBSP1DIS) \ )      #define CHIP_DEVCFG_RMK(eksrc,tout1sel,tout0sel,mcbsp0dis,mcbsp1dis\                          ) (Uint32)( \      _PER_FMK(CHIP,DEVCFG,EKSRC,eksrc) \    |_PER_FMK(CHIP,DEVCFG,TOUT1SEL,tout1sel) \    |_PER_FMK(CHIP,DEVCFG,TOUT0SEL,tout0sel) \    |_PER_FMK(CHIP,DEVCFG,MCBSP0DIS,mcbsp0dis) \    |_PER_FMK(CHIP,DEVCFG,MCBSP1DIS,mcbsp1dis) \)#endif#if (CHIP_DM642 || CHIP_6412)  #define   _CHIP_DEVCFG_ADDR                0x01B3F000u  #define   _CHIP_DEVCFG_OFFSET              0#if (CHIP_DM642)
  #define _CHIP_DEVCFG_VP2EN_MASK            0x00000040u  #define _CHIP_DEVCFG_VP2EN_SHIFT           0x00000006u  #define  CHIP_DEVCFG_VP2EN_DEFAULT         0x00000000u  #define  CHIP_DEVCFG_VP2EN_OF(x)           _VALUEOF(x)  #define  CHIP_DEVCFG_VP2EN_DISABLE         0x00000000u  #define  CHIP_DEVCFG_VP2EN_ENABLE          0x00000001u   #define _CHIP_DEVCFG_VP1EN_MASK            0x00000020u  #define _CHIP_DEVCFG_VP1EN_SHIFT           0x00000005u  #define  CHIP_DEVCFG_VP1EN_DEFAULT         0x00000000u  #define  CHIP_DEVCFG_VP1EN_OF(x)           _VALUEOF(x)  #define  CHIP_DEVCFG_VP1EN_DISABLE         0x00000000u  #define  CHIP_DEVCFG_VP1EN_ENABLE          0x00000001u  #define _CHIP_DEVCFG_VP0EN_MASK            0x00000010u  #define _CHIP_DEVCFG_VP0EN_SHIFT           0x00000004u  #define  CHIP_DEVCFG_VP0EN_DEFAULT         0x00000000u  #define  CHIP_DEVCFG_VP0EN_OF(x)           _VALUEOF(x)  #define  CHIP_DEVCFG_VP0EN_DISABLE         0x00000000u  #define  CHIP_DEVCFG_VP0EN_ENABLE          0x00000001u#endif
  #define _CHIP_DEVCFG_I2C0EN_MASK           0x00000008u  #define _CHIP_DEVCFG_I2C0EN_SHIFT          0x00000003u  #define  CHIP_DEVCFG_I2C0EN_DEFAULT        0x00000000u  #define  CHIP_DEVCFG_I2C0EN_OF(x)          _VALUEOF(x)  #define  CHIP_DEVCFG_I2C0EN_DISABLE        0x00000000u  #define  CHIP_DEVCFG_I2C0EN_ENABLE         0x00000001u  #define _CHIP_DEVCFG_MCBSP1EN_MASK         0x00000004u  #define _CHIP_DEVCFG_MCBSP1EN_SHIFT        0x00000002u  #define  CHIP_DEVCFG_MCBSP1EN_DEFAULT      0x00000001u  #define  CHIP_DEVCFG_MCBSP1EN_OF(x)        _VALUEOF(x)  #define  CHIP_DEVCFG_MCBSP1EN_DISABLE      0x00000000u  #define  CHIP_DEVCFG_MCBSP1EN_ENABLE       0x00000001u   #define _CHIP_DEVCFG_MCBSP0EN_MASK         0x00000002u  #define _CHIP_DEVCFG_MCBSP0EN_SHIFT        0x00000001u  #define  CHIP_DEVCFG_MCBSP0EN_DEFAULT      0x00000001u  #define  CHIP_DEVCFG_MCBSP0EN_OF(x)        _VALUEOF(x)  #define  CHIP_DEVCFG_MCBSP0EN_DISABLE      0x00000000u  #define  CHIP_DEVCFG_MCBSP0EN_ENABLE       0x00000001u
#if (CHIP_DM642)   #define _CHIP_DEVCFG_MCASP0EN_MASK         0x00000001u  #define _CHIP_DEVCFG_MCASP0EN_SHIFT        0x00000000u  #define  CHIP_DEVCFG_MCASP0EN_DEFAULT      0x00000000u  #define  CHIP_DEVCFG_MCASP0EN_OF(x)         _VALUEOF(x)  #define  CHIP_DEVCFG_MCASP0EN_DISABLE      0x00000000u  #define  CHIP_DEVCFG_MCASP0EN_ENABLE       0x00000001u#endif      #define  CHIP_DEVCFG_OF(x)              _VALUEOF(x)
#if (CHIP_DM642)  
  #define CHIP_DEVCFG_DEFAULT (Uint32)( \
     _PER_FDEFAULT(CHIP,DEVCFG,VP2EN) \
    |_PER_FDEFAULT(CHIP,DEVCFG,VP1EN) \
    |_PER_FDEFAULT(CHIP,DEVCFG,VP0EN) \
    |_PER_FDEFAULT(CHIP,DEVCFG,I2C0EN) \
    |_PER_FDEFAULT(CHIP,DEVCFG,MCBSP1EN) \
    |_PER_FDEFAULT(CHIP,DEVCFG,MCBSP0EN) \
    |_PER_FDEFAULT(CHIP,DEVCFG,MCASP0EN) \
   )  
  

 #define CHIP_DEVCFG_RMK(vp2en,vp1en,vp0en,i2c0en,mcbsp1en,mcbsp0en,mcasp0en) (Uint32)( \
     _PER_FMK(CHIP,DEVCFG,VP2EN,vp2en) \
    |_PER_FMK(CHIP,DEVCFG,VP1EN,vp1en) \
    |_PER_FMK(CHIP,DEVCFG,VP0EN,vp0en) \
    |_PER_FMK(CHIP,DEVCFG,I2C0EN,i2c0en) \
    |_PER_FMK(CHIP,DEVCFG,MCBSP1EN,mcbsp1en) \
    |_PER_FMK(CHIP,DEVCFG,MCBSP0EN,mc

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