csl_chiphal.h

麦克风阵列的TLS自适应波束形成算法仿真

  #define  CHIP_CSR_DCC_OF(x)          _VALUEOF(x)
  #define  CHIP_CSR_DCC_MAPPED         0x00000000u
  #define  CHIP_CSR_DCC_ENABLE         0x00000002u
  #define  CHIP_CSR_DCC_FREEZE         0x00000003u
  #define  CHIP_CSR_DCC_BYPASS         0x00000004u

  #define _CHIP_CSR_PGIE_MASK          0x00000002u
  #define _CHIP_CSR_PGIE_SHIFT         0x00000001u
  #define  CHIP_CSR_PGIE_DEFAULT       0x00000000u
  #define  CHIP_CSR_PGIE_OF(x)         _VALUEOF(x)
  #define  CHIP_CSR_PGIE_0             0x00000000u
  #define  CHIP_CSR_PGIE_1             0x00000001u

  #define _CHIP_CSR_GIE_MASK           0x00000001u
  #define _CHIP_CSR_GIE_SHIFT          0x00000000u
  #define  CHIP_CSR_GIE_DEFAULT        0x00000000u
  #define  CHIP_CSR_GIE_OF(x)          _VALUEOF(x)
  #define  CHIP_CSR_GIE_0              0x00000000u
  #define  CHIP_CSR_GIE_1              0x00000001u

  #define  CHIP_CSR_OF(x)              _VALUEOF(x)

  #define CHIP_CSR_DEFAULT (Uint32)( \
     _PER_FDEFAULT(CHIP,CSR,CPUID) \
    |_PER_FDEFAULT(CHIP,CSR,REVID) \
    |_PER_FDEFAULT(CHIP,CSR,PWRD) \
    |_PER_FDEFAULT(CHIP,CSR,SAT) \
    |_PER_FDEFAULT(CHIP,CSR,EN) \
    |_PER_FDEFAULT(CHIP,CSR,PCC) \
    |_PER_FDEFAULT(CHIP,CSR,DCC) \
    |_PER_FDEFAULT(CHIP,CSR,PGIE) \
    |_PER_FDEFAULT(CHIP,CSR,GIE) \
  )

  #define CHIP_CSR_RMK(pwrd,pcc,dcc,pgie,gie) (Uint32)( \
     _PER_FMK(CHIP,CSR,PWRD,pwrd) \
    |_PER_FMK(CHIP,CSR,PCC,pcc) \
    |_PER_FMK(CHIP,CSR,DCC,dcc) \
    |_PER_FMK(CHIP,CSR,PGIE,pgie) \
    |_PER_FMK(CHIP,CSR,GIE,gie) \
  )

  #define _CHIP_CSR_FGET(FIELD)\
    _PER_CFGET(CHIP,CSR,##FIELD)

  #define _CHIP_CSR_FSET(FIELD,field)\
    _PER_CFSET(CHIP,CSR,##FIELD,field)

  #define _CHIP_CSR_FSETS(FIELD,SYM)\
    _PER_CFSETS(CHIP,CSR,##FIELD,##SYM)


/******************************************************************************\
* _____________________
* |                   |
* |  I F R            |
* |___________________|
*
* IFR - interruppt flag register
*
* FIELDS (msb -> lsb)
* (rw) IF
*
\******************************************************************************/
  extern far cregister volatile unsigned int IFR;

  #define _CHIP_IFR_IF_MASK          0x0000FFFFu
  #define _CHIP_IFR_IF_SHIFT         0x00000000u
  #define  CHIP_IFR_IF_DEFAULT       0x00000000u
  #define  CHIP_IFR_IF_OF(x)         _VALUEOF(x)

  #define  CHIP_IFR_OF(x)            _VALUEOF(x)

  #define CHIP_IFR_DEFAULT (Uint32)( \
     _PER_FDEFAULT(CHIP,IFR,IF)\
  )

  #define CHIP_IFR_RMK(if) (Uint32)( \
     _PER_FMK(CHIP,IFR,IF,if)\
  )

  #define _CHIP_IFR_FGET(FIELD)\
    _PER_CFGET(CHIP,IFR,##FIELD)

  #define _CHIP_IFR_FSET(FIELD,field)\
    _PER_CFSET(CHIP,IFR,##FIELD,field)

  #define _CHIP_IFR_FSETS(FIELD,SYM)\
    _PER_CFSETS(CHIP,IFR,##FIELD,##SYM)


/******************************************************************************\
* _____________________
* |                   |
* |  I S R            |
* |___________________|
*
* ISR - interruppt set register
*
* FIELDS (msb -> lsb)
* (w) IS
*
\******************************************************************************/
  extern far cregister volatile unsigned int ISR;

  #define _CHIP_ISR_IS_MASK          0x0000FFFFu
  #define _CHIP_ISR_IS_SHIFT         0x00000000u
  #define  CHIP_ISR_IS_DEFAULT       0x00000000u
  #define  CHIP_ISR_IS_OF(x)         _VALUEOF(x)

  #define  CHIP_ISR_OF(x)            _VALUEOF(x)

  #define CHIP_ISR_DEFAULT (Uint32)( \
     _PER_FDEFAULT(CHIP,ISR,IS)\
  )

  #define CHIP_ISR_RMK(is) (Uint32)( \
     _PER_FMK(CHIP,ISR,IS,is)\
  )

  #define _CHIP_ISR_FGET(FIELD)\
    _PER_CFGET(CHIP,ISR,##FIELD)

  #define _CHIP_ISR_FSET(FIELD,field)\
    _PER_CFSET(CHIP,ISR,##FIELD,field)

  #define _CHIP_ISR_FSETS(FIELD,SYM)\
    _PER_CFSETS(CHIP,ISR,##FIELD,##SYM)


/******************************************************************************\
* _____________________
* |                   |
* |  I C R            |
* |___________________|
*
* ICR - interruppt clear register
*
* FIELDS (msb -> lsb)
* (w) IC
*
\******************************************************************************/
  extern far cregister volatile unsigned int ICR;

  #define _CHIP_ICR_IC_MASK          0x0000FFFFu
  #define _CHIP_ICR_IC_SHIFT         0x00000000u
  #define  CHIP_ICR_IC_DEFAULT       0x00000000u
  #define  CHIP_ICR_IC_OF(x)         _VALUEOF(x)

  #define  CHIP_ICR_OF(x)            _VALUEOF(x)

  #define CHIP_ICR_DEFAULT (Uint32)( \
     _PER_FDEFAULT(CHIP,ICR,IC)\
  )

  #define CHIP_ICR_RMK(ic) (Uint32)( \
     _PER_FMK(CHIP,ICR,IC,ic)\
  )

  #define _CHIP_ICR_FGET(FIELD)\
    _PER_CFGET(CHIP,ICR,##FIELD)

  #define _CHIP_ICR_FSET(FIELD,field)\
    _PER_CFSET(CHIP,ICR,##FIELD,field)

  #define _CHIP_ICR_FSETS(FIELD,SYM)\
    _PER_CFSETS(CHIP,ICR,##FIELD,##SYM)


/******************************************************************************\
* _____________________
* |                   |
* |  I E R            |
* |___________________|
*
* IER - interruppt enable register
*
* FIELDS (msb -> lsb)
* (rw) IE
*
\******************************************************************************/
  extern far cregister volatile unsigned int IER;

  #define _CHIP_IER_IE_MASK          0x0000FFFFu
  #define _CHIP_IER_IE_SHIFT         0x00000000u
  #define  CHIP_IER_IE_DEFAULT       0x00000000u
  #define  CHIP_IER_IE_OF(x)         _VALUEOF(x)

  #define  CHIP_IER_OF(x)            _VALUEOF(x)

  #define CHIP_IER_DEFAULT (Uint32)( \
     _PER_FDEFAULT(CHIP,IER,IE)\
  )

  #define CHIP_IER_RMK(ie) (Uint32)( \
     _PER_FMK(CHIP,IER,IE,ie)\
  )

  #define _CHIP_IER_FGET(FIELD)\
    _PER_CFGET(CHIP,IER,##FIELD)

  #define _CHIP_IER_FSET(FIELD,field)\
    _PER_CFSET(CHIP,IER,##FIELD,field)

  #define _CHIP_IER_FSETS(FIELD,SYM)\
    _PER_CFSETS(CHIP,IER,##FIELD,##SYM)


/******************************************************************************\
* _____________________
* |                   |
* |  I S T P          |
* |___________________|
*
* ISTP - interrupt service table pointer
*
* FIELDS (msb -> lsb)
* (r)   HPEINT
* (rw)  ISTB
*
\******************************************************************************/
  extern far cregister volatile unsigned int ISTP;

  #define _CHIP_ISTP_ISTB_MASK         0xFFFFFC00u
  #define _CHIP_ISTP_ISTB_SHIFT        0x0000000Au
  #define  CHIP_ISTP_ISTB_DEFAULT      0x00000000u
  #define  CHIP_ISTP_ISTB_OF(x)        _VALUEOF(x)

  #define _CHIP_ISTP_HPEINT_MASK       0x000003E0u
  #define _CHIP_ISTP_HPEINT_SHIFT      0x00000005u
  #define  CHIP_ISTP_HPEINT_DEFAULT    0x00000000u
  #define  CHIP_ISTP_HPEINT_OF(x)      _VALUEOF(x)

  #define  CHIP_ISTP_OF(x)             _VALUEOF(x)

  #define CHIP_ISTP_DEFAULT (Uint32)( \
     _PER_FDEFAULT(CHIP,ISTP,ISTB)\
    |_PER_FDEFAULT(CHIP,ISTP,HPEINT)\
  )

  #define CHIP_ISTP_RMK(istb) (Uint32)( \
     _PER_FMK(CHIP,ISTP,ISTB,istb)\
  )

  #define _CHIP_ISTP_FGET(FIELD)\
    _PER_CFGET(CHIP,ISTP,##FIELD)

  #define _CHIP_ISTP_FSET(FIELD,field)\
    _PER_CFSET(CHIP,ISTP,##FIELD,field)

  #define _CHIP_ISTP_FSETS(FIELD,SYM)\
    _PER_CFSETS(CHIP,ISTP,##FIELD,##SYM)


/******************************************************************************\
* _____________________
* |                   |
* |  I R P            |
* |___________________|
*
* IRP - interrupt return pointer
*
* FIELDS (msb -> lsb)
* (rw) IRP
*
\******************************************************************************/
  extern far cregister volatile unsigned int IRP;

  #define _CHIP_IRP_IRP_MASK           0xFFFFFFFFu
  #define _CHIP_IRP_IRP_SHIFT          0x00000000u
  #define  CHIP_IRP_IRP_DEFAULT        0x00000000u
  #define  CHIP_IRP_IRP_OF(x)          _VALUEOF(x)

  #define  CHIP_IRP_OF(x)              _VALUEOF(x)

  #define CHIP_IRP_DEFAULT (Uint32)( \
     _PER_FDEFAULT(CHIP,IRP,IRP)\
  )

  #define CHIP_IRP_RMK(irp) (Uint32)( \
     _PER_FMK(CHIP,IRP,IRP,irp)\
  )

  #define _CHIP_IRP_FGET(FIELD)\
    _PER_CFGET(CHIP,IRP,##FIELD)

  #define _CHIP_IRP_FSET(FIELD,field)\
    _PER_CFSET(CHIP,IRP,##FIELD,field)

  #define _CHIP_IRP_FSETS(FIELD,SYM)\
    _PER_CFSETS(CHIP,IRP,##FIELD,##SYM)


/******************************************************************************\
* _____________________
* |                   |
* |  N R P            |
* |___________________|
*
* NRP - non-maskable interrupt return pointer
*
* FIELDS (msb -> lsb)
* (rw) NRP
*
\******************************************************************************/
  extern far cregister volatile unsigned int NRP;

  #define _CHIP_NRP_NRP_MASK           0xFFFFFFFFu
  #define _CHIP_NRP_NRP_SHIFT          0x00000000u
  #define  CHIP_NRP_NRP_DEFAULT        0x00000000u
  #define  CHIP_NRP_NRP_OF(x)          _VALUEOF(x)

  #define  CHIP_NRP_OF(x)              _VALUEOF(x)

  #define CHIP_NRP_DEFAULT (Uint32)( \
     _PER_FDEFAULT(CHIP,NRP,NRP)\
  )

  #define CHIP_NRP_RMK(nrp) (Uint32)( \
     _PER_FMK(CHIP,NRP,NRP,nrp)\
  )

  #define _CHIP_NRP_FGET(FIELD)\
    _PER_CFGET(CHIP,NRP,##FIELD)

  #define _CHIP_NRP_FSET(FIELD,field)\
    _PER_CFSET(CHIP,NRP,##FIELD,field)

  #define _CHIP_NRP_FSETS(FIELD,SYM)\
    _PER_CFSETS(CHIP,NRP,##FIELD,##SYM)


/******************************************************************************\
* _____________________
* |                   |
* |  A M R            |
* |___________________|
*
* AMR - addressing mode register
*
* FIELDS (msb -> lsb)
* (rw) BK1
* (rw) BK0
* (rw) B7MODE
* (rw) B6MODE
* (rw) B5MODE
* (rw) B4MODE
* (rw) A7MODE
* (rw) A6MODE
* (rw) A5MODE
* (rw) A4MODE
*
\******************************************************************************/
  extern far cregister volatile unsigned int AMR;

  #define _CHIP_AMR_BK1_MASK           0x02E00000u
  #define _CHIP_AMR_BK1_SHIFT          0x00000015u
  #define  CHIP_AMR_BK1_DEFAULT        0x00000000u
  #define  CHIP_AMR_BK1_OF(x)          _VALUEOF(x)
  #define  CHIP_AMR_BK1_2              0x00000000u
  #define  CHIP_AMR_BK1_4              0x00000001u
  #define  CHIP_AMR_BK1_8              0x00000002u
  #define  CHIP_AMR_BK1_16             0x00000003u
  #define  CHIP_AMR_BK1_32             0x00000004u
  #define  CHIP_AMR_BK1_64             0x00000005u
  #define  CHIP_AMR_BK1_128            0x00000006u
  #define  CHIP_AMR_BK1_256            0x00000007u
  #define  CHIP_AMR_BK1_512            0x00000008u
  #define  CHIP_AMR_BK1_1K             0x00000009u
  #define  CHIP_AMR_BK1_2K             0x0000000Au
  #define  CHIP_AMR_BK1_4K             0x0000000Bu
  #define  CHIP_AMR_BK1_8K             0x0000000Cu
  #define  CHIP_AMR_BK1_16K            0x0000000Du
  #define  CHIP_AMR_BK1_32K            0x0000000Eu
  #define  CHIP_AMR_BK1_64K            0x0000000Fu
  #define  CHIP_AMR_BK1_128K           0x00000010u
  #define  CHIP_AMR_BK1_256K           0x00000011u
  #define  CHIP_AMR_BK1_512K           0x00000012u
  #define  CHIP_AMR_BK1_1M             0x00000013u
  #define  CHIP_AMR_BK1_2M             0x00000014u
  #define  CHIP_AMR_BK1_4M             0x00000015u
  #define  CHIP_AMR_BK1_8M             0x00000016u
  #define  CHIP_AMR_BK1_16M            0x00000017u
  #define  CHIP_AMR_BK1_32M            0x00000018u
  #define  CHIP_AMR_BK1_64M            0x00000019u
  #define  CHIP_AMR_BK1_128M           0x0000001Au
  #define  CHIP_AMR_BK1_256M           0x0000001Bu
  #define  CHIP_AMR_BK1_512M           0x0000001Cu
  #define  CHIP_AMR_BK1_1G             0x0000001Du
  #define  CHIP_AMR_BK1_2G             0x0000001Eu
  #define  CHIP_AMR_BK1_4G             0x0000001Fu

  #define _CHIP_AMR_BK0_MASK           0x001F0000u