mipi_phy.v

来自「mipi传输」· Verilog 代码 · 共 113 行

// Company: Sunny
// Engineer: Mark
// 
// Create Date:    17:58:30 12/10/2008 
// Design Name: 
// Module Name:    MIPI_PHY 
// Project Name: 
// Target Devices: 
// Tool versions: 
// Description: 
//
// Dependencies: 
//
// Revision: 
// Revision 0.01 - File Created
// Additional Comments: 
//
//////////////////////////////////////////////////////////////////////////////////

`timescale 1ns/1ns
								
module MIPI_PHY(
            MIPI_cp,
            MIPI_cn,
            MIPI_dp,
            MIPI_dn,
				    data_out,
            reset
			      );
			     
			     
 input MIPI_cp;
 input MIPI_cn;
 input MIPI_dp;
 input MIPI_dn;
 
 input reset;
 
 
 wire MIPI_clk;
 wire MIPI_data;
 
 reg [3:0]  counter;
 reg [15:0] data_in;
 reg   flag;
 

 output [15:0] data_out;
 
/////////////////////////////////////////////////////////////////////
 IBUFDS #(
      .CAPACITANCE("DONT_CARE"), // "LOW", "NORMAL", "DONT_CARE" (Virtex-4 only)
      .DIFF_TERM("FALSE"),       // Differential Termination (Virtex-4/5, Spartan-3E/3A)
      .IBUF_DELAY_VALUE("0"),    // Specify the amount of added input delay for
                                 //    the buffer, "0"-"16" (Spartan-3E only)
      .IFD_DELAY_VALUE("AUTO"),  // Specify the amount of added delay for input
                                 //    register, "AUTO", "0"-"8" (Spartan-3E/3A only)
      .IOSTANDARD("LVDS_25")     // Specify the input I/O standard
   ) IBUFDS_clk (
      .O(MIPI_clk),  // Buffer output
      .I(MIPI_cp),  // Diff_p buffer input (connect directly to top-level port)
      .IB(MIPI_cn) // Diff_n buffer input (connect directly to top-level port)
   );
	
	
	 IBUFDS #(
      .CAPACITANCE("DONT_CARE"), // "LOW", "NORMAL", "DONT_CARE" (Virtex-4 only)
      .DIFF_TERM("FALSE"),       // Differential Termination (Virtex-4/5, Spartan-3E/3A)
      .IBUF_DELAY_VALUE("0"),    // Specify the amount of added input delay for
                                 //    the buffer, "0"-"16" (Spartan-3E only)
      .IFD_DELAY_VALUE("AUTO"),  // Specify the amount of added delay for input
                                 //    register, "AUTO", "0"-"8" (Spartan-3E/3A only)
      .IOSTANDARD("LVDS_25")     // Specify the input I/O standard
   ) IBUFDS_data (
      .O(MIPI_data),  // Buffer output
      .I(MIPI_dp),  // Diff_p buffer input (connect directly to top-level port)
      .IB(MIPI_dn) // Diff_n buffer input (connect directly to top-level port)
   );
//////////////////////////////////////////////////////////////////////

always @(posedge MIPI_clk or negedge MIPI_clk)
begin
	if(reset) begin
		data_in <= 16'b0;
	end
	else begin
		data_in[15:0] <= {data_in[15:1],MIPI_data};
	end
end 
		

	
always @(posedge MIPI_clk or negedge MIPI_clk)
begin
	if(reset) begin
		counter <= 4'b0;
		flag <= 1'b0;
	end
	else if(counter==4'b1111)begin
		counter <= 4'b0;
		flag <= 1'b1;
	end
	else begin
	  counter <= counter+1'b1;
	  flag <= 1'b0;
	end
end


assign data_out = flag ? data_in : 16'bz;

endmodule