📄 iar7166.h
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/***************************************************************************
* - ioADE5169F62.h -
*
* Special header for the Analog Devices ADE5169F62 Microcontroller.alarm
*
*
***************************************************************************/
/*
-12/21/2005 - Petre M. added EADE bit to IEIP2 SFR register
-01/17/2006 - Petre M. added REFRESH bit to LCDCONY SFR
-02/21/2006 - Petre M. added SFRs for Energy Measurement
-03/20/2006 - Petre M. replaced EADC bit in IE SFR with ETEMP
-06/19/2006 - Petre M. replaced WAVEMOD name by WAVMODE because this
is the name used in the data sheet
-07/31/2006 - Petre M. added all assembly definitions of SFRs
-eliminated SPH definition
-02/20/2008 - Aileen R. Modified to be compatible with the ADE5169F62
-02/28/2008 - Aileen R. Modified to include hidden registers for kernel
*/
#ifndef IOADE7169F16_H
#define IOADE7169F16_H
#ifdef __IAR_SYSTEMS_ICC__
#pragma language=extended
/*-------------------------------------------------------------------------
* SPI/I2C
*-------------------------------------------------------------------------*/
__sfr __no_init volatile union
{
unsigned char SPIMOD1;
unsigned char I2CMOD;
struct
{
unsigned char SPIRATE0 : 1;
unsigned char SPIRATE1 : 1;
unsigned char RxOF_EN : 1;
unsigned char SS_EN : 1;
unsigned char AUTO_SS : 1;
unsigned char : 1;
unsigned char : 1;
unsigned char : 1;
} SPIMOD1_bit;
struct
{
unsigned char I2CRCT0 : 1;
unsigned char I2CRCT1 : 1;
unsigned char I2CRCT2 : 1;
unsigned char I2CRCT3 : 1;
unsigned char I2CRCT4 : 1;
unsigned char I2CR0 : 1;
unsigned char I2CR1 : 1;
unsigned char I2CEN : 1;
} I2CMOD_bit;
} @ 0xE8;
__sfr __no_init volatile union
{
unsigned char SPISTAT;
unsigned char I2CSTAT;
struct
{
unsigned char SPITxBF : 1;
unsigned char SPITxIRQ : 1;
unsigned char SPITxUF : 1;
unsigned char SPIRxBF : 1;
unsigned char SPIRxIRQ : 1;
unsigned char SPIRxOF : 1;
unsigned char MMERR : 1;
unsigned char BUSY : 1;
} SPISTAT_bit;
struct
{
unsigned char I2CTxWR_ERR : 1;
unsigned char I2CACC_ERR : 1;
unsigned char I2CFIFOSTAT0 : 1;
unsigned char I2CFIFOSTAT1 : 1;
unsigned char I2CTxIRQ : 1;
unsigned char I2CRxIRQ : 1;
unsigned char I2CNOACK : 1;
unsigned char I2CBUSY : 1;
} I2CSTAT_bit;
} @ 0xEA;
__sfr __no_init volatile union
{
unsigned char SPI2CTx;
struct
{
unsigned char SPI2CT0 : 1;
unsigned char SPI2CT1 : 1;
unsigned char SPI2CT2 : 1;
unsigned char SPI2CT3 : 1;
unsigned char SPI2CT4 : 1;
unsigned char SPI2CT5 : 1;
unsigned char SPI2CT6 : 1;
unsigned char SPI2CT7 : 1;
} SPI2CTx_bit;
} @ 0x9A;
__sfr __no_init volatile union
{
unsigned char SPIMOD2;
unsigned char I2CADR;
struct
{
unsigned char TIMODE : 1;
unsigned char SPILSBF : 1;
unsigned char SPICPHA : 1;
unsigned char SPICPOL : 1;
unsigned char SPIMS_b : 1;
unsigned char SPIODO : 1;
unsigned char SPIEN : 1;
unsigned char SPICONT : 1;
} SPIMOD2_bit;
struct
{
unsigned char I2CR_W : 1;
unsigned char I2CSLVADR0 : 1;
unsigned char I2CSLVADR1 : 1;
unsigned char I2CSLVADR2 : 1;
unsigned char I2CSLVADR3 : 1;
unsigned char I2CSLVADR4 : 1;
unsigned char I2CSLVADR5 : 1;
unsigned char I2CSLVADR6 : 1;
} I2CADR_bit;
} @ 0xE9;
__sfr __no_init volatile union
{
unsigned char SPI2CRx;
struct
{
unsigned char SPI2CR0 : 1;
unsigned char SPI2CR1 : 1;
unsigned char SPI2CR2 : 1;
unsigned char SPI2CR3 : 1;
unsigned char SPI2CR4 : 1;
unsigned char SPI2CR5 : 1;
unsigned char SPI2CR6 : 1;
unsigned char SPI2CR7 : 1;
} SPI2CRx_bit;
} @ 0x9B;
/*-------------------------------------------------------------------------
* RTC
*-------------------------------------------------------------------------*/
__sfr __no_init volatile union
{
unsigned char TIMECON;
struct
{
unsigned char : 1;
unsigned char ITEN : 1;
unsigned char ALARM: 1;
unsigned char SIT : 1;
unsigned char ITS0 : 1;
unsigned char ITS1 : 1;
unsigned char TFH : 1;
unsigned char : 1;
} TIMECON_bit;
} @ 0xA1;
__sfr __no_init volatile union
{
unsigned char TIMECON2;
struct
{
unsigned char ALSEC_EN : 1;
unsigned char ALMIN_EN : 1;
unsigned char ALHR_EN : 1;
unsigned char ALDAY_EN : 1;
unsigned char ALDAT_EN : 1;
unsigned char : 1;
unsigned char : 1;
unsigned char : 1;
} TIMECON2_bit;
} @ 0xA2;
__sfr __no_init volatile unsigned char RTCCOMP @ 0xF6;
__sfr __no_init volatile unsigned char TEMPCAL @ 0xF7;
__sfr __no_init volatile unsigned char INTVAL @ 0xA6;
__sfr __no_init volatile unsigned char HOUR @ 0xA5;
__sfr __no_init volatile unsigned char MIN @ 0xA4;
__sfr __no_init volatile unsigned char SEC @ 0xA3;
__sfr __no_init volatile unsigned char HTHSEC @ 0xA2;
//__sfr __no_init volatile unsigned char RTCPTR @ 0xA3;
//__sfr __no_init volatile unsigned char RTCDAT @ 0xA4;
//#define HTHSEC 0x01
//#define SEC 0x02
//#define MIN 0x03
//#define HOUR 0x04
//#define DAY 0x05
//#define DATE 0x06
//#define MONTH 0x07
//#define YEAR 0x08
//#define INTVAL 0x09
//#define AL_SEC 0x0A
//#define AL_MIN 0x0B
//#define AL_HOUR 0x0C
//#define AL_DAY 0x0D
//#define AL_DATE 0x0E
//#define RTC_CAL 0x0F
//#define XTALOS 0x10
#define XTALG1 0x11
#define XTALG2 0x12
/*-------------------------------------------------------------------------
* LCD
*-------------------------------------------------------------------------*/
__sfr __no_init volatile union
{
unsigned char LCDPTR;
struct
{
unsigned char ADDRESS0 : 1;
unsigned char ADDRESS1 : 1;
unsigned char ADDRESS2 : 1;
unsigned char ADDRESS3 : 1;
unsigned char RAM2SCR2 : 1;
unsigned char RAM2SCR1 : 1;
unsigned char : 1;
unsigned char WR : 1;
} LCDPTR_bit;
} @ 0xAC;
__sfr __no_init volatile union
{
unsigned char LCDCONY;
struct
{
unsigned char REFRESH : 1;
unsigned char UPDATEOVER : 1;
unsigned char SCREEN_SEL1 : 1;
unsigned char SCREEN_SEL2 : 1;
unsigned char : 1;
unsigned char : 1;
unsigned char INV_LVL : 1;
unsigned char AUTOSCROLL : 1;
} LCDCONY_bit;
} @ 0xB1;
__sfr __no_init volatile unsigned char LCDDAT @ 0xAE;
__sfr __no_init volatile union
{
unsigned char LCDCON;
struct
{
unsigned char LMUX0 : 1;
unsigned char LMUX1 : 1;
unsigned char BIAS : 1;
unsigned char CLKSEL : 1;
unsigned char LCDPSM2 : 1;
unsigned char BLINKEN : 1;
unsigned char LCDRST : 1;
unsigned char LCDEN : 1;
} LCDCON_bit;
} @ 0x95;
__sfr __no_init volatile union
{
unsigned char LCDCLK;
struct
{
unsigned char FD0 : 1;
unsigned char FD1 : 1;
unsigned char FD2 : 1;
unsigned char FD3 : 1;
unsigned char BLKFREQ0 : 1;
unsigned char BLKFREQ1 : 1;
unsigned char BLKMOD0 : 1;
unsigned char BLKMOD1 : 1;
} LCDCLK_bit;
} @ 0x96;
__sfr __no_init volatile union
{
unsigned char LCDSEGE;
struct
{
unsigned char FDELAY0 : 1;
unsigned char FDELAY1 : 1;
unsigned char FP20EN : 1;
unsigned char FP21EN : 1;
unsigned char FP22EN : 1;
unsigned char FP23EN : 1;
unsigned char FP24EN : 1;
unsigned char FP25EN : 1;
} LCDSEGE_bit;
} @ 0x97;
__sfr __no_init volatile union
{
unsigned char LCDSEGE2;
struct
{
unsigned char FP16EN : 1;
unsigned char FP17EN : 1;
unsigned char FP18EN : 1;
unsigned char FP19EN : 1;
unsigned char : 1;
unsigned char : 1;
unsigned char : 1;
unsigned char : 1;
} LCDSEGE2_bit;
} @ 0xED;
__sfr __no_init volatile union
{
unsigned char LCDCONX;
struct
{
unsigned char BIASLVL0 : 1;
unsigned char BIASLVL1 : 1;
unsigned char BIASLVL2 : 1;
unsigned char BIASLVL3 : 1;
unsigned char BIASLVL4 : 1;
unsigned char BIASLVL5 : 1;
unsigned char EXTRES : 1;
unsigned char : 1;
} LCDCONX_bit;
} @ 0x9C;
/*-------------------------------------------------------------------------
* Energy Measurement
*-------------------------------------------------------------------------*/
__sfr __no_init volatile union
{
unsigned char MIRQSTL;
struct
{
unsigned char APNOLOAD : 1;
unsigned char RNOLOAD : 1;
unsigned char VANOLOAD : 1;
unsigned char APSIGN : 1;
unsigned char VARSIGN : 1;
unsigned char FAULTSIGN : 1;
unsigned char : 1;
unsigned char ADEIRQFLAG : 1;
} MIRQSTL_bit;
} @ 0xDC;
__sfr __no_init volatile union
{
unsigned char MIRQENL;
struct
{
unsigned char APNOLOAD : 1;
unsigned char RNOLOAD : 1;
unsigned char VANOLOAD : 1;
unsigned char APSIGN : 1;
unsigned char VARSIGN : 1;
unsigned char FAULTSIGN : 1;
unsigned char : 1;
unsigned char : 1;
} MIRQENL_bit;
} @ 0xD9;
__sfr __no_init volatile union
{
unsigned char MIRQSTM;
struct
{
unsigned char AEHF : 1;
unsigned char REHF : 1;
unsigned char VAEHF : 1;
unsigned char AEOF : 1;
unsigned char REOF : 1;
unsigned char VAEOF : 1;
unsigned char CF1 : 1;
unsigned char CF2 : 1;
} MIRQSTM_bit;
} @ 0xDD;
__sfr __no_init volatile union
{
unsigned char MIRQENM;
struct
{
unsigned char AEHF : 1;
unsigned char REHF : 1;
unsigned char VAEHF : 1;
unsigned char AEOF : 1;
unsigned char REOF : 1;
unsigned char VAEOF : 1;
unsigned char CF1 : 1;
unsigned char CF2 : 1;
} MIRQENM_bit;
} @ 0xDA;
__sfr __no_init volatile union
{
unsigned char MIRQSTH;
struct
{
unsigned char ZX : 1;
unsigned char ZXTO : 1;
unsigned char CYCEND : 1;
unsigned char PKV : 1;
unsigned char PKI : 1;
unsigned char WFSM : 1;
unsigned char : 1;
unsigned char RESET : 1;
} MIRQSTH_bit;
} @ 0xDE;
__sfr __no_init volatile union
{
unsigned char MIRQENH;
struct
{
unsigned char ZX : 1;
unsigned char ZXTO : 1;
unsigned char CYCEND : 1;
unsigned char PKV : 1;
unsigned char PKI : 1;
unsigned char WFSM : 1;
unsigned char : 1;
unsigned char : 1;
} MIRQENH_bit;
} @ 0xDB;
__sfr __no_init volatile unsigned char MADDPT @ 0x91;
__sfr __no_init volatile unsigned char MDATL @ 0x92;
__sfr __no_init volatile unsigned char MDATM @ 0x93;
__sfr __no_init volatile unsigned char MDATH @ 0x94;
__sfr __no_init volatile unsigned char VRMSL @ 0xD1;
__sfr __no_init volatile unsigned char VRMSM @ 0xD2;
__sfr __no_init volatile unsigned char VRMSH @ 0xD3;
__sfr __no_init volatile unsigned char IRMSL @ 0xD4;
__sfr __no_init volatile unsigned char IRMSM @ 0xD5;
__sfr __no_init volatile unsigned char IRMSH @ 0xD6;
__sfr __no_init volatile unsigned char WAV1L @ 0xE2;
__sfr __no_init volatile unsigned char WAV1M @ 0xE3;
__sfr __no_init volatile unsigned char WAV1H @ 0xE4;
__sfr __no_init volatile unsigned char WAV2L @ 0xE5;
__sfr __no_init volatile unsigned char WAV2M @ 0xE6;
__sfr __no_init volatile unsigned char WAV2H @ 0xE7;
//the following registers can be accessed using MADDPT and MDAT SFRs
//For this reason they are declared with #define
#define WATTHR 0x01
#define RWATTHR 0x02
#define LWATTHR 0x03
#define VARHR 0x04
#define RVARHR 0x05
#define LVARHR 0x06
#define VAHR 0x07
#define RVAHR 0x08
#define LVAHR 0x09
#define PER_FREQ 0x0A
#define MODE1 0x0b
#define DISHPF 0x01
#define DISCF1 0x02
#define DISCF2 0x04
#define PWRDN 0x08
#define SWAPBITS 0x10
#define INTE 0x20
#define DISZXLPF 0x40
#define SWRST 0x80
#define MODE2 0x0c
#define FREQSEL 0x02
#define ZXRMS 0x04
#define VARMSCFCON 0x08
#define CF1SEL0 0x10
#define CF1SEL1 0x20
#define CF2SEL0 0x40
#define CF2SEL1 0x80
#define MODE3 0x02B
#define ZX1 0x01
#define ZX2 0x02
#define WAVMODE 0x0d
#define DTRT0 0x01
#define DTRT1 0x02
#define WAV1SEL0 0x04
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