cobot_driver.drc

电机驱动器原理图以及PCB

Protel Design System Design Rule Check
PCB File : \jlp\桌面\Cobot_driver\Cobot_driver.PCB
Date     : 2007-9-17
Time     : 13:23:15

Processing Rule : Short-Circuit Constraint (Allowed=No) (All),(All)
Rule Violations :0

Processing Rule : Broken-Net Constraint ( (All) )
Rule Violations :0

Processing Rule : Clearance Constraint (Gap=10mil) (InNetClass('All Nets')),(All)
Rule Violations :0

Processing Rule : Width Constraint (Min=10mil) (Max=100mil) (Preferred=10mil) (All)
Rule Violations :0

Processing Rule : Height Constraint (Min=0mil) (Max=1000mil) (Prefered=500mil) (All)
Rule Violations :0

Processing Rule : Hole Size Constraint (Min=1mil) (Max=100mil) (All)
   Violation         Pad SW_IN-11(6004.134mil,1358.268mil)  Multi-Layer  Actual Hole Size = 128.346mil
   Violation         Pad SW_IN-10(6987.992mil,1358.268mil)  Multi-Layer  Actual Hole Size = 128.346mil
   Violation         Pad Free-(2559.055mil,4527.559mil)  Multi-Layer  Actual Hole Size = 137.795mil
   Violation         Pad Free-(2559.055mil,1377.953mil)  Multi-Layer  Actual Hole Size = 137.795mil
   Violation         Pad Free-(7283.465mil,4527.559mil)  Multi-Layer  Actual Hole Size = 137.795mil
   Violation         Pad Free-(7283.465mil,1377.953mil)  Multi-Layer  Actual Hole Size = 137.795mil
   Violation         Pad Free-(4133.858mil,1377.953mil)  Multi-Layer  Actual Hole Size = 137.795mil
   Violation         Pad Free-(5708.661mil,1377.953mil)  Multi-Layer  Actual Hole Size = 137.795mil
   Violation         Pad Free-(1417.323mil,4192.913mil)  Multi-Layer  Actual Hole Size = 137.795mil
   Violation         Pad Free-(2204.724mil,3484.252mil)  Multi-Layer  Actual Hole Size = 137.795mil
   Violation         Pad Free-(1417.323mil,2421.26mil)  Multi-Layer  Actual Hole Size = 137.795mil
   Violation         Pad Free-(2204.724mil,1712.598mil)  Multi-Layer  Actual Hole Size = 137.795mil
Rule Violations :12

Processing Rule : Width Constraint (Min=10mil) (Max=300mil) (Preferred=10mil) (InNetClass('Power'))
Rule Violations :0

Processing Rule : Clearance Constraint (Gap=15mil) (InNetClass('Power')),(All)
Rule Violations :0


Violations Detected : 12
Time Elapsed        : 00:00:04