📄 system3.h
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/*
* system3.h: PT system3 specific defines
*
* Copyright (C) 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl)
*
* $Id: system3.h,v 1.9 2002/01/07 16:31:25 seletz Exp $
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
*/
#ident "$Id: system3.h,v 1.9 2002/01/07 16:31:25 seletz Exp $"
#ifndef BLOB_ARCH_SYSTEM3_H
#define BLOB_ARCH_SYSTEM3_H
#undef CPU_SPEED_133
/* boot CPU speed */
#ifdef CPU_SPEED_133
# define CPU_SPEED (0x05)
#else
# define CPU_SPEED (0x0a)
#endif
/* serial port */
#define USE_SERIAL1
/* GPIO for the LED */
#define LED_GPIO (0x00000400) /* GPIO 10 */
/* the base address were BLOB is loaded by the first stage loader */
#define BLOB_ABS_BASE_ADDR (0xc0200400)
/* where do various parts live in RAM */
#define BLOB_RAM_BASE (0xc0100000)
#define KERNEL_RAM_BASE (0xC0008000)
#define PARAM_RAM_BASE (0xc0110000)
#define RAMDISK_RAM_BASE (0xC0400000)
/* and where do they live in flash */
#define BLOB_FLASH_BASE (0x00000000)
#define BLOB_FLASH_LEN (256 * 1024)
#define PARAM_FLASH_BASE (0x00040000)
#define PARAM_FLASH_LEN (256 * 1024)
#define KERNEL_FLASH_BASE (0x00080000)
#define KERNEL_FLASH_LEN (1024 * 1024)
#define RAMDISK_FLASH_BASE (0x00180000)
#define RAMDISK_FLASH_LEN (4 * 1024 * 1024)
/* the position of the kernel boot parameters */
#define BOOT_PARAMS (0xc0000100)
/* the size (in kbytes) to which the compressed ramdisk expands */
#define RAMDISK_SIZE (8 * 1024)
/* Memory configuration */
#ifdef BLOB_NEED_MEMCONFIG
#define MSC0_VALUE_66_150 MSC_RT_ROMFLASH | MSC_RBW32 | MSC_RDF(10) | MSC_RDN(2) | MSC_RRR(1)
#define MSC0_VALUE_66_120 MSC_RT_ROMFLASH | MSC_RBW32 | MSC_RDF( 8) | MSC_RDN(2) | MSC_RRR(1)
#define MSC0_VALUE_66_100 MSC_RT_ROMFLASH | MSC_RBW32 | MSC_RDF( 7) | MSC_RDN(2) | MSC_RRR(1)
#define MSC1_VALUE_66 MSC_RT_ROMFLASH | MSC_RBW16 | MSC_RDF(5) | MSC_RDN(1) | MSC_RRR(1) | ((MSC_RT_VARLAT_345 | MSC_RBW16 | MSC_RDF(30) | MSC_RDN(30) | MSC_RRR(7))<<16)
#define MSC2_VALUE_66 MSC_RT_VARLAT_345 | MSC_RBW32 | MSC_RDF(7) | MSC_RDN(2) | MSC_RRR(1)
#define MECR_VALUE_66 0xFFFFFFFF
#define MSC0_VALUE_100_150 MSC_RT_ROMFLASH | MSC_RBW32 | MSC_RDF(16) | MSC_RDN(3) | MSC_RRR(2)
#define MSC0_VALUE_100_120 MSC_RT_ROMFLASH | MSC_RBW32 | MSC_RDF(13) | MSC_RDN(3) | MSC_RRR(2)
#define MSC0_VALUE_100_100 MSC_RT_ROMFLASH | MSC_RBW32 | MSC_RDF(11) | MSC_RDN(3) | MSC_RRR(2)
#define MSC1_VALUE_100 MSC_RT_ROMFLASH | MSC_RBW16 | MSC_RDF(5) | MSC_RDN(1) | MSC_RRR(1)| ((MSC_RT_VARLAT_345 | MSC_RBW16 | MSC_RDF(30) | MSC_RDN(30) | MSC_RRR(7))<<16)
#define MSC2_VALUE_100 MSC_RT_VARLAT_345 | MSC_RBW32 | MSC_RDF(9) | MSC_RDN(2) | MSC_RRR(1)
#define MECR_VALUE_100 0xFFFFFFFF
#ifndef CPU_SPEED_133
// 206 Mhz
# define MDCNFG_VALUE 0x72547254
# define MDCAS00_VALUE 0xAAAAAA9F
# define MDCAS01_VALUE 0xAAAAAAAA
# define MDCAS02_VALUE 0xAAAAAAAA
# define MDCAS20_VALUE 0xAAAAAA9F
# define MDCAS21_VALUE 0xAAAAAAAA
# define MDCAS22_VALUE 0xAAAAAAAA
# define MSC0_VALUE MSC0_VALUE_100_150
# define MSC1_VALUE MSC1_VALUE_100
# define MSC2_VALUE MSC2_VALUE_100
# define MECR_VALUE MECR_VALUE_100
# define SMCNFG_VALUE 0
#else
// 133 Mhz
# define MDCNFG_VALUE 0x72547254
# define MDCAS00_VALUE 0xAAAAAA9F
# define MDCAS01_VALUE 0xAAAAAAAA
# define MDCAS02_VALUE 0xAAAAAAAA
# define MDCAS20_VALUE 0xAAAAAA9F
# define MDCAS21_VALUE 0xAAAAAAAA
# define MDCAS22_VALUE 0xAAAAAAAA
# define MSC0_VALUE MSC0_VALUE_66_150
# define MSC1_VALUE MSC1_VALUE_66
# define MSC2_VALUE MSC2_VALUE_66
# define MECR_VALUE MECR_VALUE_66
# define SMCNFG_VALUE 0
#endif
#endif
/* Debugging macros used in system 3 code */
#define SYSTEM3_DEBUG 1
#ifdef SYSTEM3_DEBUG
# define _DBGU32( x ) SerialOutputString( #x"=0x" ); \
SerialOutputHex( (u32)x ); \
serial_write( '\n' );
#else
# define _DBGU32( x )
#endif
#define SA1111_BASE (0x40000000)
#define SA1111_VBASE (0x40000000)
#endif
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