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📄 gsm_ddc_cic.mdl

📁 This is GMS down upper converter and down converter in simulink. you may understand the structure in
💻 MDL
📖 第 1 页 / 共 5 页
字号:
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  latency		  "0"
	  dbl_ovrd		  "off"
	  pipeline		  "off"
	  xl_use_area		  "off"
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,461,334"
	  block_type		  "convert"
	  block_version		  "10.1"
	  sg_icon_stat		  "45,30,1,1,white,blue,0,74901e60,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 2"
"3 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20"
" 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 "
"30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: beg"
"in icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','C"
"OMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Counter"
	  Ports			  [2, 1]
	  Position		  [420, 515, 480, 575]
	  SourceBlock		  "xbsIndex_r4/Counter"
	  SourceType		  "Xilinx Counter Block"
	  infoedit		  "Hardware notes: Free running counters are t"
"he least expensive in hardware.  A count limited counter is implemented by co"
"mbining a counter with a comparator."
	  cnt_type		  "Free Running"
	  cnt_to		  "Inf"
	  operation		  "Up"
	  start_count		  "0"
	  cnt_by_val		  "1"
	  arith_type		  "Unsigned"
	  n_bits		  "9"
	  bin_pt		  "0"
	  load_pin		  "off"
	  rst			  "on"
	  en			  "on"
	  explicit_period	  "on"
	  period		  "1"
	  dbl_ovrd		  "off"
	  use_behavioral_HDL	  "off"
	  use_rpm		  "off"
	  xl_use_area		  "off"
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,348,619"
	  block_type		  "counter"
	  block_version		  "10.1"
	  sg_icon_stat		  "60,60,1,1,white,blue,0,46c73e85,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 "
"34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 "
"54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60"
" 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');port_label('input',1,'rst');\ncolor('black')"
";port_label('input',2,'en');\ncolor('black');port_label('output',1,'out');\nf"
"printf('','COMMENT: end icon text');\n"
	  Port {
	    PortNumber		    1
	    Name		    "count"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "Down Sample3"
	  Ports			  [1, 1]
	  Position		  [1155, 248, 1215, 282]
	  SourceBlock		  "xbsIndex_r4/Down Sample"
	  SourceType		  "Xilinx Down Sampler Block"
	  infoedit		  "Hardware notes: Sample and Latency controls"
" determine the hardware implementation.  The cost in hardware of different im"
"plementations varies considerably; press Help for details."
	  sample_ratio		  "32"
	  sample_phase		  "Last Value of Frame  (most efficient)"
	  en			  "off"
	  latency		  "1"
	  dbl_ovrd		  "off"
	  xl_use_area		  "off"
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,360,300"
	  block_type		  "dsamp"
	  block_version		  "10.1"
	  sg_icon_stat		  "60,34,1,1,white,blue,0,decad764,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 "
"34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 "
"49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56"
" 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');disp('\\newline{\\fontsize{14pt}\\bf\\downar"
"row}32\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text')"
";\n"
	  Port {
	    PortNumber		    1
	    Name		    "mux_dout_ds"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "Down Sample4"
	  Ports			  [1, 1]
	  Position		  [1195, 693, 1255, 727]
	  SourceBlock		  "xbsIndex_r4/Down Sample"
	  SourceType		  "Xilinx Down Sampler Block"
	  infoedit		  "Hardware notes: Sample and Latency controls"
" determine the hardware implementation.  The cost in hardware of different im"
"plementations varies considerably; press Help for details."
	  sample_ratio		  "32"
	  sample_phase		  "Last Value of Frame  (most efficient)"
	  en			  "off"
	  latency		  "1"
	  dbl_ovrd		  "off"
	  xl_use_area		  "off"
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,360,300"
	  block_type		  "dsamp"
	  block_version		  "10.1"
	  sg_icon_stat		  "60,34,1,1,white,blue,0,decad764,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 "
"34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 "
"49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56"
" 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');disp('\\newline{\\fontsize{14pt}\\bf\\downar"
"row}32\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text')"
";\n"
	  Port {
	    PortNumber		    1
	    Name		    "vout_ds"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "Expression"
	  Ports			  [3, 1]
	  Position		  [215, 621, 330, 679]
	  SourceBlock		  "xbsIndex_r4/Expression"
	  SourceType		  "Xilinx Bitwise Expression Evaluator Block"
	  expression		  "a | (b & ~c)"
	  align_bp		  "off"
	  en			  "off"
	  latency		  "1"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  dbl_ovrd		  "off"
	  xl_use_area		  "off"
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,348,229"
	  block_type		  "expr"
	  block_version		  "10.1"
	  sg_icon_stat		  "115,58,1,1,white,blue,0,b53500d0,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 65 65 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([17 7 21 7 17 33 "
"37 41 58 45 32 23 38 23 32 45 58 41 37 33 17 ],[6 16 30 44 54 54 50 54 54 41 "
"54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 65 65 0 0 ],[0 0 60"
" 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');p"
"ort_label('input',2,'b');\ncolor('black');port_label('input',3,'c');\ncolor('"
"black');disp('a | (b & ~c)');\nfprintf('','COMMENT: end icon text');\n"
	  Port {
	    PortNumber		    1
	    Name		    "count_en"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "I_DPRAM"
	  Ports			  [4, 2]
	  Position		  [805, 117, 880, 283]
	  SourceBlock		  "xbsIndex_r4/Dual Port RAM"
	  SourceType		  "Xilinx Dual Port Random Access Memory Block"
	  depth			  "4"
	  initVector		  "[0 0 0 0]"
	  distributed_mem	  "Distributed memory"
	  init_a		  "0"
	  init_b		  "0"
	  rst_a			  "off"
	  rst_b			  "off"
	  en_a			  "off"
	  en_b			  "off"
	  latency		  "1"
	  write_mode_A		  "Read After Write"
	  write_mode_B		  "Read After Write"
	  dbl_ovrd		  "off"
	  optimize		  "Area"
	  use_rpm		  "on"
	  xl_use_area		  "off"
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,384,398"
	  block_type		  "dpram"
	  block_version		  "10.1"
	  sg_icon_stat		  "75,166,1,1,white,blue,0,0f7f0533,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 75 75 0 ],[0 0 166 166 ],[0.77 0.82 0.91]);\npatch([17 5 23 5 17 3"
"7 42 47 68 51 35 23 40 23 35 51 68 47 42 37 17 ],[54 66 84 102 114 114 109 11"
"4 114 97 113 101 84 67 55 71 54 54 59 54 54 ],[0.98 0.96 0.92]);\nplot([0 75 "
"75 0 0 ],[0 0 166 166 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprin"
"tf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr"
"a');\ncolor('black');port_label('input',2,'dina');\ncolor('black');port_label"
"('input',3,'wea');\ncolor('black');port_label('input',4,'addrb');\ncolor('bla"
"ck');port_label('output',1,'A');\ncolor('black');port_label('output',2,'B');"
"\nfprintf('','COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Mux
	  Name			  "Mux"
	  Ports			  [4, 1]
	  Position		  [420, 34, 425, 91]
	  ShowName		  off
	  DisplayOption		  "bar"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Mux1"
	  Ports			  [4, 1]
	  Position		  [1065, 194, 1110, 331]
	  SourceBlock		  "xbsIndex_r4/Mux"
	  SourceType		  "Xilinx Bus Multiplexer Block"
	  inputs		  "2"
	  en			  "on"
	  latency		  "1"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "14"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  dbl_ovrd		  "off"
	  xl_use_area		  "off"
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,348,303"
	  block_type		  "mux"
	  block_version		  "10.1"
	  sg_icon_stat		  "45,137,1,1,white,blue,3,35a147f0,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 45 45 0 ],[0 19.5714 117.429 137 ],[0.77 0.82 0.91]);\npatch([10 3"
" 14 3 10 22 25 28 41 31 21 14 25 14 21 31 41 28 25 22 10 ],[51 58 69 80 87 87"
" 84 87 87 77 87 80 69 58 51 61 51 51 54 51 51 ],[0.98 0.96 0.92]);\nplot([0 4"
"5 45 0 0 ],[0 19.5714 117.429 137 0 ]);\nfprintf('','COMMENT: end icon graphi"
"cs');\nfprintf('','COMMENT: begin icon text');\ncolor('black');port_label('in"
"put',1,'sel');\ncolor('black');port_label('input',2,'d0');\ncolor('black');po"
"rt_label('input',3,'d1');\ncolor('black');port_label('input',4,'en');\ncolor("
"'black');disp('\\bf{  z^{-1}}','texmode','on');\nfprintf('','COMMENT: end ico"
"n text');\n"
	  Port {
	    PortNumber		    1
	    Name		    "mux_dout"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Mux
	  Name			  "Mux2"
	  Ports			  [3, 1]
	  Position		  [910, 756, 915, 794]
	  ShowName		  off
	  Inputs		  "3"
	  DisplayOption		  "bar"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Q_DPRAM"
	  Ports			  [4, 2]
	  Position		  [805, 307, 880, 473]
	  SourceBlock		  "xbsIndex_r4/Dual Port RAM"
	  SourceType		  "Xilinx Dual Port Random Access Memory Block"
	  depth			  "4"
	  initVector		  "[0 0 0 0]"
	  distributed_mem	  "Distributed memory"
	  init_a		  "0"
	  init_b		  "0"
	  rst_a			  "off"
	  rst_b			  "off"
	  en_a			  "off"
	  en_b			  "off"
	  latency		  "1"
	  write_mode_A		  "Read After Write"
	  write_mode_B		  "Read After Write"
	  dbl_ovrd		  "off"
	  optimize		  "Area"
	  use_rpm		  "on"
	  xl_use_area		  "off"
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,384,398"
	  block_type		  "dpram"
	  block_version		  "10.1"
	  sg_icon_stat		  "75,166,1,1,white,blue,0,0f7f0533,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 75 75 0 ],[0 0 166 166 ],[0.77 0.82 0.91]);\npatch([17 5 23 5 17 3"
"7 42 47 68 51 35 23 40 23 35 51 68 47 42 37 17 ],[54 66 84 102 114 114 109 11"
"4 114 97 113 101 84 67 55 71 54 54 59 54 54 ],[0.98 0.96 0.92]);\nplot([0 75 "
"75 0 0 ],[0 0 166 166 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprin"
"tf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr"
"a');\ncolor('black');port_label('input',2,'dina');\ncolor('black');port_label"
"('input',3,'wea');\ncolor('black');port_label('input',4,'addrb');\ncolor('bla"
"ck');port_label('output',1,'A');\ncolor('black');port_label('output',2,'B');"
"\nfprintf('','COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Register"
	  Ports			  [2, 1]
	  Position		  [1020, 680, 1055, 740]
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  "off"
	  en			  "on"
	  dbl_ovrd		  "off"
	  xl_use_area		  "off"
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,348,193"
	  block_type		  "register"
	  block_version		  "10.1"
	  sg_icon_stat		  "35,60,1,1,white,blue,0,cc3303a0,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 "
"34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 "
"49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56"
" 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');p"
"ort_label('input',2,'en');\ncolor('black');port_label('output',1,'q');\ncolor"
"('black');disp('\\bf{z^{-1}}','texmode','on');\nfprintf('','COMMENT: end icon"
" text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Reinterpret"
	  Ports			  [1, 1]
	  Position		  [265, 24, 315, 56]
	  SourceBlock		  "xbsIndex_r4/Reinterpret"
	  SourceType		  "Xilinx Type Reinterpreter Block"
	  infoedit		  "Changes signal type without altering the bi"
"nary representation.   You can changed the signal between signed and unsigned"
", and relocate the binary point.<P><P>Hardware notes: In hardware this block "
"costs nothing.<P><P>Example:  Suppose the input is 6 bits wide, signed, with "
"2 fractional bits, and the output is forced to unsigned with 0 fractional bit"
"s.  Then an input of -2.0 (1110.00 in binary 2's complement) becomes an outpu"
"t of 56 (111000 in binary)."
	  force_arith_type	  "off"
	  arith_type		  "Unsigned"
	  force_bin_pt		  "on"
	  bin_pt		  "16"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,336,312"
	  block_type		  "reinterpret"
	  block_version		  "10.1"
	  sg_icon_stat		  "50,32,1,1,white,blue,0,8982c1db,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 50 50 0 ],[0 0 32 32 ],[0.77 0.82 0.91]);\npatch([16 11 18 11 16 2"
"4 26 28 37 30 23 18 25 18 23 30 37 28 26 24 16 ],[3 8 15 22 27 27 25 27 27 20"
" 27 22 15 8 3 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 50 50 0 0 ],[0 0 32 "
"32 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: beg"
"in icon text');\ncolor('black');disp('reinterpret');\nfprintf('','COMMENT: en"
"d icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Reinterpret1"
	  Ports			  [1, 1]
	  Position		  [265, 239, 315, 271]
	  SourceBlock		  "xbsIndex_r4/Reinterpret"
	  SourceType		  "Xilinx Type Reinterpreter Block"
	  infoedit		  "Changes signal type without altering the bi"
"nary representation.   You can changed the signal between signed and unsigned"
", and relocate the binary point.<P><P>Hardware notes: In hardware this block "
"costs nothing.<P><P>Example:  Suppose the input is 6 bits wide, signed, with "
"2 fractional bits, and the output is forced to unsigned with 0 fractional bit"
"s.  Then an input of -2.0 (1110.00 in binary 2's complement) becomes an outpu"
"t of 56 (111000 in binary)."
	  force_arith_type	  "off"
	  arith_type		  "Unsigned"
	  force_bin_pt		  "on"
	  bin_pt		  "16"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,336,312"
	  block_type		  "reinterpret"
	  block_version		  "10.1"
	  sg_icon_stat		  "50,32,1,1,white,blue,0,8982c1db,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 50 50 0 ],[0 0 32 32 ],[0.77 0.82 0.91]);\npatch([16 11 18 11 16 2"
"4 26 28 37 30 23 18 25 18 23 30 37 28 26 24 16 ],[3 8 15 22 27 27 25 27 27 20"
" 27 22 15 8 3 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 50 50 0 0 ],[0 0 32 "
"32 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: beg"
"in icon text');\ncolor('black');disp('reinterpret');\nfprintf('','COMMENT: en"
"d icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Relational"
	  Ports			  [2, 1]
	  Position		  [675, 732, 730, 788]

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