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📄 gsm_ddc_cic.mdl

📁 This is GMS down upper converter and down converter in simulink. you may understand the structure in
💻 MDL
📖 第 1 页 / 共 5 页
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	      IncludeMdlTerminateFcn  on
	      CombineOutputUpdateFcns off
	      SuppressErrorStatus     off
	      IncludeFileDelimiter    "Auto"
	      ERTCustomFileBanners    off
	      SupportAbsoluteTime     on
	      LogVarNameModifier      "rt_"
	      MatFileLogging	      on
	      MultiInstanceERTCode    off
	      SupportNonFinite	      on
	      SupportComplex	      on
	      PurelyIntegerCode	      off
	      SupportContinuousTime   on
	      SupportNonInlinedSFcns  on
	      EnableShiftOperators    on
	      ParenthesesLevel	      "Nominal"
	      ExtMode		      off
	      ExtModeStaticAlloc      off
	      ExtModeTesting	      off
	      ExtModeStaticAllocSize  1000000
	      ExtModeTransport	      0
	      ExtModeMexFile	      "ext_comm"
	      RTWCAPISignals	      off
	      RTWCAPIParams	      off
	      RTWCAPIStates	      off
	      GenerateASAP2	      off
	    }
	    PropName		    "Components"
	  }
	}
	PropName		"Components"
      }
      Name		      "Configuration"
      SimulationMode	      "normal"
      CurrentDlgPage	      "Solver"
    }
    PropName		    "ConfigurationSets"
  }
  Simulink.ConfigSet {
    $PropName		    "ActiveConfigurationSet"
    $ObjectID		    1
  }
  BlockDefaults {
    Orientation		    "right"
    ForegroundColor	    "black"
    BackgroundColor	    "white"
    DropShadow		    off
    NamePlacement	    "normal"
    FontName		    "Arial"
    FontSize		    10
    FontWeight		    "normal"
    FontAngle		    "normal"
    ShowName		    on
  }
  BlockParameterDefaults {
    Block {
      BlockType		      Constant
    }
    Block {
      BlockType		      DiscretePulseGenerator
      PulseType		      "Sample based"
      TimeSource	      "Use simulation time"
      Amplitude		      "1"
      Period		      "2"
      PulseWidth	      "1"
      PhaseDelay	      "0"
      SampleTime	      "1"
      VectorParams1D	      on
    }
    Block {
      BlockType		      FrameConversion
      OutFrame		      "Frame based"
    }
    Block {
      BlockType		      From
      IconDisplay	      "Tag"
    }
    Block {
      BlockType		      FromWorkspace
      VariableName	      "simulink_input"
      SampleTime	      "-1"
      Interpolate	      on
      ZeroCross		      off
      OutputAfterFinalValue   "Extrapolation"
    }
    Block {
      BlockType		      Goto
      IconDisplay	      "Tag"
    }
    Block {
      BlockType		      Inport
      Port		      "1"
      UseBusObject	      off
      BusObject		      "BusObject"
      BusOutputAsStruct	      off
      PortDimensions	      "-1"
      SampleTime	      "-1"
      DataType		      "auto"
      OutDataType	      "sfix(16)"
      OutScaling	      "2^0"
      SignalType	      "auto"
      SamplingMode	      "auto"
      LatchByDelayingOutsideSignal off
      LatchByCopyingInsideSignal off
      Interpolate	      on
    }
    Block {
      BlockType		      MATLABFcn
      MATLABFcn		      "sin"
      OutputDimensions	      "-1"
      OutputSignalType	      "auto"
      Output1D		      on
      SampleTime	      "-1"
    }
    Block {
      BlockType		      Mux
      Inputs		      "4"
      DisplayOption	      "none"
      UseBusObject	      off
      BusObject		      "BusObject"
      NonVirtualBus	      off
    }
    Block {
      BlockType		      Outport
      Port		      "1"
      UseBusObject	      off
      BusObject		      "BusObject"
      BusOutputAsStruct	      off
      PortDimensions	      "-1"
      SampleTime	      "-1"
      DataType		      "auto"
      OutDataType	      "sfix(16)"
      OutScaling	      "2^0"
      SignalType	      "auto"
      SamplingMode	      "auto"
      OutputWhenDisabled      "held"
      InitialOutput	      "[]"
    }
    Block {
      BlockType		      Reference
    }
    Block {
      BlockType		      Reshape
      OutputDimensionality    "1-D array"
      OutputDimensions	      "[1,1]"
    }
    Block {
      BlockType		      Scope
      ModelBased	      off
      TickLabels	      "OneTimeTick"
      ZoomMode		      "on"
      Grid		      "on"
      TimeRange		      "auto"
      YMin		      "-5"
      YMax		      "5"
      SaveToWorkspace	      off
      SaveName		      "ScopeData"
      LimitDataPoints	      on
      MaxDataPoints	      "5000"
      Decimation	      "1"
      SampleInput	      off
      SampleTime	      "-1"
    }
    Block {
      BlockType		      "S-Function"
      FunctionName	      "system"
      SFunctionModules	      "''"
      PortCounts	      "[]"
    }
    Block {
      BlockType		      SubSystem
      ShowPortLabels	      on
      Permissions	      "ReadWrite"
      PermitHierarchicalResolution "All"
      TreatAsAtomicUnit	      off
      SystemSampleTime	      "-1"
      RTWFcnNameOpts	      "Auto"
      RTWFileNameOpts	      "Auto"
      RTWMemSecFuncInitTerm   "Inherit from model"
      RTWMemSecFuncExecute    "Inherit from model"
      RTWMemSecDataConstants  "Inherit from model"
      RTWMemSecDataInternal   "Inherit from model"
      RTWMemSecDataParameters "Inherit from model"
      SimViewingDevice	      off
      DataTypeOverride	      "UseLocalSettings"
      MinMaxOverflowLogging   "UseLocalSettings"
    }
    Block {
      BlockType		      Terminator
    }
    Block {
      BlockType		      ToWorkspace
      VariableName	      "simulink_output"
      MaxDataPoints	      "1000"
      Decimation	      "1"
      SampleTime	      "0"
      FixptAsFi		      off
    }
  }
  AnnotationDefaults {
    HorizontalAlignment	    "center"
    VerticalAlignment	    "middle"
    ForegroundColor	    "black"
    BackgroundColor	    "white"
    DropShadow		    off
    FontName		    "Arial"
    FontSize		    10
    FontWeight		    "normal"
    FontAngle		    "normal"
  }
  LineDefaults {
    FontName		    "Arial"
    FontSize		    9
    FontWeight		    "normal"
    FontAngle		    "normal"
  }
  System {
    Name		    "gsm_ddc_cic"
    Location		    [202, 74, 1598, 1154]
    Open		    off
    ModelBrowserVisibility  on
    ModelBrowserWidth	    200
    ScreenColor		    "white"
    PaperOrientation	    "landscape"
    PaperPositionMode	    "auto"
    PaperType		    "usletter"
    PaperUnits		    "inches"
    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
    TiledPageScale	    1
    ShowPageBoundaries	    off
    ZoomFactor		    "100"
    ReportName		    "simulink-default.rpt"
    Block {
      BlockType		      Reference
      Name		      " System Generator1"
      Tag		      "genX"
      Ports		      []
      Position		      [24, 17, 75, 67]
      ShowName		      off
      AttributesFormatString  "System\\nGenerator"
      UserDataPersistent      on
      UserData		      "DataTag0"
      SourceBlock	      "xbsIndex_r4/ System Generator"
      SourceType	      "Xilinx System Generator Block"
      ShowPortLabels	      on
      SystemSampleTime	      "-1"
      FunctionWithSeparateData off
      RTWMemSecFuncInitTerm   "Inherit from model"
      RTWMemSecFuncExecute    "Inherit from model"
      RTWMemSecDataConstants  "Inherit from model"
      RTWMemSecDataInternal   "Inherit from model"
      RTWMemSecDataParameters "Inherit from model"
      infoedit		      " System Generator"
      xilinxfamily	      "virtex5"
      part		      "xc5vsx50t"
      speed		      "-1"
      package		      "ff665"
      synthesis_tool	      "XST"
      clock_wrapper	      "Clock Enables"
      directory		      "./ngc_netlist_cic_no_dsp48"
      testbench		      off
      simulink_period	      "1"
      sysclk_period	      "1e9/(4*16*2*8*1.625e6/6)"
      dcm_input_clock_period  "100"
      incr_netlist	      off
      trim_vbits	      "Everywhere in SubSystem"
      dbl_ovrd		      "According to Block Masks"
      core_generation	      "According to Block Masks"
      run_coregen	      off
      deprecated_control      off
      eval_field	      "0"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "sysgen"
      block_version	      "9.1.01"
      sg_icon_stat	      "51,50,-1,-1,red,beige,0,07734"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 51 51 0 ],[0 0 50 50 ],[0.93 0.92 0.86]);\npatch([12 4 16 4 12 25 29 3"
"3 47 36 25 17 29 17 25 36 47 33 29 25 12 ],[5 13 25 37 45 45 41 45 45 34 45 3"
"7 25 13 5 16 5 5 9 5 5 ],[0.6 0.2 0.25]);\nplot([0 0 51 51 0 ],[0 50 50 0 0 ]"
");\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ico"
"n text');\nfprintf('','COMMENT: end icon text');\n"
    }
    Block {
      BlockType		      SubSystem
      Name		      "CIC filters"
      Ports		      [3, 2]
      Position		      [380, 188, 510, 492]
      MinAlgLoopOccurrences   off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      MaskHideContents	      off
      System {
	Name			"CIC filters"
	Location		[202, 74, 1414, 860]
	Open			off
	ModelBrowserVisibility	on
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"A4"
	PaperUnits		"centimeters"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"100"
	Block {
	  BlockType		  Inport
	  Name			  "din_i"
	  Position		  [25, 68, 55, 82]
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "din_q"
	  Position		  [25, 283, 55, 297]
	  Port			  "2"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Inport
	  Name			  "vin"
	  Position		  [25, 163, 55, 177]
	  Port			  "3"
	  IconDisplay		  "Port number"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Constant"
	  Ports			  [0, 1]
	  Position		  [550, 781, 610, 809]
	  SourceBlock		  "xbsIndex_r4/Constant"
	  SourceType		  "Xilinx Constant Block Block"
	  arith_type		  "Signed (2's comp)"
	  const			  "16"
	  n_bits		  "5"
	  bin_pt		  "0"
	  explicit_period	  "off"
	  period		  "1"
	  dsp48_infoedit	  "The use of this block for DSP48 instruction"
"s is deprecated.  Please use the Opmode block."
	  equ			  "P=C"
	  opselect		  "C"
	  inp2			  "PCIN>>17"
	  opr			  "+"
	  inp1			  "P"
	  carry			  "CIN"
	  dbl_ovrd		  "off"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,400,346"
	  block_type		  "constant"
	  block_version		  "10.1"
	  sg_icon_stat		  "60,28,1,1,white,blue,0,f7427cc9,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 55 55 0 ],[0 0 26 26 ],[0.77 0.82 0.91]);\npatch([20 16 22 16 20 2"
"7 29 31 38 32 26 22 28 22 26 32 38 31 29 27 20 ],[3 7 13 19 23 23 21 23 23 17"
" 23 19 13 7 3 9 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 26 2"
"6 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begi"
"n icon text');\ncolor('black');port_label('output',1,'15');\nfprintf('','COMM"
"ENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Convert"
	  Ports			  [1, 1]
	  Position		  [80, 570, 110, 615]
	  Orientation		  "down"
	  SourceBlock		  "xbsIndex_r4/Convert"
	  SourceType		  "Xilinx Type Converter Block"
	  infoedit		  "Hardware notes: rounding and saturating req"
"uire hardware resources; truncating and wrapping do not."
	  arith_type		  "Boolean"
	  n_bits		  "16"
	  bin_pt		  "14"
	  quantization		  "Truncate"
	  overflow		  "Wrap"
	  latency		  "0"
	  dbl_ovrd		  "off"
	  pipeline		  "off"
	  xl_use_area		  "off"
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,461,334"
	  block_type		  "convert"
	  block_version		  "10.1"
	  sg_icon_stat		  "30,45,1,1,white,blue,0,74901e60,down"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 45 45 0 ],[0 0 30 30 ],[0.77 0.82 0.91]);\npatch([15 10 17 10 15 2"
"3 25 27 35 28 22 17 23 17 22 28 35 27 25 23 15 ],[3 8 15 22 27 27 25 27 27 20"
" 26 21 15 9 4 10 3 3 5 3 3 ],[0.98 0.96 0.92]);\nplot([0 45 45 0 0 ],[0 0 30 "
"30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: beg"
"in icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','C"
"OMMENT: end icon text');\n"
	  Port {
	    PortNumber		    1
	    Name		    "count_over"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "Convert2"
	  Ports			  [1, 1]
	  Position		  [1110, 695, 1155, 725]
	  SourceBlock		  "xbsIndex_r4/Convert"
	  SourceType		  "Xilinx Type Converter Block"
	  infoedit		  "Hardware notes: rounding and saturating req"
"uire hardware resources; truncating and wrapping do not."
	  arith_type		  "Boolean"
	  n_bits		  "16"
	  bin_pt		  "14"

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