gsm_ddc_cic_init.m

This is GMS down upper converter and down converter in simulink. you may understand the structure in

addpath ../../model
run gsm_ddc_cic_model;
load ../../model/ddc_input.mat;

% The input to the model is the signal saved after DUC simulation, which
% has been scaled to mimic an AGC function and delayed to mimic the channel
ddc_input = ddc_input(1:keep_size);   % don't need full vector for SysGen

% There is a difference in the way the Matlab model functions in comparison
% with the CIC Compiler implementation - in order to match up the output
% samples, the CIC stages must be filled first of all with zeroes
% (alternatively, the filter function in the model can be given an initial
% state input).  This means (stages-1) zero samples must be added to the
% input sample stream.  There is already a start-up delay of 3 samples
% associated with loading the input sample data into the model, therefore
% only a single zero sample is prepended to match up the model.
%ddc_input = [ zeros(1,1) ; ddc_input ];

ddc_input_i = [ (1:clk_os:clk_os*length(ddc_input)).' real(ddc_input) ];
ddc_input_q = [ (1:clk_os:clk_os*length(ddc_input)).' imag(ddc_input) ];
clear ddc_input keep_size;
rmpath ../../model