gsm_duc_cic.mdl

This is GMS down upper converter and down converter in simulink. you may understand the structure in

"30 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: beg"
"in icon text');\ncolor('black');port_label('output',1,'cast');\nfprintf('','C"
"OMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Counter1"
	  Ports			  [2, 1]
	  Position		  [1075, 245, 1135, 305]
	  SourceBlock		  "xbsIndex_r4/Counter"
	  SourceType		  "Xilinx Counter Block"
	  infoedit		  "Hardware notes: Free running counters are t"
"he least expensive in hardware.  A count limited counter is implemented by co"
"mbining a counter with a comparator."
	  cnt_type		  "Free Running"
	  cnt_to		  "8"
	  operation		  "Up"
	  start_count		  "0"
	  cnt_by_val		  "1"
	  arith_type		  "Unsigned"
	  n_bits		  "3"
	  bin_pt		  "0"
	  load_pin		  "off"
	  rst			  "on"
	  en			  "on"
	  explicit_period	  "on"
	  period		  "1"
	  dbl_ovrd		  "off"
	  use_behavioral_HDL	  "off"
	  use_rpm		  "off"
	  xl_use_area		  "off"
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,348,619"
	  block_type		  "counter"
	  block_version		  "10.1"
	  sg_icon_stat		  "60,60,1,1,white,blue,0,46c73e85,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 60 60 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([14 4 18 4 14 30 "
"34 38 55 42 29 20 35 20 29 42 55 38 34 30 14 ],[6 16 30 44 54 54 50 54 54 41 "
"54 45 30 15 6 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 60"
" 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');port_label('input',1,'rst');\ncolor('black')"
";port_label('input',2,'en');\ncolor('black');port_label('output',1,'out');\nf"
"printf('','COMMENT: end icon text');\n"
	  Port {
	    PortNumber		    1
	    Name		    "count"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "Expression"
	  Ports			  [4, 1]
	  Position		  [905, 233, 1030, 347]
	  SourceBlock		  "xbsIndex_r4/Expression"
	  SourceType		  "Xilinx Bitwise Expression Evaluator Block"
	  expression		  "a & b & c & lt2"
	  align_bp		  "on"
	  en			  "off"
	  latency		  "1"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  dbl_ovrd		  "off"
	  xl_use_area		  "off"
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,348,229"
	  block_type		  "expr"
	  block_version		  "10.1"
	  sg_icon_stat		  "125,114,1,1,white,blue,0,45436952,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 125 125 0 ],[0 0 114 114 ],[0.77 0.82 0.91]);\npatch([32 13 40 13 "
"32 62 70 78 110 85 61 43 70 43 61 85 110 78 70 62 32 ],[12 31 58 85 104 104 9"
"6 104 104 79 103 85 58 31 13 37 12 12 20 12 12 ],[0.98 0.96 0.92]);\nplot([0 "
"125 125 0 0 ],[0 0 114 114 0 ]);\nfprintf('','COMMENT: end icon graphics');\n"
"fprintf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,"
"'a');\ncolor('black');port_label('input',2,'b');\ncolor('black');port_label('"
"input',3,'c');\ncolor('black');port_label('input',4,'lt2');\ncolor('black');d"
"isp('a & b & c & lt2');\nfprintf('','COMMENT: end icon text');\n"
	  Port {
	    PortNumber		    1
	    Name		    "count_en"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "I_DPRAM"
	  Ports			  [4, 2]
	  Position		  [540, 17, 615, 183]
	  SourceBlock		  "xbsIndex_r4/Dual Port RAM"
	  SourceType		  "Xilinx Dual Port Random Access Memory Block"
	  depth			  "4"
	  initVector		  "[0 0 0 0]"
	  distributed_mem	  "Distributed memory"
	  init_a		  "0"
	  init_b		  "0"
	  rst_a			  "off"
	  rst_b			  "off"
	  en_a			  "off"
	  en_b			  "off"
	  latency		  "1"
	  write_mode_A		  "Read After Write"
	  write_mode_B		  "Read After Write"
	  dbl_ovrd		  "off"
	  optimize		  "Area"
	  use_rpm		  "on"
	  xl_use_area		  "off"
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,384,398"
	  block_type		  "dpram"
	  block_version		  "10.1"
	  sg_icon_stat		  "75,166,1,1,white,blue,0,0f7f0533,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 75 75 0 ],[0 0 166 166 ],[0.77 0.82 0.91]);\npatch([17 5 23 5 17 3"
"7 42 47 68 51 35 23 40 23 35 51 68 47 42 37 17 ],[54 66 84 102 114 114 109 11"
"4 114 97 113 101 84 67 55 71 54 54 59 54 54 ],[0.98 0.96 0.92]);\nplot([0 75 "
"75 0 0 ],[0 0 166 166 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprin"
"tf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr"
"a');\ncolor('black');port_label('input',2,'dina');\ncolor('black');port_label"
"('input',3,'wea');\ncolor('black');port_label('input',4,'addrb');\ncolor('bla"
"ck');port_label('output',1,'A');\ncolor('black');port_label('output',2,'B');"
"\nfprintf('','COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Inverter"
	  Ports			  [1, 1]
	  Position		  [310, 117, 365, 143]
	  SourceBlock		  "xbsIndex_r4/Inverter"
	  SourceType		  "Xilinx Inverter Block"
	  infoedit		  "Bitwise logical negation (one's complement)"
" operator."
	  en			  "off"
	  latency		  "0"
	  dbl_ovrd		  "off"
	  xl_use_area		  "off"
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "inv"
	  block_version		  "10.1"
	  sg_icon_stat		  "55,26,1,1,white,blue,0,1ab4a85f,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 55 55 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 "
"32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[7 16 29 42 51 51 47 51 51 39 "
"51 42 29 16 7 19 7 7 11 7 7 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 58"
" 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');disp('not');\nfprintf('','COMMENT: end icon "
"text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Inverter1"
	  Ports			  [1, 1]
	  Position		  [940, 162, 995, 188]
	  SourceBlock		  "xbsIndex_r4/Inverter"
	  SourceType		  "Xilinx Inverter Block"
	  infoedit		  "Bitwise logical negation (one's complement)"
" operator."
	  en			  "off"
	  latency		  "1"
	  dbl_ovrd		  "off"
	  xl_use_area		  "off"
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,348,251"
	  block_type		  "inv"
	  block_version		  "10.1"
	  sg_icon_stat		  "55,26,1,1,white,blue,0,8c39c053,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 55 55 0 ],[0 0 58 58 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 "
"32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[7 16 29 42 51 51 47 51 51 39 "
"51 42 29 16 7 19 7 7 11 7 7 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 58"
" 58 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');disp('\\newline\\bf{not}\\newlinez^{-1}','te"
"xmode','on');\nfprintf('','COMMENT: end icon text');\n"
	  Port {
	    PortNumber		    1
	    Name		    "count_rst"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical"
	  Ports			  [2, 1]
	  Position		  [415, 342, 470, 378]
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "AND"
	  inputs		  "2"
	  en			  "off"
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  "on"
	  dbl_ovrd		  "off"
	  xl_use_area		  "off"
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  block_version		  "10.1"
	  sg_icon_stat		  "55,36,1,1,white,blue,0,087b5522,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 "
"32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52 40 "
"52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 60"
" 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');disp('\\newlineand\\newlinez^{-0}','texmode'"
",'on');\nfprintf('','COMMENT: end icon text');\n"
	  Port {
	    PortNumber		    1
	    Name		    "vin_q"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "Logical1"
	  Ports			  [2, 1]
	  Position		  [460, 102, 515, 138]
	  SourceBlock		  "xbsIndex_r4/Logical"
	  SourceType		  "Xilinx Logical Block Block"
	  logical_function	  "AND"
	  inputs		  "2"
	  en			  "off"
	  latency		  "0"
	  precision		  "Full"
	  arith_type		  "Unsigned"
	  n_bits		  "16"
	  bin_pt		  "0"
	  align_bp		  "on"
	  dbl_ovrd		  "off"
	  xl_use_area		  "off"
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "logical"
	  block_version		  "10.1"
	  sg_icon_stat		  "55,36,1,1,white,blue,0,087b5522,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 55 55 0 ],[0 0 60 60 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 "
"32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[8 17 30 43 52 52 48 52 52 40 "
"52 43 30 17 8 20 8 8 12 8 8 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 60"
" 60 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');disp('\\newlineand\\newlinez^{-0}','texmode'"
",'on');\nfprintf('','COMMENT: end icon text');\n"
	  Port {
	    PortNumber		    1
	    Name		    "vin_i"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Reference
	  Name			  "Q_DPRAM"
	  Ports			  [4, 2]
	  Position		  [540, 257, 615, 423]
	  SourceBlock		  "xbsIndex_r4/Dual Port RAM"
	  SourceType		  "Xilinx Dual Port Random Access Memory Block"
	  depth			  "4"
	  initVector		  "[0 0 0 0]"
	  distributed_mem	  "Distributed memory"
	  init_a		  "0"
	  init_b		  "0"
	  rst_a			  "off"
	  rst_b			  "off"
	  en_a			  "off"
	  en_b			  "off"
	  latency		  "1"
	  write_mode_A		  "Read After Write"
	  write_mode_B		  "Read After Write"
	  dbl_ovrd		  "off"
	  optimize		  "Area"
	  use_rpm		  "on"
	  xl_use_area		  "off"
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,384,398"
	  block_type		  "dpram"
	  block_version		  "10.1"
	  sg_icon_stat		  "75,166,1,1,white,blue,0,0f7f0533,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 75 75 0 ],[0 0 166 166 ],[0.77 0.82 0.91]);\npatch([17 5 23 5 17 3"
"7 42 47 68 51 35 23 40 23 35 51 68 47 42 37 17 ],[54 66 84 102 114 114 109 11"
"4 114 97 113 101 84 67 55 71 54 54 59 54 54 ],[0.98 0.96 0.92]);\nplot([0 75 "
"75 0 0 ],[0 0 166 166 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprin"
"tf('','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'addr"
"a');\ncolor('black');port_label('input',2,'dina');\ncolor('black');port_label"
"('input',3,'wea');\ncolor('black');port_label('input',4,'addrb');\ncolor('bla"
"ck');port_label('output',1,'A');\ncolor('black');port_label('output',2,'B');"
"\nfprintf('','COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Register1"
	  Ports			  [1, 1]
	  Position		  [1250, 396, 1290, 434]
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  "off"
	  en			  "off"
	  dbl_ovrd		  "off"
	  xl_use_area		  "off"
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,348,193"
	  block_type		  "register"
	  block_version		  "10.1"
	  sg_icon_stat		  "40,38,1,1,white,blue,0,ac6b57db,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 "
"34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 "
"49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56"
" 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');p"
"ort_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on'"
");\nfprintf('','COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Register2"
	  Ports			  [1, 1]
	  Position		  [365, 226, 405, 264]
	  SourceBlock		  "xbsIndex_r4/Register"
	  SourceType		  "Xilinx Register Block"
	  init			  "0"
	  rst			  "off"
	  en			  "off"
	  dbl_ovrd		  "off"
	  xl_use_area		  "off"
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,348,193"
	  block_type		  "register"
	  block_version		  "10.1"
	  sg_icon_stat		  "40,38,1,1,white,blue,0,ac6b57db,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 "
"34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 "
"49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56"
" 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');port_label('input',1,'d');\ncolor('black');p"
"ort_label('output',1,'q');\ncolor('black');disp('\\bf{z^{-1}}','texmode','on'"
");\nfprintf('','COMMENT: end icon text');\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Relational"
	  Ports			  [2, 1]
	  Position		  [1265, 262, 1320, 318]
	  SourceBlock		  "xbsIndex_r4/Relational"
	  SourceType		  "Xilinx Arithmetic Relational Operator Block"
	  mode			  "a<b"
	  en			  "off"
	  latency		  "1"
	  dbl_ovrd		  "off"
	  xl_use_area		  "off"
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "20,20,348,193"
	  block_type		  "relational"
	  block_version		  "10.1"
	  sg_icon_stat		  "55,56,1,1,white,blue,0,3ac94b81,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 55 55 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([13 4 17 4 13 28 "
"32 36 52 40 28 19 32 19 28 40 52 36 32 28 13 ],[6 15 28 41 50 50 46 50 50 38 "
"50 41 28 15 6 18 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 55 55 0 0 ],[0 0 56"
" 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');port_label('input',1,'a');\ncolor('black');p"
"ort_label('input',2,'b');\ncolor('black');disp('\\newline\\bf{a<b}\\newlinez^"
"{-1}','texmode','on');\nfprintf('','COMMENT: end icon text');\n"
	  Port {
	    PortNumber		    1
	    Name		    "lt2"
	    RTWStorageClass	    "Auto"
	    DataLoggingNameMode	    "SignalName"
	  }
	}
	Block {
	  BlockType		  Scope
	  Name			  "Scope"
	  Ports			  [10]
	  Position		  [1235, 517, 1325, 658]
	  Floating		  off
	  Location		  [5, 49, 1605, 1173]
	  Open			  off
	  NumInputPorts		  "10"
	  ZoomMode		  "xonly"
	  List {
	    ListType		    AxesTitles
	    axes1		    "%<SignalLabel>"
	    axes2		    "%<SignalLabel>"
	    axes3		    "%<SignalLabel>"
	    axes4		    "%<SignalLabel>"
	    axes5		    "%<SignalLabel>"
	    axes6		    "%<SignalLabel>"
	    axes7		    "%<SignalLabel>"
	    axes8		    "%<SignalLabel>"
	    axes9		    "%<SignalLabel>"
	    axes10		    "%<SignalLabel>"
	  }