📄 gsm_duc_cic.mdl
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LogVarNameModifier "rt_"
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SupportContinuousTime on
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ParenthesesLevel "Nominal"
ExtMode off
ExtModeStaticAlloc off
ExtModeTesting off
ExtModeStaticAllocSize 1000000
ExtModeTransport 0
ExtModeMexFile "ext_comm"
RTWCAPISignals off
RTWCAPIParams off
RTWCAPIStates off
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}
PropName "Components"
}
}
PropName "Components"
}
Name "Configuration"
SimulationMode "normal"
CurrentDlgPage "Solver"
}
PropName "ConfigurationSets"
}
Simulink.ConfigSet {
$PropName "ActiveConfigurationSet"
$ObjectID 1
}
BlockDefaults {
Orientation "right"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
NamePlacement "normal"
FontName "Arial"
FontSize 10
FontWeight "normal"
FontAngle "normal"
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BlockParameterDefaults {
Block {
BlockType Constant
}
Block {
BlockType Demux
Outputs "4"
DisplayOption "none"
BusSelectionMode off
}
Block {
BlockType DiscretePulseGenerator
PulseType "Sample based"
TimeSource "Use simulation time"
Amplitude "1"
Period "2"
PulseWidth "1"
PhaseDelay "0"
SampleTime "1"
VectorParams1D on
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Block {
BlockType FrameConversion
OutFrame "Frame based"
}
Block {
BlockType From
IconDisplay "Tag"
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Block {
BlockType FromWorkspace
VariableName "simulink_input"
SampleTime "-1"
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ZeroCross off
OutputAfterFinalValue "Extrapolation"
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Block {
BlockType Goto
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Block {
BlockType Inport
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BusObject "BusObject"
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PortDimensions "-1"
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DataType "auto"
OutDataType "sfix(16)"
OutScaling "2^0"
SignalType "auto"
SamplingMode "auto"
LatchByDelayingOutsideSignal off
LatchByCopyingInsideSignal off
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Block {
BlockType MATLABFcn
MATLABFcn "sin"
OutputDimensions "-1"
OutputSignalType "auto"
Output1D on
SampleTime "-1"
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Block {
BlockType Mux
Inputs "4"
DisplayOption "none"
UseBusObject off
BusObject "BusObject"
NonVirtualBus off
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Block {
BlockType Outport
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BusObject "BusObject"
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Block {
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Block {
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MaxDataPoints "5000"
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Block {
BlockType "S-Function"
FunctionName "system"
SFunctionModules "''"
PortCounts "[]"
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Block {
BlockType SubSystem
ShowPortLabels on
Permissions "ReadWrite"
PermitHierarchicalResolution "All"
TreatAsAtomicUnit off
SystemSampleTime "-1"
RTWFcnNameOpts "Auto"
RTWFileNameOpts "Auto"
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
SimViewingDevice off
DataTypeOverride "UseLocalSettings"
MinMaxOverflowLogging "UseLocalSettings"
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Block {
BlockType Terminator
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Block {
BlockType ToWorkspace
VariableName "simulink_output"
MaxDataPoints "1000"
Decimation "1"
SampleTime "0"
FixptAsFi off
}
}
AnnotationDefaults {
HorizontalAlignment "center"
VerticalAlignment "middle"
ForegroundColor "black"
BackgroundColor "white"
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FontName "Arial"
FontSize 10
FontWeight "normal"
FontAngle "normal"
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LineDefaults {
FontName "Arial"
FontSize 9
FontWeight "normal"
FontAngle "normal"
}
System {
Name "gsm_duc_cic"
Location [172, 70, 1598, 1150]
Open on
ModelBrowserVisibility on
ModelBrowserWidth 170
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "usletter"
PaperUnits "inches"
TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
TiledPageScale 1
ShowPageBoundaries off
ZoomFactor "100"
ReportName "simulink-default.rpt"
Block {
BlockType Reference
Name " System Generator1"
Tag "genX"
Ports []
Position [44, 32, 95, 82]
ShowName off
AttributesFormatString "System\\nGenerator"
UserDataPersistent on
UserData "DataTag0"
SourceBlock "xbsIndex_r4/ System Generator"
SourceType "Xilinx System Generator Block"
ShowPortLabels on
SystemSampleTime "-1"
FunctionWithSeparateData off
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
infoedit " System Generator"
xilinxfamily "virtex5"
part "xc5vsx50t"
speed "-1"
package "ff665"
synthesis_tool "XST"
clock_wrapper "Clock Enables"
directory "./ngc_netlist_dds_dsp48_off"
testbench off
simulink_period "1"
sysclk_period "1e9/(4*16*2*8*1.625e6/6)"
dcm_input_clock_period "100"
incr_netlist off
trim_vbits "Everywhere in SubSystem"
dbl_ovrd "According to Block Masks"
core_generation "According to Block Masks"
run_coregen off
deprecated_control off
eval_field "0"
has_advanced_control "0"
sggui_pos "-1,-1,-1,-1"
block_type "sysgen"
block_version "9.1.01"
sg_icon_stat "51,50,-1,-1,red,beige,0,07734"
sg_mask_display "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 51 51 0 ],[0 0 50 50 ],[0.93 0.92 0.86]);\npatch([12 4 16 4 12 25 29 3"
"3 47 36 25 17 29 17 25 36 47 33 29 25 12 ],[5 13 25 37 45 45 41 45 45 34 45 3"
"7 25 13 5 16 5 5 9 5 5 ],[0.6 0.2 0.25]);\nplot([0 0 51 51 0 ],[0 50 50 0 0 ]"
");\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ico"
"n text');\nfprintf('','COMMENT: end icon text');\n"
}
Block {
BlockType SubSystem
Name "4-ch GMSK1"
Ports [0, 8]
Position [25, 235, 70, 580]
MinAlgLoopOccurrences off
RTWSystemCode "Auto"
FunctionWithSeparateData off
MaskHideContents off
System {
Name "4-ch GMSK1"
Location [581, 473, 1411, 954]
Open off
ModelBrowserVisibility on
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "A4"
PaperUnits "centimeters"
TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
TiledPageScale 1
ShowPageBoundaries off
ZoomFactor "100"
Block {
BlockType Demux
Name "Demux"
Ports [1, 16]
Position [225, 55, 235, 405]
BackgroundColor "black"
ShowName off
Outputs "16"
DisplayOption "bar"
}
Block {
BlockType FromWorkspace
Name "From\nWorkspace"
Position [105, 218, 170, 242]
VariableName "gmsk_data"
SampleTime "tsamp"
Interpolate off
OutputAfterFinalValue "Setting to zero"
}
Block {
BlockType Mux
Name "Mux"
Ports [8, 1]
Position [275, 231, 285, 409]
ShowName off
Inputs "8"
DisplayOption "bar"
}
Block {
BlockType Terminator
Name "Terminator"
Position [325, 310, 345, 330]
}
Block {
BlockType Outport
Name "c1_i"
Position [605, 73, 635, 87]
IconDisplay "Port number"
BusOutputAsStruct off
}
Block {
BlockType Outport
Name "c1_q"
Position [565, 93, 595, 107]
Port "2"
IconDisplay "Port number"
BusOutputAsStruct off
}
Block {
BlockType Outport
Name "c2_i"
Position [525, 113, 555, 127]
Port "3"
IconDisplay "Port number"
BusOutputAsStruct off
}
Block {
BlockType Outport
Name "c2_q"
Position [480, 133, 510, 147]
Port "4"
IconDisplay "Port number"
BusOutputAsStruct off
}
Block {
BlockType Outport
Name "c3_i"
Position [430, 153, 460, 167]
Port "5"
IconDisplay "Port number"
BusOutputAsStruct off
}
Block {
BlockType Outport
Name "c3_q"
Position [385, 173, 415, 187]
Port "6"
IconDisplay "Port number"
BusOutputAsStruct off
}
Block {
BlockType Outport
Name "c4_i"
Position [340, 193, 370, 207]
Port "7"
IconDisplay "Port number"
BusOutputAsStruct off
}
Block {
BlockType Outport
Name "c4_q"
Position [300, 213, 330, 227]
Port "8"
IconDisplay "Port number"
BusOutputAsStruct off
}
Line {
SrcBlock "From\nWorkspace"
SrcPort 1
DstBlock "Demux"
DstPort 1
}
Line {
SrcBlock "Mux"
SrcPort 1
DstBlock "Terminator"
DstPort 1
}
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