gmsk_mod.mdl

This is GMS down upper converter and down converter in simulink. you may understand the structure in

      BusOutputAsStruct	      off
      PortDimensions	      "-1"
      SampleTime	      "-1"
      DataType		      "auto"
      OutDataType	      "sfix(16)"
      OutScaling	      "2^0"
      SignalType	      "auto"
      SamplingMode	      "auto"
      LatchByDelayingOutsideSignal off
      LatchByCopyingInsideSignal off
      Interpolate	      on
    }
    Block {
      BlockType		      Mux
      Inputs		      "4"
      DisplayOption	      "none"
      UseBusObject	      off
      BusObject		      "BusObject"
      NonVirtualBus	      off
    }
    Block {
      BlockType		      Outport
      Port		      "1"
      UseBusObject	      off
      BusObject		      "BusObject"
      BusOutputAsStruct	      off
      PortDimensions	      "-1"
      SampleTime	      "-1"
      DataType		      "auto"
      OutDataType	      "sfix(16)"
      OutScaling	      "2^0"
      SignalType	      "auto"
      SamplingMode	      "auto"
      OutputWhenDisabled      "held"
      InitialOutput	      "[]"
    }
    Block {
      BlockType		      Quantizer
      QuantizationInterval    "0.5"
      LinearizeAsGain	      on
      SampleTime	      "-1"
    }
    Block {
      BlockType		      Reference
    }
    Block {
      BlockType		      "S-Function"
      FunctionName	      "system"
      SFunctionModules	      "''"
      PortCounts	      "[]"
    }
    Block {
      BlockType		      SubSystem
      ShowPortLabels	      on
      Permissions	      "ReadWrite"
      PermitHierarchicalResolution "All"
      TreatAsAtomicUnit	      off
      SystemSampleTime	      "-1"
      RTWFcnNameOpts	      "Auto"
      RTWFileNameOpts	      "Auto"
      RTWMemSecFuncInitTerm   "Inherit from model"
      RTWMemSecFuncExecute    "Inherit from model"
      RTWMemSecDataConstants  "Inherit from model"
      RTWMemSecDataInternal   "Inherit from model"
      RTWMemSecDataParameters "Inherit from model"
      SimViewingDevice	      off
      DataTypeOverride	      "UseLocalSettings"
      MinMaxOverflowLogging   "UseLocalSettings"
    }
    Block {
      BlockType		      ToWorkspace
      VariableName	      "simulink_output"
      MaxDataPoints	      "1000"
      Decimation	      "1"
      SampleTime	      "0"
      FixptAsFi		      off
    }
  }
  AnnotationDefaults {
    HorizontalAlignment	    "center"
    VerticalAlignment	    "middle"
    ForegroundColor	    "black"
    BackgroundColor	    "white"
    DropShadow		    off
    FontName		    "Arial"
    FontSize		    10
    FontWeight		    "normal"
    FontAngle		    "normal"
  }
  LineDefaults {
    FontName		    "Arial"
    FontSize		    9
    FontWeight		    "normal"
    FontAngle		    "normal"
  }
  System {
    Name		    "gmsk_mod"
    Location		    [522, 200, 1539, 1093]
    Open		    on
    ModelBrowserVisibility  off
    ModelBrowserWidth	    200
    ScreenColor		    "white"
    PaperOrientation	    "landscape"
    PaperPositionMode	    "auto"
    PaperType		    "A4"
    PaperUnits		    "centimeters"
    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
    TiledPageScale	    1
    ShowPageBoundaries	    off
    ZoomFactor		    "100"
    ReportName		    "simulink-default.rpt"
    Block {
      BlockType		      SubSystem
      Name		      "8-channel GMSK modulator"
      Ports		      [0, 1]
      Position		      [55, 96, 155, 164]
      MinAlgLoopOccurrences   off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      MaskHideContents	      off
      MaskType		      "8-channel GMSK simulator"
      MaskDescription	      "This block simulates baseband GMSK modulation t"
"o produce source samples from 8 random binary channels with different seed va"
"lues.  The BT product, pulse length, symbol time and samples-per-symbol are a"
"ll programmable."
      MaskPromptString	      "BT product|Pulse length, in symbols|Symbol time"
"|Samples per symbol"
      MaskStyleString	      "edit,edit,edit,edit"
      MaskTunableValueString  "on,on,on,on"
      MaskCallbackString      "|||"
      MaskEnableString	      "on,on,on,on"
      MaskVisibilityString    "on,on,on,on"
      MaskToolTipString	      "on,on,on,on"
      MaskVarAliasString      ",,,"
      MaskVariables	      "bt=@1;n=@2;tsym=@3;k=@4;"
      MaskInitialization      "k=8;"
      MaskIconFrame	      on
      MaskIconOpaque	      on
      MaskIconRotate	      "none"
      MaskIconUnits	      "autoscale"
      MaskValueString	      "0.3|4|1024|8"
      MaskTabNameString	      ",,,"
      System {
	Name			"8-channel GMSK modulator"
	Location		[762, 249, 1372, 1048]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"A4"
	PaperUnits		"centimeters"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"100"
	Block {
	  BlockType		  ComplexToRealImag
	  Name			  "Complex to\nReal-Imag"
	  Ports			  [1, 2]
	  Position		  [300, 58, 330, 87]
	  NamePlacement		  "alternate"
	  Output		  "Real and imag"
	}
	Block {
	  BlockType		  ComplexToRealImag
	  Name			  "Complex to\nReal-Imag1"
	  Ports			  [1, 2]
	  Position		  [305, 148, 335, 177]
	  NamePlacement		  "alternate"
	  Output		  "Real and imag"
	}
	Block {
	  BlockType		  ComplexToRealImag
	  Name			  "Complex to\nReal-Imag2"
	  Ports			  [1, 2]
	  Position		  [305, 238, 335, 267]
	  NamePlacement		  "alternate"
	  Output		  "Real and imag"
	}
	Block {
	  BlockType		  ComplexToRealImag
	  Name			  "Complex to\nReal-Imag3"
	  Ports			  [1, 2]
	  Position		  [305, 328, 335, 357]
	  NamePlacement		  "alternate"
	  Output		  "Real and imag"
	}
	Block {
	  BlockType		  ComplexToRealImag
	  Name			  "Complex to\nReal-Imag4"
	  Ports			  [1, 2]
	  Position		  [305, 418, 335, 447]
	  NamePlacement		  "alternate"
	  Output		  "Real and imag"
	}
	Block {
	  BlockType		  ComplexToRealImag
	  Name			  "Complex to\nReal-Imag5"
	  Ports			  [1, 2]
	  Position		  [305, 508, 335, 537]
	  NamePlacement		  "alternate"
	  Output		  "Real and imag"
	}
	Block {
	  BlockType		  ComplexToRealImag
	  Name			  "Complex to\nReal-Imag6"
	  Ports			  [1, 2]
	  Position		  [305, 598, 335, 627]
	  NamePlacement		  "alternate"
	  Output		  "Real and imag"
	}
	Block {
	  BlockType		  ComplexToRealImag
	  Name			  "Complex to\nReal-Imag7"
	  Ports			  [1, 2]
	  Position		  [305, 688, 335, 717]
	  NamePlacement		  "alternate"
	  Output		  "Real and imag"
	}
	Block {
	  BlockType		  Reference
	  Name			  "GMSK\nModulator\nBaseband"
	  Ports			  [1, 1]
	  Position		  [155, 49, 230, 101]
	  SourceBlock		  "commdigbbndcpm2/GMSK\nModulator\nBaseband"
	  SourceType		  "GMSK Modulator Baseband"
	  ShowPortLabels	  "on"
	  SystemSampleTime	  "-1"
	  FunctionWithSeparateData "off"
	  RTWMemSecFuncInitTerm	  "Inherit from model"
	  RTWMemSecFuncExecute	  "Inherit from model"
	  RTWMemSecDataConstants  "Inherit from model"
	  RTWMemSecDataInternal	  "Inherit from model"
	  RTWMemSecDataParameters "Inherit from model"
	  inputType		  "Bit"
	  BT			  "bt"
	  pulseLength		  "n"
	  preHistory		  "1"
	  phaseOffset		  "0"
	  samplesPerSymbol	  "k"
	  outDataType		  "double"
	}
	Block {
	  BlockType		  Reference
	  Name			  "GMSK\nModulator\nBaseband1"
	  Ports			  [1, 1]
	  Position		  [155, 139, 230, 191]
	  SourceBlock		  "commdigbbndcpm2/GMSK\nModulator\nBaseband"
	  SourceType		  "GMSK Modulator Baseband"
	  ShowPortLabels	  "on"
	  SystemSampleTime	  "-1"
	  FunctionWithSeparateData "off"
	  RTWMemSecFuncInitTerm	  "Inherit from model"
	  RTWMemSecFuncExecute	  "Inherit from model"
	  RTWMemSecDataConstants  "Inherit from model"
	  RTWMemSecDataInternal	  "Inherit from model"
	  RTWMemSecDataParameters "Inherit from model"
	  inputType		  "Bit"
	  BT			  "bt"
	  pulseLength		  "n"
	  preHistory		  "1"
	  phaseOffset		  "0"
	  samplesPerSymbol	  "k"
	  outDataType		  "double"
	}
	Block {
	  BlockType		  Reference
	  Name			  "GMSK\nModulator\nBaseband2"
	  Ports			  [1, 1]
	  Position		  [155, 229, 230, 281]
	  SourceBlock		  "commdigbbndcpm2/GMSK\nModulator\nBaseband"
	  SourceType		  "GMSK Modulator Baseband"
	  ShowPortLabels	  "on"
	  SystemSampleTime	  "-1"
	  FunctionWithSeparateData "off"
	  RTWMemSecFuncInitTerm	  "Inherit from model"
	  RTWMemSecFuncExecute	  "Inherit from model"
	  RTWMemSecDataConstants  "Inherit from model"
	  RTWMemSecDataInternal	  "Inherit from model"
	  RTWMemSecDataParameters "Inherit from model"
	  inputType		  "Bit"
	  BT			  "bt"
	  pulseLength		  "n"
	  preHistory		  "1"
	  phaseOffset		  "0"
	  samplesPerSymbol	  "k"
	  outDataType		  "double"
	}
	Block {
	  BlockType		  Reference
	  Name			  "GMSK\nModulator\nBaseband3"
	  Ports			  [1, 1]
	  Position		  [155, 319, 230, 371]
	  SourceBlock		  "commdigbbndcpm2/GMSK\nModulator\nBaseband"
	  SourceType		  "GMSK Modulator Baseband"
	  ShowPortLabels	  "on"
	  SystemSampleTime	  "-1"
	  FunctionWithSeparateData "off"
	  RTWMemSecFuncInitTerm	  "Inherit from model"
	  RTWMemSecFuncExecute	  "Inherit from model"
	  RTWMemSecDataConstants  "Inherit from model"
	  RTWMemSecDataInternal	  "Inherit from model"
	  RTWMemSecDataParameters "Inherit from model"
	  inputType		  "Bit"
	  BT			  "bt"
	  pulseLength		  "n"
	  preHistory		  "1"
	  phaseOffset		  "0"
	  samplesPerSymbol	  "k"
	  outDataType		  "double"
	}
	Block {
	  BlockType		  Reference
	  Name			  "GMSK\nModulator\nBaseband4"
	  Ports			  [1, 1]
	  Position		  [155, 409, 230, 461]
	  SourceBlock		  "commdigbbndcpm2/GMSK\nModulator\nBaseband"
	  SourceType		  "GMSK Modulator Baseband"
	  ShowPortLabels	  "on"
	  SystemSampleTime	  "-1"
	  FunctionWithSeparateData "off"
	  RTWMemSecFuncInitTerm	  "Inherit from model"
	  RTWMemSecFuncExecute	  "Inherit from model"
	  RTWMemSecDataConstants  "Inherit from model"
	  RTWMemSecDataInternal	  "Inherit from model"
	  RTWMemSecDataParameters "Inherit from model"
	  inputType		  "Bit"
	  BT			  "bt"
	  pulseLength		  "n"
	  preHistory		  "1"
	  phaseOffset		  "0"
	  samplesPerSymbol	  "k"
	  outDataType		  "double"
	}
	Block {
	  BlockType		  Reference
	  Name			  "GMSK\nModulator\nBaseband5"
	  Ports			  [1, 1]
	  Position		  [155, 499, 230, 551]
	  SourceBlock		  "commdigbbndcpm2/GMSK\nModulator\nBaseband"
	  SourceType		  "GMSK Modulator Baseband"
	  ShowPortLabels	  "on"
	  SystemSampleTime	  "-1"
	  FunctionWithSeparateData "off"
	  RTWMemSecFuncInitTerm	  "Inherit from model"
	  RTWMemSecFuncExecute	  "Inherit from model"
	  RTWMemSecDataConstants  "Inherit from model"
	  RTWMemSecDataInternal	  "Inherit from model"
	  RTWMemSecDataParameters "Inherit from model"
	  inputType		  "Bit"
	  BT			  "bt"
	  pulseLength		  "n"
	  preHistory		  "1"
	  phaseOffset		  "0"
	  samplesPerSymbol	  "k"
	  outDataType		  "double"
	}
	Block {
	  BlockType		  Reference
	  Name			  "GMSK\nModulator\nBaseband6"
	  Ports			  [1, 1]
	  Position		  [155, 589, 230, 641]
	  SourceBlock		  "commdigbbndcpm2/GMSK\nModulator\nBaseband"
	  SourceType		  "GMSK Modulator Baseband"
	  ShowPortLabels	  "on"
	  SystemSampleTime	  "-1"
	  FunctionWithSeparateData "off"
	  RTWMemSecFuncInitTerm	  "Inherit from model"
	  RTWMemSecFuncExecute	  "Inherit from model"
	  RTWMemSecDataConstants  "Inherit from model"
	  RTWMemSecDataInternal	  "Inherit from model"
	  RTWMemSecDataParameters "Inherit from model"
	  inputType		  "Bit"
	  BT			  "bt"
	  pulseLength		  "n"
	  preHistory		  "1"
	  phaseOffset		  "0"
	  samplesPerSymbol	  "k"
	  outDataType		  "double"
	}
	Block {
	  BlockType		  Reference
	  Name			  "GMSK\nModulator\nBaseband7"
	  Ports			  [1, 1]
	  Position		  [155, 679, 230, 731]
	  SourceBlock		  "commdigbbndcpm2/GMSK\nModulator\nBaseband"
	  SourceType		  "GMSK Modulator Baseband"
	  ShowPortLabels	  "on"
	  SystemSampleTime	  "-1"
	  FunctionWithSeparateData "off"
	  RTWMemSecFuncInitTerm	  "Inherit from model"
	  RTWMemSecFuncExecute	  "Inherit from model"
	  RTWMemSecDataConstants  "Inherit from model"
	  RTWMemSecDataInternal	  "Inherit from model"
	  RTWMemSecDataParameters "Inherit from model"
	  inputType		  "Bit"
	  BT			  "bt"
	  pulseLength		  "n"
	  preHistory		  "1"
	  phaseOffset		  "0"
	  samplesPerSymbol	  "k"
	  outDataType		  "double"
	}
	Block {
	  BlockType		  Mux
	  Name			  "Mux2"
	  Ports			  [16, 1]
	  Position		  [515, 29, 530, 776]
	  ShowName		  off
	  Inputs		  "16"
	  DisplayOption		  "bar"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Random Integer\nGenerator"
	  Ports			  [0, 1]
	  Position		  [25, 53, 105, 97]
	  SourceBlock		  "commrandsrc2/Random Integer\nGenerator"
	  SourceType		  "Random Integer Generator"
	  ShowPortLabels	  "on"
	  SystemSampleTime	  "-1"
	  FunctionWithSeparateData "off"
	  RTWMemSecFuncInitTerm	  "Inherit from model"
	  RTWMemSecFuncExecute	  "Inherit from model"
	  RTWMemSecDataConstants  "Inherit from model"
	  RTWMemSecDataInternal	  "Inherit from model"
	  RTWMemSecDataParameters "Inherit from model"
	  mul			  "2"
	  seed			  "1"
	  Ts			  "tsym"
	  frameBased		  "off"
	  sampPerFrame		  "1"
	  orient		  "off"
	  outDataType		  "double"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Random Integer\nGenerator1"
	  Ports			  [0, 1]
	  Position		  [25, 593, 105, 637]
	  SourceBlock		  "commrandsrc2/Random Integer\nGenerator"
	  SourceType		  "Random Integer Generator"
	  ShowPortLabels	  "on"
	  SystemSampleTime	  "-1"
	  FunctionWithSeparateData "off"
	  RTWMemSecFuncInitTerm	  "Inherit from model"
	  RTWMemSecFuncExecute	  "Inherit from model"
	  RTWMemSecDataConstants  "Inherit from model"
	  RTWMemSecDataInternal	  "Inherit from model"
	  RTWMemSecDataParameters "Inherit from model"
	  mul			  "2"
	  seed			  "87"
	  Ts			  "tsym"
	  frameBased		  "off"
	  sampPerFrame		  "1"
	  orient		  "off"
	  outDataType		  "double"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Random Integer\nGenerator2"
	  Ports			  [0, 1]
	  Position		  [25, 143, 105, 187]
	  SourceBlock		  "commrandsrc2/Random Integer\nGenerator"
	  SourceType		  "Random Integer Generator"
	  ShowPortLabels	  "on"
	  SystemSampleTime	  "-1"
	  FunctionWithSeparateData "off"
	  RTWMemSecFuncInitTerm	  "Inherit from model"
	  RTWMemSecFuncExecute	  "Inherit from model"
	  RTWMemSecDataConstants  "Inherit from model"
	  RTWMemSecDataInternal	  "Inherit from model"
	  RTWMemSecDataParameters "Inherit from model"
	  mul			  "2"
	  seed			  "35"
	  Ts			  "tsym"
	  frameBased		  "off"
	  sampPerFrame		  "1"
	  orient		  "off"
	  outDataType		  "double"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Random Integer\nGenerator3"
	  Ports			  [0, 1]
	  Position		  [25, 233, 105, 277]
	  SourceBlock		  "commrandsrc2/Random Integer\nGenerator"
	  SourceType		  "Random Integer Generator"
	  ShowPortLabels	  "on"
	  SystemSampleTime	  "-1"
	  FunctionWithSeparateData "off"
	  RTWMemSecFuncInitTerm	  "Inherit from model"