📄 mri_filter_netlist.m
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% --% -- $Id: mri_filter_netlist.m,v 1.1.2.3 2008/06/12 16:12:55 igork Exp $% --% -- DISCLAIMER OF LIABILITY% -- % -- This text/file contains proprietary, confidential% -- information of Xilinx, Inc., is distributed under license% -- from Xilinx, Inc., and may be used, copied and/or% -- disclosed only pursuant to the terms of a valid license% -- agreement with Xilinx, Inc. Xilinx hereby grants you a % -- license to use this text/file solely for design, simulation, % -- implementation and creation of design files limited % -- to Xilinx devices or technologies. Use with non-Xilinx % -- devices or technologies is expressly prohibited and % -- immediately terminates your license unless covered by% -- a separate agreement.% --% -- Xilinx is providing this design, code, or information % -- "as-is" solely for use in developing programs and % -- solutions for Xilinx devices, with no obligation on the % -- part of Xilinx to provide support. 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All rights reserved.% --% -- This copyright and support notice must be retained as part % -- of this text at all times. % --% --Purpose : MRI DDC, sysgen design (script)% --% --------------------------------------------------------------------------------function mri_filter()%% Get all the values from the model from the workspacetry m_cic = evalin('base', 'm_cic');catch error('Cannot find m_cic');endtry channel = evalin('base', 'channel');catch error('Cannot find channel number');endtry hcfir_ddc = evalin('base', 'hcfir_ddc');catch error('Cannot find hcfir_ddc');endtry hcic_ddc = evalin('base', 'hcic_ddc');catch error('Cannot find hcic_ddc');endtry fadc = evalin('base', 'fadc');catch error('Cannot find fadc');endtry flarmor = evalin('base', 'flarmor');catch error('Cannot find flarmor');endtry fwidth = evalin('base', 'fwidth');catch error('Cannot find fwidth');endtry freq_step = evalin('base', 'freq_step');catch error('Cannot find freq_step');endtry step_delay = evalin('base', 'step_delay');catch error('Cannot find reset delay');endtry internal_bitwidth = evalin('base', 'internal_bitwidth');catch error('Cannot find internal_bitwidth');endtry internal_fixed_point = evalin('base', 'internal_fixed_point');catch error('Cannot find internal_fixed_point');endtry input_adc_bitwidth = evalin('base', 'input_adc_bitwidth');catch error('Cannot find input_adc_bitwidth');end%% Build DDSSimulation_Multiplexer_out=xSignal;s_sclr = xSignal;sclr_var = xSignal;sclr_pin = xBlock(struct('source', 'Gateway In', 'name', 'sclr'), ... struct('arith_type', 'Boolean'), ... {sclr_var}, ... {s_sclr}); xBlock('Step', struct('Time', sprintf('%d', step_delay), ... 'Before', '1', ... 'After', '0', ... 'SampleTime', '0', ... 'VectorParams1D', 'off',... 'ZeroCross', 'on'), ... {}, {sclr_var});% block: Constant2(0)Constant_0 = xSignal;xBlock(struct('source', 'Constant', 'name', 'Constant2'), ... struct('arith_type', 'Boolean', ... 'const', 0, ... 'n_bits', 1, ... 'bin_pt', 0, ... 'explicit_period', 'on'), ... {}, ... {Constant_0});% block: Simulation MultiplexerxBlock(struct('source', 'Simulation Multiplexer', 'name', 'Simulation Multiplexer'), ... [], ... {s_sclr, Constant_0}, ... {Simulation_Multiplexer_out});% block: Constant (1)Constant_1 = xSignal; xBlock(struct('source', 'Constant', 'name', 'Constant'), ... struct('arith_type', 'Boolean', ... 'const', 1, ... 'n_bits', 1, ... 'bin_pt', 0), ... {}, ... {Constant_1});% block: DDS Compiler v2_1DDS_out = xSignal;xBlock(struct('source', 'DDS Compiler 2.1 ', 'name', 'DDS'), ... struct('dds_clock_rate', fadc/1e6, ... 'spurious_free_dynamic_range', 96, ... 'frequency_resolution', 0.025, ... 'output_selection', 'Cosine', ... 'channels', '1', ... 'output_frequency1', floor((flarmor)/freq_step)*freq_step/1e6, ... 'noise_shaping', 'Auto', ... 'en', 'off', ... 'dsp48_use', 'Maximal'), ... {}, ... {DDS_out});xBlock(struct('source', 'ToWorkspace'), struct('VariableName', 'dds_cosine',... 'MaxDataPoints', 'inf'),{DDS_out});%% The input channel instantiationtdm_channel = 2^(ceil(log2(channel)));for ii=1:channel input_signal{ii} = xSignal; input_var{ii} = xSignal; input_name{ii}=sprintf('input_%di', ii); output_name{ii}=sprintf('output_%do', ii); xBlock(struct('source', 'Gateway In', 'name', input_name{ii}), ... struct('n_bits', input_adc_bitwidth, ... 'bin_pt', input_adc_bitwidth-1), ... {input_var{ii}}, ... {input_signal{ii}}); % Add input input_signal_name=sprintf('input_signal{%d}',ii); fromworkspace = sprintf('simulink/Sources/From\nWorkspace'); xBlock(fromworkspace, struct('VariableName', input_signal_name, ... 'SampleTime', 1, ... 'Interpolate', 'on', ... 'ZeroCross', 'on', ... 'OutputAfterFinalValue', 'Setting to zero'),... {}, {input_var{ii}}); % block: Mult mult_out{ii}=xSignal; xBlock(struct('source', 'Mult', 'name', sprintf('dds_mult_%d', ii)), ... struct('precision', 'User Defined', ... 'n_bits', internal_bitwidth, ... 'bin_pt', internal_bitwidth-1, ... 'latency', 3, ... 'optimum_pipeline', 'on'), ... {input_signal{ii}, DDS_out}, ... {mult_out{ii}}); % block: CIC Compiler 1.1 CIC_dout{ii} = xSignal; CIC_rfd{ii} = xSignal; CIC_rdy{ii} = xSignal; CIC_block{ii} = xBlock(struct('source', 'CIC Compiler 1.2 ', 'name', sprintf('CIC_filter_%d', ii)), ... struct('filter_type', 'Decimation', ... 'number_of_stages', sprintf('%d',hcic_ddc.NumberOfSections), ... 'input_data_width', internal_bitwidth, ... 'output_data_width', internal_bitwidth, ... 'fixed_or_initial_rate', m_cic, ... 'sclr', 'on', ... 'use_xtreme_dsp_slice', 'off'), ... {mult_out{ii}, Constant_1, Simulation_Multiplexer_out}, ... {CIC_dout{ii}, CIC_rfd{ii}, CIC_rdy{ii}}); xBlock(struct('source', 'Terminator'),[],{CIC_rfd{ii}}); % block: Delay Delay_out{ii} = xSignal; xBlock(struct('source', 'Delay', 'name', sprintf('Delay_%d', ii)), ... struct('en', 'on'), ... {CIC_dout{ii}, CIC_rdy{ii}}, ... {Delay_out{ii}}); % block: Down Sample Down_Sample_out{ii} = xSignal; xBlock(struct('source', 'Down Sample', 'name', sprintf('DownSample_%d', ii)), ... struct('sample_ratio', m_cic/tdm_channel), ... {Delay_out{ii}}, ... {Down_Sample_out{ii}});endxBlock(struct('source', 'ToWorkspace'), struct('VariableName', 'mult_out_hw',... 'MaxDataPoints', 'inf'),{mult_out{1}});Time_Division_Multiplexer_out = xSignal;if (channel>1) s_channel = sprintf('%d', tdm_channel); if(tdm_channel ~= channel) for jj=channel+1:tdm_channel Down_Sample_out{jj}=xSignal; xBlock(struct('source', 'Constant', 'name', sprintf('stub_%d', jj)),... struct('arith_type', 'Signed', ... 'const', 0, ... 'n_bits', internal_bitwidth, ... 'bin_pt', 0, ... 'explicit_period', 'on',... 'period', m_cic), ... {}, ... {Down_Sample_out{jj}}); end end % block: mri_filter_multichannel/Time Division Multiplexer% xBlock(struct('source', sprintf('Time Division\nMultiplexer'), 'name', sprintf('Time Division\nMultiplexer')), ...% struct('inputs', s_channel), ...% Down_Sample_out, ...% {Time_Division_Multiplexer_out}); tdm_select = xSignal; tdm_select_unscaled = xSignal; tdm_select_downsampled = xSignal; xBlock(struct('source', 'Counter', 'name', 'TDM_counter'),... struct('n_bits', ceil(log2(m_cic)),... 'rst', 'on',... 'start_count', 2^ceil(log2(m_cic))-1),... {Simulation_Multiplexer_out},... {tdm_select_unscaled}); xBlock(struct('source', 'Shift', 'name', 'TDM_select_scale'),... struct('shift_dir', 'Right',... 'precision', 'User Defined',... 'bin_pt', 0,... 'arith_type', 'Unsigned',... 'n_bits', ceil(log2(channel)),... 'shift_bits', ceil(log2(m_cic))-ceil(log2(channel))),... {tdm_select_unscaled},... {tdm_select}); xBlock(struct('source', 'Down Sample', 'name', sprintf('select downsample')), ... struct('sample_ratio', m_cic/tdm_channel), ... {tdm_select}, ... {tdm_select_downsampled}); for jj=1:tdm_channel+1 mux_input{jj}=xSignal; if jj==1 mux_input{jj}=tdm_select_downsampled; else mux_input{jj}=Down_Sample_out{jj-1}; end end xBlock(struct('source', 'Mux', 'name', 'TDM_mux'),... struct('inputs', sprintf('%d', tdm_channel),... 'latency', 2,... 'precision', 'Full',... 'n_bits', ceil(log2(channel)),... 'overflow', 'Flag as error'),... mux_input,... {Time_Division_Multiplexer_out}); % block: FIR Compiler v3_2 FIR_Compiler_data = xSignal; FIR_Compiler_chin = xSignal; FIR_Compiler_chout = xSignal; xs_data = xSignal; xs_channel_out = xSignal; cfir_reset = xSignal; xBlock(struct('source', 'Down Sample', 'name', 'CFIR_reset_gen'),... struct('latency', 1, 'sample_phase', 'First Value of Frame', 'sample_ratio', m_cic/tdm_channel*2),... {Simulation_Multiplexer_out},... {cfir_reset}); xBlock(struct('source', 'FIR Compiler v3_2 ', 'name', 'CFIR'), ... struct('Filter_Type', 'Decimation', ... 'Rate_Change', 2, ... 'Rst_Rfd_port', 'on', ... 'Number_Channels', tdm_channel, ... 'Hardware_Oversampling', max(floor(m_cic/tdm_channel),1), ... 'Coefficients', hcfir_ddc.numerator*2, ... 'Coefficient_Width', 18, ... 'Coefficient_Binary_Point', 18), ... {Time_Division_Multiplexer_out, cfir_reset}, ... {FIR_Compiler_data, FIR_Compiler_chin, FIR_Compiler_chout}); % block: ports/Gateway Out xBlock(struct('source', 'Gateway Out', 'name', 'data'), ... [], ... {FIR_Compiler_data}, ... {xs_data}); xs_channel_in = xSignal; xBlock(struct('source', 'Gateway Out', 'name', 'channel_in'), ... [], ... {FIR_Compiler_chin}, ... {xs_channel_in}); xBlock(struct('source', 'Terminator'),[],{xs_channel_in}); xBlock(struct('source', 'Gateway Out', 'name', 'channel_out'), ... [], ... {FIR_Compiler_chout}, ... {xs_channel_out}); xBlock(struct('source', 'ToWorkspace'), struct('VariableName', 'mri_model_output',... 'MaxDataPoints', 'inf'),{xs_data}); xBlock(struct('source', 'ToWorkspace'), struct('VariableName', 'mri_model_channel',... 'MaxDataPoints', 'inf'),{xs_channel_out});else tdm_channel = 1; Time_Division_Multiplexer_out=Down_Sample_out{1}; FIR_Compiler_data = xSignal; xBlock(struct('source', 'FIR Compiler v3_2 ', 'name', 'CFIR'), ... struct('Filter_Type', 'Decimation', ... 'Rate_Change', 2, ... 'Number_Channels', 1, ... 'Hardware_Oversampling', max(floor(m_cic),1), ... 'Coefficients', hcfir_ddc.numerator*2, ... 'Coefficient_Width', 18, ... 'Coefficient_Binary_Point', 18), ... {Down_Sample_out{1}}, ... {FIR_Compiler_data}); % This output is needed for verification only xs_data = xSignal; xs_channel_out = xSignal; xBlock(struct('source', 'Gateway Out', 'name', 'data'), ... [], ... {FIR_Compiler_data}, ... {xs_data}); xBlock(struct('source', 'ToWorkspace'), struct('VariableName', 'mri_model_output',... 'MaxDataPoints', 'inf'),{xs_data}); constant_channel=xSignal; xBlock(struct('source', 'Constant', 'name', 'zero_channel'),... struct('arith_type', 'Signed', ... 'const', 0, ... 'n_bits', internal_bitwidth, ... 'bin_pt', 0, ... 'explicit_period', 'off'), ... {}, ... {constant_channel}); xBlock(struct('source', 'Gateway Out', 'name', 'channel_out'), ... [], ... {constant_channel}, ... {xs_channel_out}); xBlock(struct('source', 'ToWorkspace'), struct('VariableName', 'mri_model_channel',... 'MaxDataPoints', 'inf'),{xs_channel_out});end%% Test outputsScreenRectangle=get(0,'ScreenSize');ScreenX=ScreenRectangle(3);ScreenY=ScreenRectangle(4);my_scope2=xBlock(struct('source', 'Scope', 'name', 'CFIR_scope'),struct('Open', 'on',... 'TimeRange', '16385',... 'LimitDataPoints', 'off',... 'YMin', sprintf('%d', -2^(internal_bitwidth-1)),... 'YMax', sprintf('%d', 2^(internal_bitwidth-1))),... {FIR_Compiler_data});my_scope3=xBlock(struct('source', 'Scope', 'name', 'Mixer_scope'),struct('Open', 'on',... 'TimeRange', '16385',... 'LimitDataPoints', 'off',... 'YMin', '-1',... 'YMax', '1'),... {mult_out{1}});my_scope4=xBlock(struct('source', 'Scope', 'name', 'CIC_scope'),struct('Open', 'on',... 'TimeRange', 'auto',... 'LimitDataPoints', 'off',... 'YMin', sprintf('%d', -2^(internal_bitwidth-1) ),... 'YMax', sprintf('%d', 2^(internal_bitwidth-1) )),... {Delay_out{1}});my_scope1=xBlock(struct('source', 'Scope', 'name', 'Input_scope'),struct('Open', 'on',... 'TimeRange', '16385',... 'LimitDataPoints', 'off',... 'YMin', sprintf('%d', -1),... 'YMax', sprintf('%d', 1 )),... {input_signal{1}});end
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