mri.mdl

This is GMS down upper converter and down converter in simulink. you may understand the structure in

		Dimension		13
		Cell			"IncludeMdlTerminateFcn"
		Cell			"CombineOutputUpdateFcns"
		Cell			"SuppressErrorStatus"
		Cell			"ERTCustomFileBanners"
		Cell			"GenerateSampleERTMain"
		Cell			"GenerateTestInterfaces"
		Cell			"MultiInstanceERTCode"
		Cell			"PurelyIntegerCode"
		Cell			"SupportNonFinite"
		Cell			"SupportComplex"
		Cell			"SupportAbsoluteTime"
		Cell			"SupportContinuousTime"
		Cell			"SupportNonInlinedSFcns"
		PropName		"DisabledProps"
	      }
	      Version		      "1.2.0"
	      TargetFcnLib	      "ansi_tfl_tmw.mat"
	      TargetLibSuffix	      ""
	      TargetPreCompLibLocation ""
	      GenFloatMathFcnCalls    "ANSI_C"
	      UtilityFuncGeneration   "Auto"
	      GenerateFullHeader      on
	      GenerateSampleERTMain   off
	      GenerateTestInterfaces  off
	      IsPILTarget	      off
	      ModelReferenceCompliant on
	      IncludeMdlTerminateFcn  on
	      CombineOutputUpdateFcns off
	      SuppressErrorStatus     off
	      IncludeFileDelimiter    "Auto"
	      ERTCustomFileBanners    off
	      SupportAbsoluteTime     on
	      LogVarNameModifier      "rt_"
	      MatFileLogging	      on
	      MultiInstanceERTCode    off
	      SupportNonFinite	      on
	      SupportComplex	      on
	      PurelyIntegerCode	      off
	      SupportContinuousTime   on
	      SupportNonInlinedSFcns  on
	      EnableShiftOperators    on
	      ParenthesesLevel	      "Nominal"
	      ExtMode		      off
	      ExtModeStaticAlloc      off
	      ExtModeTesting	      off
	      ExtModeStaticAllocSize  1000000
	      ExtModeTransport	      0
	      ExtModeMexFile	      "ext_comm"
	      RTWCAPISignals	      off
	      RTWCAPIParams	      off
	      RTWCAPIStates	      off
	      GenerateASAP2	      off
	    }
	    PropName		    "Components"
	  }
	}
	PropName		"Components"
      }
      Name		      "Configuration"
      SimulationMode	      "normal"
      CurrentDlgPage	      "Solver"
    }
    PropName		    "ConfigurationSets"
  }
  Simulink.ConfigSet {
    $PropName		    "ActiveConfigurationSet"
    $ObjectID		    1
  }
  BlockDefaults {
    Orientation		    "right"
    ForegroundColor	    "black"
    BackgroundColor	    "white"
    DropShadow		    off
    NamePlacement	    "normal"
    FontName		    "Arial"
    FontSize		    10
    FontWeight		    "normal"
    FontAngle		    "normal"
    ShowName		    on
  }
  BlockParameterDefaults {
    Block {
      BlockType		      DiscretePulseGenerator
      PulseType		      "Sample based"
      TimeSource	      "Use simulation time"
      Amplitude		      "1"
      Period		      "2"
      PulseWidth	      "1"
      PhaseDelay	      "0"
      SampleTime	      "1"
      VectorParams1D	      on
    }
    Block {
      BlockType		      FromWorkspace
      VariableName	      "simulink_input"
      SampleTime	      "-1"
      Interpolate	      on
      ZeroCross		      off
      OutputAfterFinalValue   "Extrapolation"
    }
    Block {
      BlockType		      Scope
      ModelBased	      off
      TickLabels	      "OneTimeTick"
      ZoomMode		      "on"
      Grid		      "on"
      TimeRange		      "auto"
      YMin		      "-5"
      YMax		      "5"
      SaveToWorkspace	      off
      SaveName		      "ScopeData"
      LimitDataPoints	      on
      MaxDataPoints	      "5000"
      Decimation	      "1"
      SampleInput	      off
      SampleTime	      "-1"
    }
    Block {
      BlockType		      "S-Function"
      FunctionName	      "system"
      SFunctionModules	      "''"
      PortCounts	      "[]"
    }
    Block {
      BlockType		      Step
      Time		      "1"
      Before		      "0"
      After		      "1"
      SampleTime	      "-1"
      VectorParams1D	      on
      ZeroCross		      on
    }
    Block {
      BlockType		      SubSystem
      ShowPortLabels	      on
      Permissions	      "ReadWrite"
      PermitHierarchicalResolution "All"
      TreatAsAtomicUnit	      off
      SystemSampleTime	      "-1"
      RTWFcnNameOpts	      "Auto"
      RTWFileNameOpts	      "Auto"
      RTWMemSecFuncInitTerm   "Inherit from model"
      RTWMemSecFuncExecute    "Inherit from model"
      RTWMemSecDataConstants  "Inherit from model"
      RTWMemSecDataInternal   "Inherit from model"
      RTWMemSecDataParameters "Inherit from model"
      SimViewingDevice	      off
      DataTypeOverride	      "UseLocalSettings"
      MinMaxOverflowLogging   "UseLocalSettings"
    }
    Block {
      BlockType		      Terminator
    }
    Block {
      BlockType		      ToWorkspace
      VariableName	      "simulink_output"
      MaxDataPoints	      "1000"
      Decimation	      "1"
      SampleTime	      "0"
      FixptAsFi		      off
    }
  }
  AnnotationDefaults {
    HorizontalAlignment	    "center"
    VerticalAlignment	    "middle"
    ForegroundColor	    "black"
    BackgroundColor	    "white"
    DropShadow		    off
    FontName		    "Arial"
    FontSize		    10
    FontWeight		    "normal"
    FontAngle		    "normal"
  }
  LineDefaults {
    FontName		    "Arial"
    FontSize		    9
    FontWeight		    "normal"
    FontAngle		    "normal"
  }
  System {
    Name		    "mri"
    Location		    [480, 93, 1060, 386]
    Open		    on
    ModelBrowserVisibility  off
    ModelBrowserWidth	    200
    ScreenColor		    "white"
    PaperOrientation	    "landscape"
    PaperPositionMode	    "auto"
    PaperType		    "A4"
    PaperUnits		    "centimeters"
    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
    TiledPageScale	    1
    ShowPageBoundaries	    off
    ZoomFactor		    "100"
    ReportName		    "simulink-default.rpt"
    Block {
      BlockType		      Reference
      Name		      " System Generator"
      Tag		      "genX"
      Ports		      []
      Position		      [57, 175, 108, 225]
      ShowName		      off
      AttributesFormatString  "System\\nGenerator"
      UserDataPersistent      on
      UserData		      "DataTag0"
      SourceBlock	      "xbsIndex_r4/ System Generator"
      SourceType	      "Xilinx System Generator Block"
      ShowPortLabels	      on
      SystemSampleTime	      "-1"
      FunctionWithSeparateData off
      RTWMemSecFuncInitTerm   "Inherit from model"
      RTWMemSecFuncExecute    "Inherit from model"
      RTWMemSecDataConstants  "Inherit from model"
      RTWMemSecDataInternal   "Inherit from model"
      RTWMemSecDataParameters "Inherit from model"
      infoedit		      " System Generator"
      xilinxfamily	      "Virtex4"
      part		      "xc4vsx35"
      speed		      "-10"
      package		      "ff668"
      synthesis_tool	      "XST"
      clock_wrapper	      "Clock Enables"
      directory		      "./netlist"
      testbench		      off
      simulink_period	      "1"
      sysclk_period	      "100"
      dcm_input_clock_period  "100"
      incr_netlist	      off
      trim_vbits	      "Everywhere in SubSystem"
      dbl_ovrd		      "According to Block Masks"
      core_generation	      "According to Block Masks"
      run_coregen	      off
      deprecated_control      off
      eval_field	      "0"
      has_advanced_control    "0"
      sggui_pos		      "-1,-1,-1,-1"
      block_type	      "sysgen"
      block_version	      "10.1.1"
      sg_icon_stat	      "51,50,-1,-1,red,beige,0,07734,right"
      sg_mask_display	      "fprintf('','COMMENT: begin icon graphics');\npa"
"tch([0 51 51 0 ],[0 0 50 50 ],[0.93 0.92 0.86]);\npatch([12 4 16 4 12 25 29 3"
"3 47 36 25 17 29 17 25 36 47 33 29 25 12 ],[5 13 25 37 45 45 41 45 45 34 45 3"
"7 25 13 5 16 5 5 9 5 5 ],[0.6 0.2 0.25]);\nplot([0 51 51 0 0 ],[0 0 50 50 0 ]"
");\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: begin ico"
"n text');\nfprintf('','COMMENT: end icon text');\n"
    }
    Block {
      BlockType		      SubSystem
      Name		      "Subsystem"
      Ports		      []
      Position		      [15, 15, 65, 40]
      MinAlgLoopOccurrences   off
      RTWSystemCode	      "Auto"
      FunctionWithSeparateData off
      MaskHideContents	      off
      System {
	Name			"Subsystem"
	Location		[480, 93, 1060, 386]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"A4"
	PaperUnits		"centimeters"
	TiledPaperMargins	[0.500000, 0.500000, 0.500000, 0.500000]
	TiledPageScale		1
	ShowPageBoundaries	off
	ZoomFactor		"100"
	Block {
	  BlockType		  Reference
	  Name			  "CFIR"
	  Ports			  [2, 3]
	  Position		  [735, 407, 825, 543]
	  SourceBlock		  "xbsIndex_r4/FIR Compiler v3_2 "
	  SourceType		  "Xilinx FIR Compiler v3_2 Block"
	  infoedit		  "Implements a high-speed multi-channel FIR f"
"ilter.<P><P>Hardware  notes: Implemented using DSP48s hence only Virtex 4, Vi"
"rtex 5 and SpartanDSP devices are supported."
	  Filter_Type		  "Decimation"
	  Rate_Change		  "2"
	  Zero_Pack_Factor	  "1"
	  Number_Channels	  "2"
	  Hardware_Oversampling	  "16"
	  Coefficients		  "[7.62939453125e-006 3.4332275390625e-005 8."
"392333984375e-005 0.000152587890625 0.000213623046875 0.000194549560546875 -1"
".1444091796875e-005 -0.0005035400390625 -0.00130844116210938 -0.0023155212402"
"3438 -0.00319290161132813 -0.00341796875 -0.00240325927734375 0.0002899169921"
"875 0.00461959838867188 0.00982284545898438 0.01434326171875 0.01604080200195"
"31 0.0128021240234375 0.00336074829101563 -0.0118370056152344 -0.030040740966"
"7969 -0.0462112426757813 -0.0538101196289063 -0.0462913513183594 -0.018974304"
"1992188 0.0291671752929688 0.0944786071777344 0.168689727783203 0.24029541015"
"625 0.29693603515625 0.328216552734375 0.328216552734375 0.29693603515625 0.2"
"4029541015625 0.168689727783203 0.0944786071777344 0.0291671752929688 -0.0189"
"743041992188 -0.0462913513183594 -0.0538101196289063 -0.0462112426757813 -0.0"
"300407409667969 -0.0118370056152344 0.00336074829101563 0.0128021240234375 0."
"0160408020019531 0.01434326171875 0.00982284545898438 0.00461959838867188 0.0"
"002899169921875 -0.00240325927734375 -0.00341796875 -0.00319290161132813 -0.0"
"0231552124023438 -0.00130844116210938 -0.0005035400390625 -1.1444091796875e-0"
"05 0.000194549560546875 0.000213623046875 0.000152587890625 8.392333984375e-0"
"05 3.4332275390625e-005 7.62939453125e-006]"
	  Coefficient_Sign	  "Signed"
	  Coefficient_Width	  "18"
	  Coefficient_Binary_Point "18"
	  Coefficient_Structure	  "Inferred"
	  Coefficient_Reload	  off
	  Display_Block_Info	  off
	  Valid_Ports		  off
	  Enable_Port		  off
	  Rst_Rfd_Port		  on
	  Output_Rounding_Mode	  "Full_Precision"
	  Output_Width		  "48"
	  Allow_Rounding_Approximation off
	  dbl_ovrd		  off
	  Storage		  "Automatic"
	  Data_Buffer_Type	  "Distributed"
	  Coefficient_Buffer_Type "Distributed"
	  Multiple_Column_Support "Disabled"
	  Inter_Column_Pipe_Length "4"
	  First_Column_Length	  "32"
	  Column_Wrap_Length	  "32"
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  u_coef_rows		  "1"
	  u_coef_cols		  "3"
	  u_coef_sets		  "1"
	  u_coef_type		  "1"
	  u_latency		  "1"
	  enable_debug		  "0"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "Fir_compiler_v3_2"
	  block_version		  "10.1.1"
	  sg_icon_stat		  "90,136,2,3,white,blue,0,2990cbb5,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 90 90 0 ],[0 0 136 136 ],[0.77 0.82 0.91]);\npatch([21 6 27 6 21 4"
"5 51 57 82 62 43 29 50 29 43 62 82 57 51 45 21 ],[33 48 69 90 105 105 99 105 "
"105 85 104 90 69 48 34 53 33 33 39 33 33 ],[0.98 0.96 0.92]);\nplot([0 90 90 "
"0 0 ],[0 0 136 136 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf("
"'','COMMENT: begin icon text');\ncolor('black');port_label('input',1,'din');"
"\ncolor('black');port_label('input',2,'rst');\ncolor('black');port_label('out"
"put',1,'dout');\ncolor('black');port_label('output',2,'chan_in');\ncolor('bla"
"ck');port_label('output',3,'chan_out');\nfprintf('','COMMENT: end icon text')"
";\n"
	}
	Block {
	  BlockType		  Reference
	  Name			  "CFIR_reset_gen"
	  Ports			  [1, 1]
	  Position		  [645, 512, 705, 568]
	  SourceBlock		  "xbsIndex_r4/Down Sample"
	  SourceType		  "Xilinx Down Sampler Block"
	  infoedit		  "Hardware notes: Sample and Latency controls"
" determine the hardware implementation.  The cost in hardware of different im"
"plementations varies considerably; press Help for details."
	  sample_ratio		  "32"
	  sample_phase		  "First Value of Frame"
	  en			  off
	  latency		  "1"
	  dbl_ovrd		  off
	  xl_use_area		  off
	  xl_area		  "[0,0,0,0,0,0,0]"
	  has_advanced_control	  "0"
	  sggui_pos		  "-1,-1,-1,-1"
	  block_type		  "dsamp"
	  block_version		  "10.1.1"
	  sg_icon_stat		  "60,56,1,1,white,blue,0,decad764,right"
	  sg_mask_display	  "fprintf('','COMMENT: begin icon graphics');"
"\npatch([0 60 60 0 ],[0 0 56 56 ],[0.77 0.82 0.91]);\npatch([15 6 19 6 15 30 "
"34 38 54 41 29 20 32 20 29 41 54 38 34 30 15 ],[6 15 28 41 50 50 46 50 50 37 "
"49 40 28 16 7 19 6 6 10 6 6 ],[0.98 0.96 0.92]);\nplot([0 60 60 0 0 ],[0 0 56"
" 56 0 ]);\nfprintf('','COMMENT: end icon graphics');\nfprintf('','COMMENT: be"
"gin icon text');\ncolor('black');disp('\\newline{\\fontsize{14pt}\\bf\\downar"
"row}32\\newlinez^{-1}','texmode','on');\nfprintf('','COMMENT: end icon text')"
";\n"
	}
	Block {
	  BlockType		  Scope
	  Name			  "CFIR_scope"
	  Ports			  [1]
	  Position		  [875, 370, 895, 390]
	  Floating		  off
	  Location		  [188, 365, 512, 604]
	  Open			  on