rtosinit.c

An Demo of uCGUI from SEGGER

    t_cnt = (OS_PCLK_TIMER/1000) - _SYS_TICK_VALUE;            /* Adjust result               */
    time++;
  }
  return (OS_PCLK_TIMER/1000) * time + t_cnt;
}

/*********************************************************************
*
*       OS_ConvertCycles2us
*
*       Convert Cycles into micro seconds.
*
*       If your clock frequency is not a multiple of 1 MHz,
*       you may have to modify this routine in order to get proper
*       diagonstics.
*
*       This routine is required for profiling or high resolution time
*       measurement only. It does not affect operation of the OS.
*/
OS_U32 OS_ConvertCycles2us(OS_U32 Cycles) {
  return Cycles/(OS_PCLK_TIMER/1000000);
}


/*********************************************************************
*
*       Communication for OSView via UART (optional)
*
**********************************************************************
*/
#if (OS_UART == 0)
  #define _USART_BASE_ADDR     (0x40013800)
#elif (OS_UART == 1)
  #define _USART_BASE_ADDR     (0x40004400)
#endif
#define _USART_SR            *(volatile OS_U32*)(_USART_BASE_ADDR + 0x00)
#define _USART_DR            *(volatile OS_U32*)(_USART_BASE_ADDR + 0x04)
#define _USART_BRR           *(volatile OS_U32*)(_USART_BASE_ADDR + 0x08)
#define _USART_CR1           *(volatile OS_U32*)(_USART_BASE_ADDR + 0x0C)
#define _USART_CR2           *(volatile OS_U32*)(_USART_BASE_ADDR + 0x10)
#define _USART_CR3           *(volatile OS_U32*)(_USART_BASE_ADDR + 0x14)
#define _USART_GTPR          *(volatile OS_U32*)(_USART_BASE_ADDR + 0x18)
#define RCC_USART1EN         ((OS_U32)0x00004014)
#define RCC_USART2EN         ((OS_U32)0x00000014)
#define _GPIOA_CRL           *(volatile OS_U32*)(0x40010800)
#define _GPIOA_CRH           *(volatile OS_U32*)(0x40010804)
#define US_RXRDY             0x20 // RXNE
#define USART_RX_ERROR_FLAGS 0x0F // ORE/NE/FE/PE

#if OS_UART_USED
static volatile OS_U32 _Dummy;

void OS_COM_IsrHandler(void) {
  int UsartStatus;
  OS_EnterInterrupt();
  UsartStatus = _USART_SR;                       // Examine status register
  do {
    if (UsartStatus & US_RXRDY) {                // Data received?
      if (UsartStatus & USART_RX_ERROR_FLAGS) {  // Any error ?
        _Dummy = _USART_DR;                      // => Discard data
      } else {
        OS_OnRx(_USART_DR);                      // Process actual byte
      }
    }
    else {
      if (OS_OnTx()) {                           // No more characters to send ?
        _USART_CR1 &= ~0x40;                     // Disable further tx interrupts
      }
    }
    UsartStatus = _USART_SR;                     // Examine current status
  }
  while (UsartStatus & US_RXRDY);
  OS_LeaveInterrupt();
}

void OS_COM_Send1(OS_U8 c) {
  _USART_DR   = (c & (OS_U16)0x01FF);
  _USART_CR1 |= 0x40;                           // enable tx interrupt
}

#if (OS_UART == 0)
void OS_COM_Init(void) {
  RCC_APB2ENR |= RCC_USART1EN;  // Enable GPIOA, GPIOC and USART2 clock
  _GPIOA_CRH   = 0x888444B4;
  _USART_CR2   = 0x200;
  _USART_CR1   = 0x2C;
  _USART_CR3   = 0x00;
  _USART_BRR   = 0x271;        // fixed to 115200 @72Mhz

  _USART_CR1 |= 0x2000;        // enable uart

  //
  // Install USART1 Handler
  //
  OS_ARM_InstallISRHandler(_ISR_ID_USART1, (OS_ISR_HANDLER*)OS_COM_IsrHandler);
  OS_ARM_ISRSetPrio(_ISR_ID_USART1, 240);
  OS_ARM_EnableISR(_ISR_ID_USART1);
}
#elif (OS_UART == 1)
void OS_COM_Init(void) {
  RCC_APB1ENR |= (1 << 17);     // Enable USART2 clock
  RCC_APB2ENR |= RCC_USART2EN;  // Enable GPIOA, GPIOC
  _GPIOA_CRL   = 0x44444B44;
  _GPIOA_CRH   = 0x88844444;
  _USART_CR2   = 0x200;
  _USART_CR1   = 0x2C;
  _USART_CR3   = 0x00;
  _USART_BRR   = 0x138;        // fixed to 115200 @72Mhz

  _USART_CR1 |= 0x2000;        // enable uart

  //
  // Install USART2 Handler
  //
  OS_ARM_InstallISRHandler(_ISR_ID_USART2, (OS_ISR_HANDLER*)OS_COM_IsrHandler);
  OS_ARM_ISRSetPrio(_ISR_ID_USART2, 240);
  OS_ARM_EnableISR(_ISR_ID_USART2);
}
#endif

#else

/*********************************************************************
*
*       Communication for embOSView not selected
*
**********************************************************************
*/
void OS_COM_Init(void) {}
void OS_COM_Send1(OS_U8 c) {
  OS_USEPARA(c);
  OS_COM_ClearTxActive();  /* Free OS transmitter buffer */
}

/*********************************************************************
*
*       OS_COM_IsrHandler
*
* Function description
*   The communication interrupt handler for UART communication
*   to embOSView.
*
* NOTES:
*   (1) It has to be inserted in the interrupt vector table, if RAM
*       vectors are not used. Therefore is is declared public
*/
void OS_COM_IsrHandler(void) {
  while(1);
}
#endif

/*********************************************************************
*
*       OS interrupt handler and ISR specific functions
*
**********************************************************************
*/

#if OS_USE_VARINTTABLE
//
// The interrupt vector table may be located anywhere in RAM
//
#ifdef __ICCARM__
#if (__VER__ < 500)
#pragma segment="VTABLE"
#else
#pragma section="VTABLE"
#endif  // #if (__VER__ < 500)
#pragma data_alignment=256
__no_init void (*g_pfnRAMVectors[_NUM_INTERRUPTS])(void) @ "VTABLE";
#endif  // __ICCARM__
#ifdef __CC_ARM
extern unsigned int VTABLE$$Base;
__attribute__((section("VTABLE"), zero_init, aligned(256))) void (*g_pfnRAMVectors[_NUM_INTERRUPTS])(void);
#endif
#define VTBASE_IN_RAM_BIT             (29)
#define _RAM_START_ADDR               (0x20000000)
#endif

/*********************************************************************
*
*       OS_ARM_InstallISRHandler
*/
OS_ISR_HANDLER* OS_ARM_InstallISRHandler (int ISRIndex, OS_ISR_HANDLER* pISRHandler) {
#if OS_USE_VARINTTABLE
  OS_ISR_HANDLER*  pOldHandler;
  OS_U32 ulIdx;

  pOldHandler = NULL;
  //
  // Check whether the RAM vector table has been initialized.
  //
  if ((*(OS_U32*)_NVIC_VTOREG_ADDR) != (unsigned long)g_pfnRAMVectors) {
    //
    // Copy the vector table from the beginning of FLASH to the RAM vector table.
    //
    for(ulIdx = 0; ulIdx < _NUM_INTERRUPTS; ulIdx++) {
      g_pfnRAMVectors[ulIdx] = (void (*)(void))(*((volatile unsigned long *)(ulIdx * 4)));
    }
    //
    // Program NVIC to point at the RAM vector table.
    //
#ifdef __ICCARM__
    *(OS_U32*)_NVIC_VTOREG_ADDR = ((OS_U32)__sfb("VTABLE") - _RAM_START_ADDR) | (1 << VTBASE_IN_RAM_BIT);
#endif
#ifdef __CC_ARM
	*(OS_U32*)_NVIC_VTOREG_ADDR = ((OS_U32)&(VTABLE$$Base) - _RAM_START_ADDR) | (1 << VTBASE_IN_RAM_BIT);
#endif
  }
  //
  // Save the interrupt handler.
  //
  pOldHandler = g_pfnRAMVectors[ISRIndex];
  g_pfnRAMVectors[ISRIndex] = pISRHandler;
  return (pOldHandler);
#else
  return (NULL);
#endif
}

/*********************************************************************
*
*       OS_ARM_EnableISR
*/
void OS_ARM_EnableISR(int ISRIndex) {
  OS_DI();
  if (ISRIndex < _NUM_INTERRUPTS) {
    if (ISRIndex >= 16) {
      //
      // Enable standard "external" interrupts, starting at index 16
      //
      ISRIndex -= 16;
      *(((OS_U32*) _NVIC_ENABLE_ADDR) + (ISRIndex >> 5)) = (1 << (ISRIndex & 0x1F));
    } else if (ISRIndex == _ISR_ID_MPU) {
      //
      // Enable the MemManage interrupt.
      //
      _SYSHND_CTRL |= _NVIC_SYS_HND_CTRL_MEM;
    } else if (ISRIndex == _ISR_ID_BUS) {
      //
      // Enable the bus fault interrupt.
      //
      _SYSHND_CTRL |= _NVIC_SYS_HND_CTRL_BUS;
    } else if (ISRIndex == _ISR_ID_USAGE) {
      //
      // Enable the usage fault interrupt.
      //
      _SYSHND_CTRL |= _NVIC_SYS_HND_CTRL_USAGE;
    } else if (ISRIndex == _ISR_ID_SYSTICK) {
      //
      // Enable the System Tick interrupt.
      //
      _SYS_TICK_CONTROL |= (1 << _SYS_TICK_INT_ENABLE_BIT);
    }
  }
  OS_RestoreI();
}

/*********************************************************************
*
*       OS_ARM_DisableISR
*/
void OS_ARM_DisableISR(int ISRIndex) {
  OS_DI();
  if (ISRIndex < _NUM_INTERRUPTS) {
    if (ISRIndex >= 16) {
      //
      // Disable standard "external" interrupts
      //
      ISRIndex -= 16;
      *(((OS_U32*) _NVIC_DISABLE_ADDR) + (ISRIndex >> 5)) = (1 << (ISRIndex & 0x1F));
    } else if (ISRIndex == _ISR_ID_MPU) {
      //
      // Disable the MemManage interrupt.
      //
      _SYSHND_CTRL &= ~_NVIC_SYS_HND_CTRL_MEM;
    } else if (ISRIndex == _ISR_ID_BUS) {
      //
      // Disable the bus fault interrupt.
      //
      _SYSHND_CTRL &= ~_NVIC_SYS_HND_CTRL_BUS;
    } else if (ISRIndex == _ISR_ID_USAGE) {
      //
      // Disable the usage fault interrupt.
      //
      _SYSHND_CTRL &= ~_NVIC_SYS_HND_CTRL_USAGE;
    } else if (ISRIndex == _ISR_ID_SYSTICK) {
      //
      // Enable the System Tick interrupt.
      //
      _SYS_TICK_CONTROL &= ~(1 << _SYS_TICK_INT_ENABLE_BIT);
    }
  }
  OS_RestoreI();
}

/*********************************************************************
*
*       OS_ARM_ISRSetPrio
*
*   Notes:
*     (1) Some priorities of system handler are reserved
*         0..3 : Priority can not be set
*         7..10: Reserved
*         13   : Reserved
*     (2) System handler use different control register. This affects
*         ISRIndex 0..15
*/
int OS_ARM_ISRSetPrio(int ISRIndex, int Prio) {
  OS_U8* pPrio;
  int    OldPrio;

  OldPrio = 0;
  if (ISRIndex < _NUM_INTERRUPTS) {
    if (ISRIndex >= 16) {
      //
      // Handle standard "external" interrupts
      //
      ISRIndex -= 16;                   // Adjust index
      OS_DI();
      pPrio = (OS_U8*)(_NVIC_PRIOBASE_ADDR + ISRIndex);
      OldPrio = *pPrio;
      *pPrio = Prio;
      OS_RestoreI();
    } else {
      //
      // Handle System Interrupt controller
      //
      if ((ISRIndex < 4) | ((ISRIndex >= 7) && (ISRIndex <= 10)) | (ISRIndex == 13)) {
        //
        // Reserved ISR channel, do nothing
        //
      } else {
        //
        // Set priority in system interrupt priority control register
        //
        OS_DI();
        pPrio = (OS_U8*)(_SYSPRI1_ADDR);
        ISRIndex -= 4;                  // Adjust Index
        OldPrio = pPrio[ISRIndex];
        pPrio[ISRIndex] = Prio;
        OS_RestoreI();
      }
    }
  }
  return OldPrio;
}

/****** Final check of configuration ********************************/

#ifndef OS_UART_USED
  #error "OS_UART_USED has to be defined"
#endif

/*****  EOF  ********************************************************/