pxa270.cfg

来自「一个烧写FLASH的软件」· CFG 代码 · 共 45 行

CFG
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#Marvell/Intel PXA270 Scriptif { [info exists CHIPNAME] } {	   set  _CHIPNAME $CHIPNAME    } else {	    set  _CHIPNAME pxa270}if { [info exists ENDIAN] } {	   set  _ENDIAN $ENDIAN    } else {	    set  _ENDIAN little}if { [info exists CPUTAPID ] } {   set _CPUTAPID $CPUTAPID} else {  # force an error till we get a good number   set _CPUTAPID 0xffffffff}# set jtag_nsrst_delay to the delay introduced by your reset circuit# the rest of the needed delays are built into the openocd programjtag_nsrst_delay 260# set the jtag_ntrst_delay to the delay introduced by a reset circuit# the rest of the needed delays are built into the openocd programjtag_ntrst_delay 0#use combined on interfaces or targets that can't set TRST/SRST separatelyreset_config trst_and_srst separate#jtag scan chainset _TARGETNAME [format "%s.cpu" $_CHIPNAME]jtag newtap $_TARGETNAME -irlen 7 -ircapture 0x1 -irmask 0x7f -expected-id $_CPUTAPIDtarget create $_TARGETNAME xscale -endian $_ENDIAN -chain-position $_TARGETNAME -variant pxa27x# maps to PXA internal RAM. If you are using a PXA255# you must initialize SDRAM or leave this option off$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x5c000000 -work-area-size 0x10000 -work-area-backup 0#flash bank <driver> <base> <size> <chip_width> <bus_width># works for P30 flashflash bank cfi 0x00000000 0x1000000 2 4 0

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