📄 systemconfigurationregs.h
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#define POWER_MODE0_GATE_UART1_ENABLE 1
#define POWER_MODE0_GATE_UART0 7:7
#define POWER_MODE0_GATE_UART0_DISABLE 0
#define POWER_MODE0_GATE_UART0_ENABLE 1
#define POWER_MODE0_GATE_GPIO_PWM_I2C 6:6
#define POWER_MODE0_GATE_GPIO_PWM_I2C_DISABLE 0
#define POWER_MODE0_GATE_GPIO_PWM_I2C_ENABLE 1
#define POWER_MODE0_GATE_ZVPORT 5:5
#define POWER_MODE0_GATE_ZVPORT_DISABLE 0
#define POWER_MODE0_GATE_ZVPORT_ENABLE 1
#define POWER_MODE0_GATE_CSC 4:4
#define POWER_MODE0_GATE_CSC_DISABLE 0
#define POWER_MODE0_GATE_CSC_ENABLE 1
#define POWER_MODE0_GATE_2D 3:3
#define POWER_MODE0_GATE_2D_DISABLE 0
#define POWER_MODE0_GATE_2D_ENABLE 1
#define POWER_MODE0_GATE_DISPLAY 2:2
#define POWER_MODE0_GATE_DISPLAY_DISABLE 0
#define POWER_MODE0_GATE_DISPLAY_ENABLE 1
#define POWER_MODE0_GATE_INTMEM 1:1
#define POWER_MODE0_GATE_INTMEM_DISABLE 0
#define POWER_MODE0_GATE_INTMEM_ENABLE 1
#define POWER_MODE0_GATE_HOST 0:0
#define POWER_MODE0_GATE_HOST_DISABLE 0
#define POWER_MODE0_GATE_HOST_ENABLE 1
#define POWER_MODE0_CLOCK 0x000044
#define POWER_MODE0_CLOCK_P2XCLK_SELECT 29:29
#define POWER_MODE0_CLOCK_P2XCLK_SELECT_288 0
#define POWER_MODE0_CLOCK_P2XCLK_SELECT_336 1
#define POWER_MODE0_CLOCK_P2XCLK_DIVIDER 28:27
#define POWER_MODE0_CLOCK_P2XCLK_DIVIDER_1 0
#define POWER_MODE0_CLOCK_P2XCLK_DIVIDER_3 1
#define POWER_MODE0_CLOCK_P2XCLK_DIVIDER_5 2
#define POWER_MODE0_CLOCK_P2XCLK_SHIFT 26:24
#define POWER_MODE0_CLOCK_P2XCLK_SHIFT_0 0
#define POWER_MODE0_CLOCK_P2XCLK_SHIFT_1 1
#define POWER_MODE0_CLOCK_P2XCLK_SHIFT_2 2
#define POWER_MODE0_CLOCK_P2XCLK_SHIFT_3 3
#define POWER_MODE0_CLOCK_P2XCLK_SHIFT_4 4
#define POWER_MODE0_CLOCK_P2XCLK_SHIFT_5 5
#define POWER_MODE0_CLOCK_P2XCLK_SHIFT_6 6
#define POWER_MODE0_CLOCK_P2XCLK_SHIFT_7 7
#define POWER_MODE0_CLOCK_V2XCLK_SELECT 20:20
#define POWER_MODE0_CLOCK_V2XCLK_SELECT_288 0
#define POWER_MODE0_CLOCK_V2XCLK_SELECT_336 1
#define POWER_MODE0_CLOCK_V2XCLK_DIVIDER 19:19
#define POWER_MODE0_CLOCK_V2XCLK_DIVIDER_1 0
#define POWER_MODE0_CLOCK_V2XCLK_DIVIDER_3 1
#define POWER_MODE0_CLOCK_V2XCLK_SHIFT 18:16
#define POWER_MODE0_CLOCK_V2XCLK_SHIFT_0 0
#define POWER_MODE0_CLOCK_V2XCLK_SHIFT_1 1
#define POWER_MODE0_CLOCK_V2XCLK_SHIFT_2 2
#define POWER_MODE0_CLOCK_V2XCLK_SHIFT_3 3
#define POWER_MODE0_CLOCK_V2XCLK_SHIFT_4 4
#define POWER_MODE0_CLOCK_V2XCLK_SHIFT_5 5
#define POWER_MODE0_CLOCK_V2XCLK_SHIFT_6 6
#define POWER_MODE0_CLOCK_V2XCLK_SHIFT_7 7
#define POWER_MODE0_CLOCK_MCLK_SELECT 12:12
#define POWER_MODE0_CLOCK_MCLK_SELECT_288 0
#define POWER_MODE0_CLOCK_MCLK_SELECT_336 1
#define POWER_MODE0_CLOCK_MCLK_DIVIDER 11:11
#define POWER_MODE0_CLOCK_MCLK_DIVIDER_1 0
#define POWER_MODE0_CLOCK_MCLK_DIVIDER_3 1
#define POWER_MODE0_CLOCK_MCLK_SHIFT 10:8
#define POWER_MODE0_CLOCK_MCLK_SHIFT_0 0
#define POWER_MODE0_CLOCK_MCLK_SHIFT_1 1
#define POWER_MODE0_CLOCK_MCLK_SHIFT_2 2
#define POWER_MODE0_CLOCK_MCLK_SHIFT_3 3
#define POWER_MODE0_CLOCK_MCLK_SHIFT_4 4
#define POWER_MODE0_CLOCK_MCLK_SHIFT_5 5
#define POWER_MODE0_CLOCK_MCLK_SHIFT_6 6
#define POWER_MODE0_CLOCK_MCLK_SHIFT_7 7
#define POWER_MODE0_CLOCK_M2XCLK_SELECT 4:4
#define POWER_MODE0_CLOCK_M2XCLK_SELECT_288 0
#define POWER_MODE0_CLOCK_M2XCLK_SELECT_336 1
#define POWER_MODE0_CLOCK_M2XCLK_DIVIDER 3:3
#define POWER_MODE0_CLOCK_M2XCLK_DIVIDER_1 0
#define POWER_MODE0_CLOCK_M2XCLK_DIVIDER_3 1
#define POWER_MODE0_CLOCK_M2XCLK_SHIFT 2:0
#define POWER_MODE0_CLOCK_M2XCLK_SHIFT_0 0
#define POWER_MODE0_CLOCK_M2XCLK_SHIFT_1 1
#define POWER_MODE0_CLOCK_M2XCLK_SHIFT_2 2
#define POWER_MODE0_CLOCK_M2XCLK_SHIFT_3 3
#define POWER_MODE0_CLOCK_M2XCLK_SHIFT_4 4
#define POWER_MODE0_CLOCK_M2XCLK_SHIFT_5 5
#define POWER_MODE0_CLOCK_M2XCLK_SHIFT_6 6
#define POWER_MODE0_CLOCK_M2XCLK_SHIFT_7 7
#define POWER_MODE1_GATE 0x000048
#define POWER_MODE1_GATE_AC97_I2S 18:18
#define POWER_MODE1_GATE_AC97_I2S_DISABLE 0
#define POWER_MODE1_GATE_AC97_I2S_ENABLE 1
#define POWER_MODE1_GATE_8051 17:17
#define POWER_MODE1_GATE_8051_DISABLE 0
#define POWER_MODE1_GATE_8051_ENABLE 1
#define POWER_MODE1_GATE_USB_SLAVE 12:12
#define POWER_MODE1_GATE_USB_SLAVE_DISABLE 0
#define POWER_MODE1_GATE_USB_SLAVE_ENABLE 1
#define POWER_MODE1_GATE_USB_HOST 11:11
#define POWER_MODE1_GATE_USB_HOST_DISABLE 0
#define POWER_MODE1_GATE_USB_HOST_ENABLE 1
#define POWER_MODE1_GATE_SSP0_SSP1 10:10
#define POWER_MODE1_GATE_SSP0_SSP1_DISABLE 0
#define POWER_MODE1_GATE_SSP0_SSP1_ENABLE 1
#define POWER_MODE1_GATE_UART1 8:8
#define POWER_MODE1_GATE_UART1_DISABLE 0
#define POWER_MODE1_GATE_UART1_ENABLE 1
#define POWER_MODE1_GATE_UART0 7:7
#define POWER_MODE1_GATE_UART0_DISABLE 0
#define POWER_MODE1_GATE_UART0_ENABLE 1
#define POWER_MODE1_GATE_GPIO_PWM_I2C 6:6
#define POWER_MODE1_GATE_GPIO_PWM_I2C_DISABLE 0
#define POWER_MODE1_GATE_GPIO_PWM_I2C_ENABLE 1
#define POWER_MODE1_GATE_ZVPORT 5:5
#define POWER_MODE1_GATE_ZVPORT_DISABLE 0
#define POWER_MODE1_GATE_ZVPORT_ENABLE 1
#define POWER_MODE1_GATE_CSC 4:4
#define POWER_MODE1_GATE_CSC_DISABLE 0
#define POWER_MODE1_GATE_CSC_ENABLE 1
#define POWER_MODE1_GATE_2D 3:3
#define POWER_MODE1_GATE_2D_DISABLE 0
#define POWER_MODE1_GATE_2D_ENABLE 1
#define POWER_MODE1_GATE_DISPLAY 2:2
#define POWER_MODE1_GATE_DISPLAY_DISABLE 0
#define POWER_MODE1_GATE_DISPLAY_ENABLE 1
#define POWER_MODE1_GATE_INTMEM 1:1
#define POWER_MODE1_GATE_INTMEM_DISABLE 0
#define POWER_MODE1_GATE_INTMEM_ENABLE 1
#define POWER_MODE1_GATE_HOST 0:0
#define POWER_MODE1_GATE_HOST_DISABLE 0
#define POWER_MODE1_GATE_HOST_ENABLE 1
#define POWER_MODE1_CLOCK 0x00004C
#define POWER_MODE1_CLOCK_P2XCLK_SELECT 29:29
#define POWER_MODE1_CLOCK_P2XCLK_SELECT_288 0
#define POWER_MODE1_CLOCK_P2XCLK_SELECT_336 1
#define POWER_MODE1_CLOCK_P2XCLK_DIVIDER 28:27
#define POWER_MODE1_CLOCK_P2XCLK_DIVIDER_1 0
#define POWER_MODE1_CLOCK_P2XCLK_DIVIDER_3 1
#define POWER_MODE1_CLOCK_P2XCLK_DIVIDER_5 2
#define POWER_MODE1_CLOCK_P2XCLK_SHIFT 26:24
#define POWER_MODE1_CLOCK_P2XCLK_SHIFT_0 0
#define POWER_MODE1_CLOCK_P2XCLK_SHIFT_1 1
#define POWER_MODE1_CLOCK_P2XCLK_SHIFT_2 2
#define POWER_MODE1_CLOCK_P2XCLK_SHIFT_3 3
#define POWER_MODE1_CLOCK_P2XCLK_SHIFT_4 4
#define POWER_MODE1_CLOCK_P2XCLK_SHIFT_5 5
#define POWER_MODE1_CLOCK_P2XCLK_SHIFT_6 6
#define POWER_MODE1_CLOCK_P2XCLK_SHIFT_7 7
#define POWER_MODE1_CLOCK_V2XCLK_SELECT 20:20
#define POWER_MODE1_CLOCK_V2XCLK_SELECT_288 0
#define POWER_MODE1_CLOCK_V2XCLK_SELECT_336 1
#define POWER_MODE1_CLOCK_V2XCLK_DIVIDER 19:19
#define POWER_MODE1_CLOCK_V2XCLK_DIVIDER_1 0
#define POWER_MODE1_CLOCK_V2XCLK_DIVIDER_3 1
#define POWER_MODE1_CLOCK_V2XCLK_SHIFT 18:16
#define POWER_MODE1_CLOCK_V2XCLK_SHIFT_0 0
#define POWER_MODE1_CLOCK_V2XCLK_SHIFT_1 1
#define POWER_MODE1_CLOCK_V2XCLK_SHIFT_2 2
#define POWER_MODE1_CLOCK_V2XCLK_SHIFT_3 3
#define POWER_MODE1_CLOCK_V2XCLK_SHIFT_4 4
#define POWER_MODE1_CLOCK_V2XCLK_SHIFT_5 5
#define POWER_MODE1_CLOCK_V2XCLK_SHIFT_6 6
#define POWER_MODE1_CLOCK_V2XCLK_SHIFT_7 7
#define POWER_MODE1_CLOCK_MCLK_SELECT 12:12
#define POWER_MODE1_CLOCK_MCLK_SELECT_288 0
#define POWER_MODE1_CLOCK_MCLK_SELECT_336 1
#define POWER_MODE1_CLOCK_MCLK_DIVIDER 11:11
#define POWER_MODE1_CLOCK_MCLK_DIVIDER_1 0
#define POWER_MODE1_CLOCK_MCLK_DIVIDER_3 1
#define POWER_MODE1_CLOCK_MCLK_SHIFT 10:8
#define POWER_MODE1_CLOCK_MCLK_SHIFT_0 0
#define POWER_MODE1_CLOCK_MCLK_SHIFT_1 1
#define POWER_MODE1_CLOCK_MCLK_SHIFT_2 2
#define POWER_MODE1_CLOCK_MCLK_SHIFT_3 3
#define POWER_MODE1_CLOCK_MCLK_SHIFT_4 4
#define POWER_MODE1_CLOCK_MCLK_SHIFT_5 5
#define POWER_MODE1_CLOCK_MCLK_SHIFT_6 6
#define POWER_MODE1_CLOCK_MCLK_SHIFT_7 7
#define POWER_MODE1_CLOCK_M2XCLK_SELECT 4:4
#define POWER_MODE1_CLOCK_M2XCLK_SELECT_288 0
#define POWER_MODE1_CLOCK_M2XCLK_SELECT_336 1
#define POWER_MODE1_CLOCK_M2XCLK_DIVIDER 3:3
#define POWER_MODE1_CLOCK_M2XCLK_DIVIDER_1 0
#define POWER_MODE1_CLOCK_M2XCLK_DIVIDER_3 1
#define POWER_MODE1_CLOCK_M2XCLK_SHIFT 2:0
#define POWER_MODE1_CLOCK_M2XCLK_SHIFT_0 0
#define POWER_MODE1_CLOCK_M2XCLK_SHIFT_1 1
#define POWER_MODE1_CLOCK_M2XCLK_SHIFT_2 2
#define POWER_MODE1_CLOCK_M2XCLK_SHIFT_3 3
#define POWER_MODE1_CLOCK_M2XCLK_SHIFT_4 4
#define POWER_MODE1_CLOCK_M2XCLK_SHIFT_5 5
#define POWER_MODE1_CLOCK_M2XCLK_SHIFT_6 6
#define POWER_MODE1_CLOCK_M2XCLK_SHIFT_7 7
#define POWER_SLEEP_GATE 0x000050
#define POWER_SLEEP_GATE_PLL_RECOVERY_CLOCK 22:19
#define POWER_SLEEP_GATE_PLL_RECOVERY_CLOCK_4096 0
#define POWER_SLEEP_GATE_PLL_RECOVERY_CLOCK_2048 1
#define POWER_SLEEP_GATE_PLL_RECOVERY_CLOCK_1024 2
#define POWER_SLEEP_GATE_PLL_RECOVERY_CLOCK_512 3
#define POWER_SLEEP_GATE_PLL_RECOVERY_CLOCK_256 4
#define POWER_SLEEP_GATE_PLL_RECOVERY_CLOCK_128 5
#define POWER_SLEEP_GATE_PLL_RECOVERY_CLOCK_64 6
#define POWER_SLEEP_GATE_PLL_RECOVERY_CLOCK_32 7
#define POWER_SLEEP_GATE_PLL_RECOVERY_CLOCK_16 8
#define POWER_SLEEP_GATE_PLL_RECOVERY_CLOCK_8 9
#define POWER_SLEEP_GATE_PLL_RECOVERY_CLOCK_4 10
#define POWER_SLEEP_GATE_PLL_RECOVERY_CLOCK_2 11
#define POWER_SLEEP_GATE_PLL_RECOVERY 14:13
#define POWER_SLEEP_GATE_PLL_RECOVERY_32 0
#define POWER_SLEEP_GATE_PLL_RECOVERY_64 1
#define POWER_SLEEP_GATE_PLL_RECOVERY_96 2
#define POWER_SLEEP_GATE_PLL_RECOVERY_128 3
#define POWER_MODE_CTRL 0x000054
#define POWER_MODE_CTRL_SLEEP_STATUS 2:2
#define POWER_MODE_CTRL_SLEEP_STATUS_INACTIVE 0
#define POWER_MODE_CTRL_SLEEP_STATUS_ACTIVE 1
#define POWER_MODE_CTRL_MODE 1:0
#define POWER_MODE_CTRL_MODE_MODE0 0
#define POWER_MODE_CTRL⌨️ 快捷键说明
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