drx_driver.h

用于DRX3973或DRX39系列的芯片的控制

   DRX_LOCK_STATE_3,          /**< Generic lock state */
   DRX_LOCK_STATE_4,          /**< Generic lock state */
   DRX_LOCK_STATE_5,          /**< Generic lock state */
   DRX_LOCK_STATE_6,          /**< Generic lock state */
   DRX_LOCK_STATE_7,          /**< Generic lock state */
   DRX_LOCK_STATE_8,          /**< Generic lock state */
   DRX_LOCK_STATE_9,          /**< Generic lock state */
   DRX_LOCKED                 /**< Device is in lock */
} DRXLockStatus_t, *pDRXLockStatus_t;

/**
* \enum DRXUIO_t
* \brief Used to address a User IO (UIO).
*/
typedef enum{
   DRX_UIO1  ,
   DRX_UIO2  ,
   DRX_UIO3  ,
   DRX_UIO4  ,
   DRX_UIO5  ,
   DRX_UIO6  ,
   DRX_UIO7  ,
   DRX_UIO8  ,
   DRX_UIO9  ,
   DRX_UIO10 ,
   DRX_UIO11 ,
   DRX_UIO12 ,
   DRX_UIO13 ,
   DRX_UIO14 ,
   DRX_UIO15 ,
   DRX_UIO16 ,
   DRX_UIO17 ,
   DRX_UIO18 ,
   DRX_UIO19 ,
   DRX_UIO20 ,
   DRX_UIO21 ,
   DRX_UIO22 ,
   DRX_UIO23 ,
   DRX_UIO24 ,
   DRX_UIO25 ,
   DRX_UIO26 ,
   DRX_UIO27 ,
   DRX_UIO28 ,
   DRX_UIO29 ,
   DRX_UIO30 ,
   DRX_UIO31 ,
   DRX_UIO32 ,
   DRX_UIO_MAX = DRX_UIO32
} DRXUIO_t, *pDRXUIO_t;

/**
* \enum DRXUIOMode_t
* \brief Used to configure the modus oprandi of a UIO.
*/
typedef enum{
   DRX_UIO_MODE_DISABLE = 0, /**< UIO is not used,pin is configured as input */
   DRX_UIO_MODE_READWRITE,   /**< UIO is used for read/write by application */
   DRX_UIO_MODE_FIRMWARE     /**< UIO is controled and used by firmware */
} DRXUIOMode_t, *pDRXUIOMode_t;

/**
* \enum DRXOOBDirection_t
* \brief Used to select upstream or downstream OOB control.
*/
typedef enum  {
  DRX_OOB_DOWNSTREAM = 0,  /**< Downstream out-of-band */
  DRX_OOB_UPSTREAM         /**< Upstream out-of-band */
} DRXOOBDirection_t, *pDRXOOBDirection_t;


/**
* \enum DRXOOBStandard_t
* \brief Used to select OOB standard.
*
* Based on ANSI 55-1 and 55-2
*/
typedef enum {
   DRX_STANDARD_OOB_A = 0,  /**< ANSI 55-2 A both up- and down stream */
   DRX_STANDARD_OOB_B,      /**< ANSI 55-2 B both up- and down stream */
   DRX_STANDARD_OOB_C,      /**< ANSI 55-2 C only upstream */
   DRX_STANDARD_OOB_STD,    /**< ANSI 55-1 standard both up- and down stream */
   DRX_STANDARD_OOB_STD_ALT,    /**< ANSI 55-1 standard alt*/
   DRX_STANDARD_OOB_EXT     /**< ANSI 55-1 extended only upstream */
} DRXOOBStandard_t, *pDRXOOBStandard_t;

/**
* \enum DRXOOBBitrate_t
* \brief Used to select bitrates for OOB up and downstream channels.
*
* Based on ANSI 55-1 and 55-2
* TODO : ANSI 55-1 ext upstream bitrates
*/
typedef enum {
   DRX_BITRATE_256KBS = 0, /**< ANSI 55-1 std upstream , 55-2 A upstream*/
   DRX_BITRATE_1544KBS,    /**< ANSI 55-2 A downstream, 55-2 B upstrteam */
   DRX_BITRATE_2048KBS,    /**< ANSI 55-1 downstream */
   DRX_BITRATE_3088KBS     /**< ANSI 55-2 B downstream, 55-2 C upstream */
} DRXOOBBitrate_t, *pDRXOOBBitrate_t;

/*-------------------------------------------------------------------------
STRUCTS
-------------------------------------------------------------------------*/

/*============================================================================*/
/*============================================================================*/
/*== CTRL CFG related data structures ========================================*/
/*============================================================================*/
/*============================================================================*/

typedef enum {
   DRX_CFG_MPEG_OUTPUT = 0,
   /* ...  generic configuration functions */
   DRX_CTRL_CFG_MAX /* dummy, never to be used */
} DRXCfgType_t, *pDRXCfgType_t;

/*============================================================================*/
/*============================================================================*/
/*== CTRL related data structures ============================================*/
/*============================================================================*/
/*============================================================================*/

/* DRX_CTRL_LOAD_UCODE, DRX_CTRL_VERIFY_UCODE */
typedef struct {
   pu8_t    mcData;
   u16_t    mcSize;
} DRXUCodeInfo_t, *pDRXUCodeInfo_t;

/*========================================*/

/* DRX_CTRL_SET_CHANNEL, DRX_CTRL_GET_CHANNEL */

/**
* \struct DRXChannel_t
* The set of parameters describing a single channel.
*/
typedef struct {
   DRXFrequency_t       frequency;      /**< in kHz */
   DRXBandwidth_t       bandwidth;
   DRXMirror_t          mirror;
   DRXConstellation_t   constellation;
   DRXHierarchy_t       hierarchy;
   DRXPriority_t        priority;
   DRXCoderate_t        coderate;
   DRXGuard_t           guard;
   DRXFftmode_t         fftmode;
   DRXClassification_t  classification;
} DRXChannel_t, *pDRXChannel_t;


/*========================================*/

/* DRX_CTRL_SIG_QUALITY */
typedef struct {
   u16_t MER;              /**< in steps of 0.1 dB */
   u32_t preViterbiBER ;   /**< in steps of 1/scaleFactorBER */
   u32_t postViterbiBER ;  /**< in steps of 1/scaleFactorBER */
   u32_t scaleFactorBER;   /**< scale factor for BER */
   u16_t packetError ;     /**< number of packet errors */
}DRXSigQuality_t, *pDRXSigQuality_t;

/*========================================*/

/* DRX_CTRL_CONSTEL */

/**
* \struct DRXComplex_t
* A complex number.
*/
typedef struct {
   s16_t im; /**< Imaginair part. */
   s16_t re; /**< Real part. */
} DRXComplex_t, *pDRXComplex_t;


/*========================================*/

/* used in DRX_CTRL_SCAN_INIT's param structure */
typedef struct {
    DRXFrequency_t first;     /**< First centre frequency in this band */
    DRXFrequency_t last;      /**< Last centre frequency in this band */
    DRXBandwidth_t bandwidth; /**< Bandwidth within this frequency band */
    u16_t          chNumber;  /**< First channel number in this band, or first index in chNames */
    char         **chNames;   /**< List of channel names in this band (optional) */
} DRXFrequencyPlan_t, *pDRXFrequencyPlan_t;

/* DRX_CTRL_SCAN_INIT */
typedef struct {
   pDRXFrequencyPlan_t frequencyPlan;     /**< Frequency plan (array)*/
   u16_t               frequencyPlanSize; /**< Number of bands */
   u32_t               numTries;          /**< Max channels tried */
} DRXScanParam_t, *pDRXScanParam_t;

/*========================================*/

/* DRX_CTRL_TPS_INFO */

typedef struct {
  DRXFftmode_t       fftmode;
  DRXGuard_t         guard;
  DRXConstellation_t constellation;
  DRXHierarchy_t     hierarchy;
  DRXCoderate_t      highCoderate;
  DRXCoderate_t      lowCoderate;
  DRXTPSFrame_t      frame;
  u8_t               length;
  u16_t              cellId;
}DRXTPSInfo_t, *pDRXTPSInfo_t;

/*========================================*/

/* DRX_CTRL_SET_POWER_MODE */

typedef enum {
   DRX_POWER_UP = 0,     /**< Generic */
   DRX_POWER_MODE_1,     /**< Device specific */
   DRX_POWER_MODE_2,     /**< Device specific  */
   DRX_POWER_MODE_3,     /**< Device specific  */
   DRX_POWER_MODE_4,     /**< Device specific  */
   DRX_POWER_MODE_5,     /**< Device specific  */
   DRX_POWER_MODE_6,     /**< Device specific  */
   DRX_POWER_MODE_7,     /**< Device specific  */
   DRX_POWER_MODE_8,     /**< Device specific  */
   DRX_POWER_MODE_9,     /**< Device specific  */
   DRX_POWER_DOWN = 255  /**< Generic */
}DRXPowerMode_t, *pDRXPowerMode_t;

/*========================================*/

/* DRX_CTRL_VERSION */

typedef enum
{
  /* Add, remove or edit as necessary!
     Also maintain DRX_STR_MODULE(x) below! */
  DRX_MODULE_DEVICE,
  DRX_MODULE_MICROCODE,
  DRX_MODULE_DRIVERCORE,
  DRX_MODULE_DEVICEDRIVER,
  DRX_MODULE_DAP,
  DRX_MODULE_BSP_I2C,
  DRX_MODULE_BSP_TUNER,
  DRX_MODULE_BSP_HOST,

  DRX_MODULE_UNKNOWN

} DRXModule_t, *pDRXModule_t;


/* type to store a single version structure */

typedef struct {

  DRXModule_t  moduleType;    /**< type identifier of the module */
  char        *moduleName;    /**< name or description of module */

  u16_t        vMajor;        /**< major version number */
  u16_t        vMinor;        /**< minor version number */
  u16_t        vPatch;        /**< patch version number */
  char        *vString;       /**< version as text string */

} DRXVersion_t, *pDRXVersion_t;


/* type to make a linked-list of version structures */

typedef struct DRXVersionList_s {

  pDRXVersion_t            version;
  struct DRXVersionList_s *next;

} DRXVersionList_t, *pDRXVersionList_t;

/*========================================*/

/* DRX_CTRL_UIO_CFG */
typedef struct {
   DRXUIO_t      uio;
   DRXUIOMode_t  mode;
} DRXUIOCfg_t, *pDRXUIOCfg_t;

/*========================================*/

/* DRX_CTRL_UIO_READ, DRX_CTRL_UIO_WRITE */
typedef struct {
   DRXUIO_t uio;
   Bool_t   value;
} DRXUIOData_t, *pDRXUIOData_t;

/*========================================*/

/* DRX_CTRL_SET_OOB */
typedef struct {
   DRXOOBDirection_t    direction;
   DRXOOBStandard_t     standard;
   DRXFrequency_t       frequency;
   u32_t                powerLevel;    /* upstream ,RF ,in units of 0.5 dBmV */
   DRXConstellation_t   constellation; /* upstream */
   DRXOOBBitrate_t      bitrate;       /* upstream */
} DRXOOB_t, *pDRXOOB_t;


/*========================================*/

/* DRX_CTRL_SET_CFG */

/* CTRL CFG base data structure */
typedef struct {
   DRXCfgType_t cfgType ;
   void*        cfgData ;
} DRXCfg_t, *pDRXCfg_t;

/*========================================*/

/* CTRL CFG MPEG ouput */
/**
* \struct DRXCfgMPEGOutput_t
* \brief Configuartion parameters for MPEG output control.
*/

typedef struct {
   Bool_t      enableMPEGOutput;      /**< If TRUE, enable MPEG output */
   Bool_t      insertRSByte;          /**< If TRUE, insert RS byte */
   Bool_t      enableParallel;        /**< If TRUE, parallel out otherwise serial */
   Bool_t      invertDATA;            /**< If TRUE, invert DATA signals */
   Bool_t      invertERR;             /**< If TRUE, invert ERR signal */
   Bool_t      invertSTR;             /**< If TRUE, invert STR signals */
   Bool_t      invertVAL;             /**< If TRUE, invert VAL signals */
   Bool_t      invertCLK;             /**< If TRUE, invert CLK signals */
} DRXCfgMPEGOutput_t, *pDRXCfgMPEGOutput_t;

/*========================================*/

/* DRX_CTRL_I2C_READWRITE */
/**
* \struct DRXI2CData_t
* \brief Data for I2C via 2nd or 3rd or etc I2C port.
*
* If portNr is equal to primairy portNr BSPI2C will be used.
*
*/
typedef struct {
   u16_t            portNr;
   pI2CDeviceAddr_t wDevAddr;
   u16_t            wCount;
   pu8_t            wData;
   pI2CDeviceAddr_t rDevAddr;
   u16_t            rCount;
   pu8_t            rData;
} DRXI2CData_t, *pDRXI2CData_t;

/*============================================================================*/
/*============================================================================*/
/*== Data access structures ==================================================*/
/*============================================================================*/
/*============================================================================*/

/* Address on device */
typedef u32_t DRXaddr_t;

/* Protocol specific flags */
typedef u32_t DRXflags_t;

/* Write block of data to device */
typedef DRXStatus_t (*DRXWriteBlockFunc_t) (
         pI2CDeviceAddr_t devAddr,       /* address of I2C device        */
         DRXaddr_t        addr,          /* address of register/memory   */
         u16_t            datasize,      /* size of data in bytes        */
         pu8_t            data,          /* data to send                 */