drx3973d.c

用于DRX3973或DRX39系列的芯片的控制

/**
* \file $Id: drx3973d.c,v 1.114 2005/12/13 18:46:11 paulja Exp $
*
* \brief DRX3973D specific implementation of DRX driver.
*
* \author Paul Janssen
*/

/*
* $(c) 2004-2005 Micronas GmbH. All rights reserved.
*
* This software and related documentation (the 'Software') are intellectual
* property owned by Micronas and are copyright of Micronas, unless specifically
* noted otherwise.
*
* Any use of the Software is permitted only pursuant to the terms of the
* license agreement, if any, which accompanies, is included with or applicable
* to the Software ('License Agreement') or upon express written consent of
* Micronas. Any copying, reproduction or redistribution of the Software in
* whole or in part by any means not in accordance with the License Agreement
* or as agreed in writing by Micronas is expressly prohibited.
*
* THE SOFTWARE IS WARRANTED, IF AT ALL, ONLY ACCORDING TO THE TERMS OF THE
* LICENSE AGREEMENT. EXCEPT AS WARRANTED IN THE LICENSE AGREEMENT THE SOFTWARE
* IS DELIVERED 'AS IS' AND MICRONAS HEREBY DISCLAIMS ALL WARRANTIES AND
* CONDITIONS WITH REGARD TO THE SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES
* AND CONDITIONS OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, QUIT
* ENJOYMENT, TITLE AND NON-INFRINGEMENT OF ANY THIRD PARTY INTELLECTUAL
* PROPERTY OR OTHER RIGHTS WHICH MAY RESULT FROM THE USE OR THE INABILITY
* TO USE THE SOFTWARE.
*
* IN NO EVENT SHALL MICRONAS BE LIABLE FOR INDIRECT, INCIDENTAL, CONSEQUENTIAL,
* PUNITIVE, SPECIAL OR OTHER DAMAGES WHATSOEVER INCLUDING WITHOUT LIMITATION,
* DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION, LOSS OF BUSINESS
* INFORMATION, AND THE LIKE, ARISING OUT OF OR RELATING TO THE USE OF OR THE
* INABILITY TO USE THE SOFTWARE, EVEN IF MICRONAS HAS BEEN ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGES, EXCEPT PERSONAL INJURY OR DEATH RESULTING FROM
* MICRONAS' NEGLIGENCE.                                                        $
*
*/

/*-----------------------------------------------------------------------------
INCLUDE FILES
----------------------------------------------------------------------------*/

#include "drx_dap_wasi.h"     /* data access protocol */
#include "drx3973d.h"
#include "drx3973d_map.h"

/*-----------------------------------------------------------------------------
ENUMS
----------------------------------------------------------------------------*/

/*-----------------------------------------------------------------------------
DEFINES
----------------------------------------------------------------------------*/

/**
* \def DRX3973D_DEF_I2C_ADDR
* \brief Default I2C addres of a demodulator instance.
*/
#define DRX3973D_DEF_I2C_ADDR ((0x70)<<1)

/**
* \def DRX3973D_DEF_DEMOD_DEV_ID
* \brief Default device identifier of a demodultor instance.
*/
#define DRX3973D_DEF_DEMOD_DEV_ID   (1)


/**
* \def DRX3973D_SCAN_TIMEOUT
* \brief Timeout value for waiting on demod lock during channel scan (millisec).
*/
#define DRX3973D_SCAN_TIMEOUT    604

/**
* \def DRX3973D_DAP
* \brief Name of structure containing all data access protocol functions.
*/
#define DRX3973D_DAP drxDapWasiFunct_g

/**
* \def HI_I2C_DELAY
* \brief HI timing delay for I2C timing (in nano seconds)
*
*  Used to compute HI_CFG_DIV, should be 250 ns.
*
*/
#define HI_I2C_DELAY    84

/**
* \def HI_I2C_BRIDGE_DELAY
* \brief HI timing delay for I2C timing (in nano seconds)
*
*  Used to compute HI_CFG_BDL, should be 1000 ns.
*  Set to 1550 to enable working with murata tuner.
*
*/
#define HI_I2C_BRIDGE_DELAY   750

/**
* \def EQ_TD_TPS_PWR_XXXX
* \brief TD_TPS_PWR constants
*
*  Used in SetChannel.
*
*/
#define EQ_TD_TPS_PWR_UNKNOWN          0x00C0   /* Unknown configurations */
#define EQ_TD_TPS_PWR_QPSK             0x016A
#define EQ_TD_TPS_PWR_QAM16_ALPHAN     0x0195
#define EQ_TD_TPS_PWR_QAM16_ALPHA1     0x0195
#define EQ_TD_TPS_PWR_QAM16_ALPHA2     0x011E
#define EQ_TD_TPS_PWR_QAM16_ALPHA4     0x01CE
#define EQ_TD_TPS_PWR_QAM64_ALPHAN     0x019F
#define EQ_TD_TPS_PWR_QAM64_ALPHA1     0x019F
#define EQ_TD_TPS_PWR_QAM64_ALPHA2     0x00F8
#define EQ_TD_TPS_PWR_QAM64_ALPHA4     0x014D


/**
* \def DRX3973D_DEF_XXXX
* \brief Shadow register default values
*
*  Needed for AGC IF/RF control.
*
*/
#define DRX3973D_DEF_AG_PWD_CONSUMER 0x000E
#define DRX3973D_DEF_AG_PWD_PRO 0x0000
#define DRX3973D_DEF_AG_AGC_SIO 0x0000

/**
* \def DRX3973D_OSCDEV_DO_SCAN
* \brief Instruct SC to do a scan for oscillator frequency deviation.
*
* This defines the search range for a clock deviation. Has to be even.
* If set to n the search range will be from -n/2 ... n/2 times the specified
* step size.
*/
#define DRX3973D_OSCDEV_DO_SCAN  (16)

/**
* \def DRX3973D_OSCDEV_DONT_SCAN
* \brief Instruct SC to skip the scan for oscillator frequency deviation.
*
* Search range is set to 0.
*/
#define DRX3973D_OSCDEV_DONT_SCAN  (0)

/**
* \def DRX3973D_OSCDEV_STEP
* \brief Step size for scan for oscillator frequency deviation.
*
* This defines the stepsize used during the search.
* 275 is approx. a 25 ppm step when tuning to an 8 Mhz channel (worst case).
* 220 is approx. a 20 ppm step when tuning to an 8 Mhz channel (worst case).
*/
#define DRX3973D_OSCDEV_STEP  (275)

/**
* \def DRX3973D_BANDWIDTH_8MHZ_IN_HZ
* \brief Defines for bandwidths in Hz (6,7 & 8Mhz).
*/
/* (64/7)*(8/8)*1000000 Hz */
#define DRX3973D_BANDWIDTH_8MHZ_IN_HZ  (0x8B8249L)
/* (64/7)*(7/8)*1000000 */
#define DRX3973D_BANDWIDTH_7MHZ_IN_HZ  (0x7A1200L)
/* (64/7)*(6/8)*1000000 */
#define DRX3973D_BANDWIDTH_6MHZ_IN_HZ  (0x68A1B6L)

/*============================================================================*/
/*=== WORKAROUNDS ============================================================*/
/*============================================================================*/

/**
* \def USE_LC_INIT
* \brief If defined compile with usage of InitLC routine, otherwise without
*
* LCInit() is needed by LC code version 0.1.32.
* LCInit() is NOT needed by LC code version 0.1.67 or higher.
* TODO remove
*
*/
/*
#define USE_LC_INIT
*/

/**
* \def COMPILE_FOR_QT
* \brief If defined compile for QT.
*
* Several settings are different for QT environment.
* TODO remove
*
*/
/*
#define COMPILE_FOR_QT
*/

/**
* \def DONT_USE_SEMAPHORES
* \brief If defined , do not use semaphores for HI or SC communication.
*
* Due to problem with read-modify-write access originaly spec-ed semaphores
* cannot be used. The semaphores may not reside in HI or SC data RAM.
*
*/
#define DONT_USE_SEMAPHORES

/*============================================================================*/
/*=== REGISTER ACCESS MACROS =================================================*/
/*============================================================================*/

#ifdef DRX3973DDRIVER_DEBUG
#include <stdio.h>
#define CHK_ERROR( s ) \
        do{ \
            if ( (s) != DRX_STS_OK ) \
            { \
               fprintf(stderr, \
                       "ERROR[\n file    : %s\n line    : %d\n]\n", \
                       __FILE__,__LINE__); \
               goto rw_error; }; \
            } \
        while (0)
#else
#define CHK_ERROR( s ) \
        do{ \
            if ( (s) != DRX_STS_OK ) \
            { \
               goto rw_error; }; \
            } \
        while (0)
#endif

#define WR16( dev, addr, val, flags) \
        CHK_ERROR( DRX3973D_DAP.writeReg16Func( (dev), \
                                                (addr), \
                                                (val), \
                                                (flags) ) )

#define RR16( dev, addr, val, flags) \
        CHK_ERROR( DRX3973D_DAP.readReg16Func( (dev), \
                                               (addr), \
                                               (val), \
                                               (flags) ) )

#define RMWR16( dev, addr, wval, rval) \
        CHK_ERROR( DRX3973D_DAP.readModifyWriteReg16Func( (dev), \
                                             (addr), \
                                             (HI_RA_RAM_SLV0_READBACK__A), \
                                             (wval), \
                                             (rval) ) )

#define BCWR16( dev, addr, val ) \
        CHK_ERROR( DRX3973D_DAP.writeReg16Func( (dev), \
                                                (addr), \
                                                (val), \
                                                DRXDAP_WASI_BROADCAST ) )

#define WRBLOCK( dev, addr, size, data ) \
        CHK_ERROR( DRX3973D_DAP.writeBlockFunc( (dev), \
                                                (addr), \
                                                (size), \
                                                (data), \
                                                (0) ) )

/*============================================================================*/
/*=== HI COMMAND RELATED DEFINES =============================================*/
/*============================================================================*/

/* TODO find a sensible nr of retries based upon i2c speed */
#define DRX3973D_MAX_RETRIES (1000)

/*-----------------------------------------------------------------------------
STATIC VARIABLES
----------------------------------------------------------------------------*/

/*-----------------------------------------------------------------------------
GLOBAL VARIABLES
----------------------------------------------------------------------------*/
/**
* \var DRX3973D_Func_g
* \brief The driver functions of the drx3973D
*/
DRXDemodFunc_t DRX3973DFunctions_g  =
{
   0,                /* if (typeId == 0) then driver will determine typeId */
   DRX3973D_Open,
   DRX3973D_Close,
   DRX3973D_Ctrl
};

/**
* \var DRX3973DData_g
* \brief Extended attributes for a demodulator ot the DRX3973D family.
*
* Device specific attributes for DRX3973D family. They are initialised
* when calling the DRX_Open() function. They must be allocated before
* calling the DRX_Open() function.
*
*/
DRX3973DData_t DRX3973DData_g =
{
   0,                               /* expected sysClockFreq */
   /* HI configuration */
   0,                               /* HI Configure() parameter 2 */
   0,                               /* HI Configure() parameter 3 */
   0,                               /* HI Configure() parameter 4 */
   0,                               /* HI Configure() parameter 5 */
   /* GET/SET Channel */
   0,                               /* frequency shifter setting  */
   /* Chip Id */
   FALSE,                           /* consumer device flag */
   /* OC configuration */
   0,                               /* shadow EcOcRegOcMpgSio */
   0,                               /* shadow EcOcRegOcModeLop */
   0,                               /* shadow EcOcRegOcModeHip */
   0,                               /* shadow EcOcRegIprInvMpg */
   0,                               /* shadow FeAgRegAgPwd */
   0,                               /* shadow FeAgRegAgAgcSio */
   /* UIO configuartion */
   DRX_UIO_MODE_DISABLE,            /* initial UIO mode HI */
   DRX_UIO_MODE_DISABLE,            /* initial UIO mode SC */
   /* AGC control */
   {             /* IF AGC settings */
      DRX3973D_AGC_CTRL_AUTO,       /* ctrlMode */
      0,                            /* level */
      0,                            /* min */
      0,                            /* max */
      0                             /* speed */
   },
   {             /* RF AGC settings */
      DRX3973D_AGC_CTRL_AUTO,       /* ctrlMode */
      0,                            /* level */
      0,                            /* min */
      0,                            /* max */
      0                             /* speed */
   },
   DRX3973D_CSCD_INIT,              /* system clock deviation FSM */
   0,                               /* current bandwidth selection */
   FALSE,                           /* ignore lock status for SigQuality */
#ifndef _CH_
   {                                /* version stuff: human readable version */
      "01234567890",
      "01234567890"
   },
   {                                /* version stuff: version info structs */
      {
         DRX_MODULE_UNKNOWN,
         NULL,
         0,
         0,
         0,
         NULL
      },
      {
         DRX_MODULE_UNKNOWN,
         NULL,
         0,
         0,
         0,
         NULL
      }
   },
   {                                /* version stuff: version info list */
      {
         NULL,
         NULL
      },
      {
         NULL,
         NULL
      }
   }
#endif /* _CH_  */
};

/**
* \var DRX3973DDefaultAddr_g
* \brief Default I2C address and device identifier.
*/
I2CDeviceAddr_t DRX3973DDefaultAddr_g = {
      DRX3973D_DEF_I2C_ADDR,     /* i2c address */
      DRX3973D_DEF_DEMOD_DEV_ID  /* device id */
};

/**
* \var DRX3973DDefaultCommAttr_g
* \brief Default common attributes of a drx3973d demodulator instance.
*/
DRXCommonAttr_t DRX3973DDefaultCommAttr_g = {
   (pu8_t)NULL,   /* ucode ptr */