tda1004x.c

linux_dvb的驱动程序：linuxtv-dvb-1.1.1.rar

                } else if (fe_params->frequency < 861000000) {
                        band = 4;
                } else {
                        return -EINVAL;
                }

                // work out filter
                switch (fe_params->u.ofdm.bandwidth) {
                case BANDWIDTH_6_MHZ:
                        filter = 0;
                        break;

                case BANDWIDTH_7_MHZ:
                        filter = 0;
                        break;

                case BANDWIDTH_8_MHZ:
                        filter = 1;
                        break;

                default:
                        return -EINVAL;
                }

                // calculate divisor
                // ((36130000+((1000000/6)/2)) + Finput)/(1000000/6)
                tuner_frequency =
                      (((fe_params->frequency / 1000) * 6) + 217280) / 1000;

                // setup tuner buffer
                tuner_buf[0] = tuner_frequency >> 8;
                tuner_buf[1] = tuner_frequency & 0xff;
                tuner_buf[2] = 0xca;
                tuner_buf[3] = (cp << 5) | (filter << 3) | band;

                // tune it
                if (tda_state->fe_type == FE_TYPE_TDA10046H) {
                        // setup auto offset
                        tda1004x_write_mask(i2c, tda_state, TDA1004X_AUTO, 0x10, 0x10);
                        tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 0x80, 0);
                        tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF2, 0xC0, 0);

                        // disable agc_conf[2]
                        tda1004x_write_mask(i2c, tda_state, TDA10046H_AGC_CONF, 4, 0);
                }
                tda1004x_enable_tuner_i2c(i2c, tda_state);
                tuner_msg.addr = tda_state->tuner_address;
                tuner_msg.len = 4;
                if (i2c->xfer(i2c, &tuner_msg, 1) != 1) {
                        return -EIO;
                }
                dvb_delay(1);
                tda1004x_disable_tuner_i2c(i2c, tda_state);
                if (tda_state->fe_type == FE_TYPE_TDA10046H)
                        tda1004x_write_mask(i2c, tda_state, TDA10046H_AGC_CONF, 4, 4);
                break;

        default:
                return -EINVAL;
        }

        dprintk("%s: success\n", __FUNCTION__);

        // done
        return 0;
}

static int tda1004x_set_fe(struct dvb_i2c_bus *i2c,
                           struct tda1004x_state *tda_state,
                           struct dvb_frontend_parameters *fe_params)
{
        int tmp;
        int inversion;

        dprintk("%s\n", __FUNCTION__);

        // set frequency
        if ((tmp = tda1004x_set_frequency(i2c, tda_state, fe_params)) < 0)
                return tmp;

        // hardcoded to use auto as much as possible
        fe_params->u.ofdm.code_rate_HP = FEC_AUTO;
        fe_params->u.ofdm.guard_interval = GUARD_INTERVAL_AUTO;
        fe_params->u.ofdm.transmission_mode = TRANSMISSION_MODE_AUTO;

        // Set standard params.. or put them to auto
        if ((fe_params->u.ofdm.code_rate_HP == FEC_AUTO) ||
            (fe_params->u.ofdm.code_rate_LP == FEC_AUTO) ||
            (fe_params->u.ofdm.constellation == QAM_AUTO) ||
            (fe_params->u.ofdm.hierarchy_information == HIERARCHY_AUTO)) {
                tda1004x_write_mask(i2c, tda_state, TDA1004X_AUTO, 1, 1);	// enable auto
                tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 0x03, 0);	// turn off constellation bits
                tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 0x60, 0);	// turn off hierarchy bits
                tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF2, 0x3f, 0);	// turn off FEC bits
        } else {
                tda1004x_write_mask(i2c, tda_state, TDA1004X_AUTO, 1, 0);	// disable auto

                // set HP FEC
                tmp = tda1004x_encode_fec(fe_params->u.ofdm.code_rate_HP);
                if (tmp < 0) return tmp;
                tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF2, 7, tmp);

                // set LP FEC
                if (fe_params->u.ofdm.code_rate_LP != FEC_NONE) {
                        tmp = tda1004x_encode_fec(fe_params->u.ofdm.code_rate_LP);
                        if (tmp < 0) return tmp;
                        tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF2, 0x38, tmp << 3);
                }

                // set constellation
                switch (fe_params->u.ofdm.constellation) {
                case QPSK:
                        tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 3, 0);
                        break;

                case QAM_16:
                        tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 3, 1);
                        break;

                case QAM_64:
                        tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 3, 2);
                        break;

                default:
                        return -EINVAL;
                }

                // set hierarchy
                switch (fe_params->u.ofdm.hierarchy_information) {
                case HIERARCHY_NONE:
                        tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 0x60, 0 << 5);
                        break;

                case HIERARCHY_1:
                        tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 0x60, 1 << 5);
                        break;

                case HIERARCHY_2:
                        tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 0x60, 2 << 5);
                        break;

                case HIERARCHY_4:
                        tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 0x60, 3 << 5);
                        break;

                default:
                        return -EINVAL;
                }
        }

        // set bandwidth
        switch(tda_state->fe_type) {
        case FE_TYPE_TDA10045H:
                tda10045h_set_bandwidth(i2c, tda_state, fe_params->u.ofdm.bandwidth);
                break;

        case FE_TYPE_TDA10046H:
                tda10046h_set_bandwidth(i2c, tda_state, fe_params->u.ofdm.bandwidth);
                break;
        }

        // need to invert the inversion for TT TDA10046H
        inversion = fe_params->inversion;
        if (tda_state->fe_type == FE_TYPE_TDA10046H) {
                inversion = inversion ? INVERSION_OFF : INVERSION_ON;
        }

        // set inversion
        switch (inversion) {
        case INVERSION_OFF:
                tda1004x_write_mask(i2c, tda_state, TDA1004X_CONFC1, 0x20, 0);
                break;

        case INVERSION_ON:
                tda1004x_write_mask(i2c, tda_state, TDA1004X_CONFC1, 0x20, 0x20);
                break;

        default:
                return -EINVAL;
        }

        // set guard interval
        switch (fe_params->u.ofdm.guard_interval) {
        case GUARD_INTERVAL_1_32:
                tda1004x_write_mask(i2c, tda_state, TDA1004X_AUTO, 2, 0);
                tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 0x0c, 0 << 2);
                break;

        case GUARD_INTERVAL_1_16:
                tda1004x_write_mask(i2c, tda_state, TDA1004X_AUTO, 2, 0);
                tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 0x0c, 1 << 2);
                break;

        case GUARD_INTERVAL_1_8:
                tda1004x_write_mask(i2c, tda_state, TDA1004X_AUTO, 2, 0);
                tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 0x0c, 2 << 2);
                break;

        case GUARD_INTERVAL_1_4:
                tda1004x_write_mask(i2c, tda_state, TDA1004X_AUTO, 2, 0);
                tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 0x0c, 3 << 2);
                break;

        case GUARD_INTERVAL_AUTO:
                tda1004x_write_mask(i2c, tda_state, TDA1004X_AUTO, 2, 2);
                tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 0x0c, 0 << 2);
                break;

        default:
                return -EINVAL;
        }

        // set transmission mode
        switch (fe_params->u.ofdm.transmission_mode) {
        case TRANSMISSION_MODE_2K:
                tda1004x_write_mask(i2c, tda_state, TDA1004X_AUTO, 4, 0);
                tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 0x10, 0 << 4);
                break;

        case TRANSMISSION_MODE_8K:
                tda1004x_write_mask(i2c, tda_state, TDA1004X_AUTO, 4, 0);
                tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 0x10, 1 << 4);
                break;

        case TRANSMISSION_MODE_AUTO:
                tda1004x_write_mask(i2c, tda_state, TDA1004X_AUTO, 4, 4);
                tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 0x10, 0);
                break;

        default:
                return -EINVAL;
        }

        // start the lock
        switch(tda_state->fe_type) {
        case FE_TYPE_TDA10045H:
                tda1004x_write_mask(i2c, tda_state, TDA1004X_CONFC4, 8, 8);
                tda1004x_write_mask(i2c, tda_state, TDA1004X_CONFC4, 8, 0);
                dvb_delay(10);
                break;

        case FE_TYPE_TDA10046H:
                tda1004x_write_mask(i2c, tda_state, TDA1004X_AUTO, 0x40, 0x40);
                dvb_delay(10);
                break;
        }

        // done
        return 0;
}


static int tda1004x_get_fe(struct dvb_i2c_bus *i2c, struct tda1004x_state* tda_state, struct dvb_frontend_parameters *fe_params)
{
        dprintk("%s\n", __FUNCTION__);

        // inversion status
        fe_params->inversion = INVERSION_OFF;
        if (tda1004x_read_byte(i2c, tda_state, TDA1004X_CONFC1) & 0x20) {
                fe_params->inversion = INVERSION_ON;
        }

        // need to invert the inversion for TT TDA10046H
        if (tda_state->fe_type == FE_TYPE_TDA10046H) {
                fe_params->inversion = fe_params->inversion ? INVERSION_OFF : INVERSION_ON;
        }

        // bandwidth
        switch(tda_state->fe_type) {
        case FE_TYPE_TDA10045H:
                switch (tda1004x_read_byte(i2c, tda_state, TDA10045H_WREF_LSB)) {
                case 0x14:
                        fe_params->u.ofdm.bandwidth = BANDWIDTH_8_MHZ;
                        break;
                case 0xdb:
                        fe_params->u.ofdm.bandwidth = BANDWIDTH_7_MHZ;
                        break;
                case 0x4f:
                        fe_params->u.ofdm.bandwidth = BANDWIDTH_6_MHZ;
                        break;
                }
                break;

        case FE_TYPE_TDA10046H:
                switch (tda1004x_read_byte(i2c, tda_state, TDA10046H_TIME_WREF1)) {
                case 0x60:
                        fe_params->u.ofdm.bandwidth = BANDWIDTH_8_MHZ;
                        break;
                case 0x6e:
                        fe_params->u.ofdm.bandwidth = BANDWIDTH_7_MHZ;
                        break;
                case 0x80:
                        fe_params->u.ofdm.bandwidth = BANDWIDTH_6_MHZ;
                        break;
                }
                break;
        }

        // FEC
        fe_params->u.ofdm.code_rate_HP =
            tda1004x_decode_fec(tda1004x_read_byte(i2c, tda_state, TDA1004X_OUT_CONF2) & 7);
        fe_params->u.ofdm.code_rate_LP =
            tda1004x_decode_fec((tda1004x_read_byte(i2c, tda_state, TDA1004X_OUT_CONF2) >> 3) & 7);

        // constellation
        switch (tda1004x_read_byte(i2c, tda_state, TDA1004X_OUT_CONF1) & 3) {
        case 0:
                fe_params->u.ofdm.constellation = QPSK;
                break;
        case 1:
                fe_params->u.ofdm.constellation = QAM_16;
                break;
        case 2:
                fe_params->u.ofdm.constellation = QAM_64;
                break;
        }

        // transmission mode
        fe_params->u.ofdm.transmission_mode = TRANSMISSION_MODE_2K;
        if (tda1004x_read_byte(i2c, tda_state, TDA1004X_OUT_CONF1) & 0x10) {
                fe_params->u.ofdm.transmission_mode = TRANSMISSION_MODE_8K;
        }

        // guard interval
        switch ((tda1004x_read_byte(i2c, tda_state, TDA1004X_OUT_CONF1) & 0x0c) >> 2) {
        case 0:
                fe_params->u.ofdm.guard_interval = GUARD_INTERVAL_1_32;
                break;
        case 1:
                fe_params->u.ofdm.guard_interval = GUARD_INTERVAL_1_16;
                break;
        case 2:
                fe_params->u.ofdm.guard_interval = GUARD_INTERVAL_1_8;
                break;
        case 3:
                fe_params->u.ofdm.guard_interval = GUARD_INTERVAL_1_4;
                break;
        }

        // hierarchy
        switch ((tda1004x_read_byte(i2c, tda_state, TDA1004X_OUT_CONF1) & 0x60) >> 5) {
        case 0:
                fe_params->u.ofdm.hierarchy_information = HIERARCHY_NONE;
                break;
        case 1:
                fe_params->u.ofdm.hierarchy_information = HIERARCHY_1;
                break;
        case 2:
                fe_params->u.ofdm.hierarchy_information = HIERARCHY_2;
                break;
        case 3:
                fe_params->u.ofdm.hierarchy_information = HIERARCHY_4;
                break;
        }

        // done
        return 0;
}


static int tda1004x_read_status(struct dvb_i2c_bus *i2c, struct tda1004x_state* tda_state, fe_status_t * fe_status)
{
        int status;
        int cber;
        int vber;

        dprintk("%s\n", __FUNCTION__);

        // read status
        status = tda1004x_read_byte(i2c, tda_state, TDA1004X_STATUS_CD);
        if (status == -1) {
                return -EIO;
        }

        // decode