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📄 atadrv.h

📁 用于EQUATOR处理器上的FAT32文件系统(vxWorks5.5)
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/* ataDrv.h - ATA/IDE (LOCAL and PCMCIA) disk controller header *//* Copyright 1984-1996 Wind River Systems, Inc. *//*modification history--------------------01f,30oct97,db   added macro ATA_SWAP for big endian targets. changed some                  elements in ATA_CTRL from short to UINT32.01e,10dec97,ms   added usrAtaConfig prototype and ataResources import01e,01nov96,hdn  added support for PCMCIA01d,25sep96,hdn  added support for ATA-201c,18mar96,hdn  added ataShowInit().01b,01mar96,hdn  cleaned up.01a,02mar95,hdn  written based on ideDrv.h.*/#ifndef __INCpcataDrvh#define __INCpcataDrvh#ifdef __cplusplusextern "C" {#endif#ifndef _ASMLANGUAGE#include "dosFsLib.h"#include "blkIo.h"#include "wdLib.h"#include "private/semLibP.h"#include "drv/pcmcia/pccardLib.h"IMPORT ATA_RESOURCE ataResources[];/* define swap macro for little/big endian machines */#if _BYTE_ORDER == _BIG_ENDIAN#   define ATA_SWAP(x) LONGSWAP(x)#else#   define ATA_SWAP(x) (x)#endif#define IDE_LOCAL		0 	/* ctrl type: LOCAL(IDE) */#define ATA_PCMCIA		1	/* ctrl type: PCMCIA */#define ATA_MAX_CTRLS		2	/* max number of ATA controller */#define ATA_MAX_DRIVES		2	/* max number of ATA drives */typedef struct ataParams     {    short config;		/* general configuration */    short cylinders;		/* number of cylinders */    short removcyl;		/* number of removable cylinders */    short heads;		/* number of heads */    short bytesTrack;		/* number of unformatted bytes/track */    short bytesSec;		/* number of unformatted bytes/sector */    short sectors;		/* number of sectors/track */    short bytesGap;		/* minimum bytes in intersector gap */    short bytesSync;		/* minimum bytes in sync field */    short vendstat;		/* number of words of vendor status */    char serial[20];		/* controller serial number */    short type;			/* controller type */    short size;			/* sector buffer size, in sectors */    short bytesEcc;		/* ecc bytes appended */    char rev[8];		/* firmware revision */    char model[40];		/* model name */    short multiSecs;		/* RW multiple support. bits 7-0 ia max secs */    short reserved48;		/* reserved */    short capabilities;		/* capabilities */    short reserved50;		/* reserved */    short pioMode;		/* PIO data transfer cycle timing mode */    short dmaMode;		/* single word DMA data transfer cycle timing */    short valid;		/* field validity */    short currentCylinders;	/* number of current logical cylinders */    short currentHeads;		/* number of current logical heads */    short currentSectors;	/* number of current logical sectors / track */    short capacity0;		/* current capacity in sectors */    short capacity1;		/* current capacity in sectors */    short multiSet;		/* multiple sector setting */    short sectors0;		/* total number of user addressable sectors */    short sectors1;		/* total number of user addressable sectors */    short singleDma;		/* obsolete */    short multiDma;		    /* multi word DMA transfer */    short advancedPio;		/* flow control PIO transfer modes supported */    short cycletimeDma;		/* minimum multiword DMA transfer cycle time */    short cycletimeMulti;	/* recommended multiword DMA cycle time */    short cycletimePioNoIordy;	/* min PIO transfer cycle time wo flow ctl */    short cycletimePioIordy;	/* min PIO transfer cycle time w IORDY */    short reserved69;		/* reserved */    short reserved70;		/* reserved */    short reserved71[17];   /* reserved */    short ultraDma;         /* ultra DMA transfer */    short word89;	        /* reserved */	short word90;    short word91;	short word92;	short word93;    short reserved[35];    short vendor[32];		/* vendor specific */    short reserved160[96];	/* reserved */    } ATA_PARAM;typedef struct ataDrive    {    ATA_PARAM	param;		/* geometry parameter */    short	okMulti;	/* MULTI: TRUE if supported */    short	okIordy;	/* IORDY: TRUE if supported */    short	okDma;		/* DMA:   TRUE if supported */    short	okLba;		/* LBA:   TRUE if supported */    short	multiSecs;	/* supported max sectors for multiple RW */    short	pioMode;	/* supported max PIO mode */    short	ultraDmaMode;	/* supported ultra word DMA mode */    short	multiDmaMode;	/* supported max multi word DMA mode */    short	rwMode;		/* RW mode: PIO[0,1,2,3,4] or DMA[0,1,2] */    short	rwBits;		/* RW bits: 16 or 32 */    short	rwPio;		/* RW PIO unit: single or multi sector */    short	rwDma;		/* RW DMA unit: single or multi word */    } ATA_DRIVE;typedef struct ataCtrl    {    ATA_DRIVE	drive[ATA_MAX_DRIVES];	/* drives per controller */    SEMAPHORE	syncSem;	/* binary sem for syncronization */    SEMAPHORE	muteSem;	/* mutex  sem for mutual-exclusion */    WDOG_ID	wdgId;		/* watch dog */    BOOL	wdgOkay;	/* watch dog status */    int		semTimeout;	/* timeout seconds for sync semaphore */    int		wdgTimeout;	/* timeout seconds for watch dog */    int		ctrlType;	/* type of controller */    BOOL	installed;	/* TRUE if a driver is installed */    BOOL	changed;	/* TRUE if a card is installed */    int		intLevel;	/* interrupt level */    int		intCount;	/* interrupt count */    int		intStatus;	/* interrupt status */    int		drives;		/* number of drives in the controller */    UINT32	data;		/* (RW) data register (16 bits)	*/    UINT32	error;		/* (R)  error register		*/    UINT32	feature;	/* (W)  feature or write-precompensation */    UINT32	seccnt;		/* (RW) sector count		*/    UINT32	sector;		/* (RW) first sector number	*/    UINT32	cylLo;		/* (RW) cylinder low byte	*/    UINT32	cylHi;		/* (RW) cylinder high byte	*/    UINT32	sdh;		/* (RW) sector size/drive/head	*/    UINT32	command;	/* (W)  command register	*/    UINT32	status;		/* (R)  immediate status	*/    UINT32	aStatus;	/* (R)  alternate status	*/    UINT32	dControl;	/* (W)  disk controller control	*/    UINT32	dAddress;	/* (R)  disk controller address */    } ATA_CTRL;typedef struct ataDev    {    BLK_DEV blkDev;		/* must be here */    int ctrl;			/* ctrl no.  0 - 1 */    int drive;			/* drive no. 0 - 1 */    int blkOffset;		/* sector offset */    } ATA_DEV;typedef struct ataType    {    int cylinders;		/* number of cylinders */    int heads;			/* number of heads */    int sectors;		/* number of sectors per track */    int bytes;			/* number of bytes per sector */    int precomp;		/* precompensation cylinder */    } ATA_TYPE;typedef struct ataRaw    {				/* this is for ATARAWACCESS ioctl */    UINT cylinder;		/* cylinder (0 -> (cylindres-1)) */    UINT head;			/* head (0 -> (heads-1)) */    UINT sector;		/* sector (1 -> sectorsTrack) */    char *pBuf;			/* pointer to buffer (bytesSector * nSecs) */    UINT nSecs;			/* number of sectors (1 -> sectorsTrack) */    UINT direction;		/* read=0, write=1 */    } ATA_RAW;#define ATA_SEM_TIMEOUT_DEF	1       /* default timeout for ATA sync sem */#define ATA_WDG_TIMEOUT_DEF	1       /* default timeout for ATA watch dog *//* ATA registers */#define	ATA_DATA(base0)		(base0 + 0) /* (RW) data register (16 bits) */#define ATA_ERROR(base0)	(base0 + 1) /* (R)  error register	    */#define	ATA_FEATURE(base0)	(base0 + 1) /* (W)  feature/precompensation */#define	ATA_SECCNT(base0)	(base0 + 2) /* (RW) sector count	    */

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