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📄 gdbint.texinfo

📁 这个是LINUX下的GDB调度工具的源码
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@cindex @code{longjmp} debugging@value{GDBN} has support for figuring out that the target is doing a@code{longjmp} and for stopping at the target of the jump, if we arestepping.  This is done with a few specialized internal breakpoints,which are visible in the output of the @samp{maint info breakpoint}command.@findex GET_LONGJMP_TARGETTo make this work, you need to define a macro called@code{GET_LONGJMP_TARGET}, which will examine the @code{jmp_buf}structure and extract the longjmp target address.  Since @code{jmp_buf}is target specific, you will need to define it in the appropriate@file{tm-@var{target}.h} file.  Look in @file{tm-sun4os4.h} and@file{sparc-tdep.c} for examples of how to do this.@section Watchpoints@cindex watchpointsWatchpoints are a special kind of breakpoints (@pxref{Algorithms,breakpoints}) which break when data is accessed rather than when someinstruction is executed.  When you have data which changes withoutyour knowing what code does that, watchpoints are the silver bullet tohunt down and kill such bugs.@cindex hardware watchpoints@cindex software watchpointsWatchpoints can be either hardware-assisted or not; the latter type isknown as ``software watchpoints.''  @value{GDBN} always useshardware-assisted watchpoints if they are available, and falls back onsoftware watchpoints otherwise.  Typical situations where @value{GDBN}will use software watchpoints are:@itemize @bullet@itemThe watched memory region is too large for the underlying hardwarewatchpoint support.  For example, each x86 debug register can watch upto 4 bytes of memory, so trying to watch data structures whose size ismore than 16 bytes will cause @value{GDBN} to use softwarewatchpoints.@itemThe value of the expression to be watched depends on data held inregisters (as opposed to memory).@itemToo many different watchpoints requested.  (On some architectures,this situation is impossible to detect until the debugged program isresumed.)  Note that x86 debug registers are used both for hardwarebreakpoints and for watchpoints, so setting too many hardwarebreakpoints might cause watchpoint insertion to fail.@itemNo hardware-assisted watchpoints provided by the targetimplementation.@end itemizeSoftware watchpoints are very slow, since @value{GDBN} needs tosingle-step the program being debugged and test the value of thewatched expression(s) after each instruction.  The rest of thissection is mostly irrelevant for software watchpoints.@value{GDBN} uses several macros and primitives to support hardwarewatchpoints:@table @code@findex TARGET_HAS_HARDWARE_WATCHPOINTS@item TARGET_HAS_HARDWARE_WATCHPOINTSIf defined, the target supports hardware watchpoints.@findex TARGET_CAN_USE_HARDWARE_WATCHPOINT@item TARGET_CAN_USE_HARDWARE_WATCHPOINT (@var{type}, @var{count}, @var{other})Return the number of hardware watchpoints of type @var{type} that arepossible to be set.  The value is positive if @var{count} watchpointsof this type can be set, zero if setting watchpoints of this type isnot supported, and negative if @var{count} is more than the maximumnumber of watchpoints of type @var{type} that can be set.  @var{other}is non-zero if other types of watchpoints are currently enabled (thereare architectures which cannot set watchpoints of different types atthe same time).@findex TARGET_REGION_OK_FOR_HW_WATCHPOINT@item TARGET_REGION_OK_FOR_HW_WATCHPOINT (@var{addr}, @var{len})Return non-zero if hardware watchpoints can be used to watch a regionwhose address is @var{addr} and whose length in bytes is @var{len}.@findex TARGET_REGION_SIZE_OK_FOR_HW_WATCHPOINT@item TARGET_REGION_SIZE_OK_FOR_HW_WATCHPOINT (@var{size})Return non-zero if hardware watchpoints can be used to watch a regionwhose size is @var{size}.  @value{GDBN} only uses this macro as afall-back, in case @code{TARGET_REGION_OK_FOR_HW_WATCHPOINT} is notdefined.@findex TARGET_DISABLE_HW_WATCHPOINTS@item TARGET_DISABLE_HW_WATCHPOINTS (@var{pid})Disables watchpoints in the process identified by @var{pid}.  This isused, e.g., on HP-UX which provides operations to disable and enablethe page-level memory protection that implements hardware watchpointson that platform.@findex TARGET_ENABLE_HW_WATCHPOINTS@item TARGET_ENABLE_HW_WATCHPOINTS (@var{pid})Enables watchpoints in the process identified by @var{pid}.  This isused, e.g., on HP-UX which provides operations to disable and enablethe page-level memory protection that implements hardware watchpointson that platform.@findex target_insert_watchpoint@findex target_remove_watchpoint@item target_insert_watchpoint (@var{addr}, @var{len}, @var{type})@itemx target_remove_watchpoint (@var{addr}, @var{len}, @var{type})Insert or remove a hardware watchpoint starting at @var{addr}, for@var{len} bytes.  @var{type} is the watchpoint type, one of thepossible values of the enumerated data type @code{target_hw_bp_type},defined by @file{breakpoint.h} as follows:@smallexample enum target_hw_bp_type   @{     hw_write   = 0, /* Common (write) HW watchpoint */     hw_read    = 1, /* Read    HW watchpoint */     hw_access  = 2, /* Access (read or write) HW watchpoint */     hw_execute = 3  /* Execute HW breakpoint */   @};@end smallexample@noindentThese two macros should return 0 for success, non-zero for failure.@cindex insert or remove hardware breakpoint@findex target_remove_hw_breakpoint@findex target_insert_hw_breakpoint@item target_remove_hw_breakpoint (@var{addr}, @var{shadow})@itemx target_insert_hw_breakpoint (@var{addr}, @var{shadow})Insert or remove a hardware-assisted breakpoint at address @var{addr}.Returns zero for success, non-zero for failure.  @var{shadow} is thereal contents of the byte where the breakpoint has been inserted; itis generally not valid when hardware breakpoints are used, but sinceno other code touches these values, the implementations of the abovetwo macros can use them for their internal purposes.@findex target_stopped_data_address@item target_stopped_data_address (@var{addr_p})If the inferior has some watchpoint that triggered, place the addressassociated with the watchpoint at the location pointed to by@var{addr_p} and return non-zero.  Otherwise, return zero.@findex HAVE_STEPPABLE_WATCHPOINT@item HAVE_STEPPABLE_WATCHPOINTIf defined to a non-zero value, it is not necessary to disable awatchpoint to step over it.@findex HAVE_NONSTEPPABLE_WATCHPOINT@item HAVE_NONSTEPPABLE_WATCHPOINTIf defined to a non-zero value, @value{GDBN} should disable awatchpoint to step the inferior over it.@findex HAVE_CONTINUABLE_WATCHPOINT@item HAVE_CONTINUABLE_WATCHPOINTIf defined to a non-zero value, it is possible to continue theinferior after a watchpoint has been hit.@findex CANNOT_STEP_HW_WATCHPOINTS@item CANNOT_STEP_HW_WATCHPOINTSIf this is defined to a non-zero value, @value{GDBN} will remove allwatchpoints before stepping the inferior.@findex STOPPED_BY_WATCHPOINT@item STOPPED_BY_WATCHPOINT (@var{wait_status})Return non-zero if stopped by a watchpoint.  @var{wait_status} is ofthe type @code{struct target_waitstatus}, defined by @file{target.h}.@end table@subsection x86 Watchpoints@cindex x86 debug registers@cindex watchpoints, on x86The 32-bit Intel x86 (a.k.a.@: ia32) processors feature special debugregisters designed to facilitate debugging.  @value{GDBN} provides ageneric library of functions that x86-based ports can use to implementsupport for watchpoints and hardware-assisted breakpoints.  Thissubsection documents the x86 watchpoint facilities in @value{GDBN}.To use the generic x86 watchpoint support, a port should do thefollowing:@itemize @bullet@findex I386_USE_GENERIC_WATCHPOINTS@itemDefine the macro @code{I386_USE_GENERIC_WATCHPOINTS} somewhere in thetarget-dependent headers.@itemInclude the @file{config/i386/nm-i386.h} header file @emph{after}defining @code{I386_USE_GENERIC_WATCHPOINTS}.@itemAdd @file{i386-nat.o} to the value of the Make variable@code{NATDEPFILES} (@pxref{Native Debugging, NATDEPFILES}) or@code{TDEPFILES} (@pxref{Target Architecture Definition, TDEPFILES}).@itemProvide implementations for the @code{I386_DR_LOW_*} macros describedbelow.  Typically, each macro should call a target-specific functionwhich does the real work.@end itemizeThe x86 watchpoint support works by maintaining mirror images of thedebug registers.  Values are copied between the mirror images and thereal debug registers via a set of macros which each target needs toprovide:@table @code@findex I386_DR_LOW_SET_CONTROL@item I386_DR_LOW_SET_CONTROL (@var{val})Set the Debug Control (DR7) register to the value @var{val}.@findex I386_DR_LOW_SET_ADDR@item I386_DR_LOW_SET_ADDR (@var{idx}, @var{addr})Put the address @var{addr} into the debug register number @var{idx}.@findex I386_DR_LOW_RESET_ADDR@item I386_DR_LOW_RESET_ADDR (@var{idx})Reset (i.e.@: zero out) the address stored in the debug registernumber @var{idx}.@findex I386_DR_LOW_GET_STATUS@item I386_DR_LOW_GET_STATUSReturn the value of the Debug Status (DR6) register.  This value isused immediately after it is returned by@code{I386_DR_LOW_GET_STATUS}, so as to support per-thread statusregister values.@end tableFor each one of the 4 debug registers (whose indices are from 0 to 3)that store addresses, a reference count is maintained by @value{GDBN},to allow sharing of debug registers by several watchpoints.  Thisallows users to define several watchpoints that watch the sameexpression, but with different conditions and/or commands, withoutwasting debug registers which are in short supply.  @value{GDBN}maintains the reference counts internally, targets don't have to doanything to use this feature.The x86 debug registers can each watch a region that is 1, 2, or 4bytes long.  The ia32 architecture requires that each watched regionbe appropriately aligned: 2-byte region on 2-byte boundary, 4-byteregion on 4-byte boundary.  However, the x86 watchpoint support in@value{GDBN} can watch unaligned regions and regions larger than 4bytes (up to 16 bytes) by allocating several debug registers to watcha single region.  This allocation of several registers per a watchedregion is also done automatically without target code intervention.The generic x86 watchpoint support provides the following API for the@value{GDBN}'s application code:@table @code@findex i386_region_ok_for_watchpoint@item i386_region_ok_for_watchpoint (@var{addr}, @var{len})The macro @code{TARGET_REGION_OK_FOR_HW_WATCHPOINT} is set to callthis function.  It counts the number of debug registers required towatch a given region, and returns a non-zero value if that number isless than 4, the number of debug registers available to x86processors.@findex i386_stopped_data_address@item i386_stopped_data_address (@var{addr_p})The target function@code{target_stopped_data_address} is set to call this function.Thisfunction examines the breakpoint condition bits in the DR6 DebugStatus register, as returned by the @code{I386_DR_LOW_GET_STATUS}macro, and returns the address associated with the first bit that isset in DR6.@findex i386_stopped_by_watchpoint@item i386_stopped_by_watchpoint (void)The macro @code{STOPPED_BY_WATCHPOINT}is set to call this function.  Theargument passed to @code{STOPPED_BY_WATCHPOINT} is ignored.  Thisfunction examines the breakpoint condition bits in the DR6 DebugStatus register, as returned by the @code{I386_DR_LOW_GET_STATUS}macro, and returns true if any bit is set.  Otherwise, false isreturned.@findex i386_insert_watchpoint@findex i386_remove_watchpoint@item i386_insert_watchpoint (@var{addr}, @var{len}, @var{type})@itemx i386_remove_watchpoint (@var{addr}, @var{len}, @var{type})Insert or remove a watchpoint.  The macros@code{target_insert_watchpoint} and @code{target_remove_watchpoint}are set to call these functions.  @code{i386_insert_watchpoint} firstlooks for a debug register which is already set to watch the sameregion for the same access types; if found, it just increments thereference count of that debug register, thus implementing debugregister sharing between watchpoints.  If no such register is found,the function looks for a vacant debug register, sets its mirroredvalue to @var{addr}, sets the mirrored value of DR7 Debug Controlregister as appropriate for the @var{len} and @var{type} parameters,and then passes the new values of the debug register and DR7 to theinferior by calling @code{I386_DR_LOW_SET_ADDR} and@code{I386_DR_LOW_SET_CONTROL}.  If more than one debug register isrequired to cover the given region, the above process is repeated foreach debug register.@code{i386_remove_watchpoint} does the opposite: it resets the addressin the mirrored value of the debug register and its read/write andlength bits in the mirrored value of DR7, then passes these newvalues to the inferior via @code{I386_DR_LOW_RESET_ADDR} and@code{I386_DR_LOW_SET_CONTROL}.  If a register is shared by severalwatchpoints, each time a @code{i386_remove_watchpoint} is called, itdecrements the reference count, and only calls@code{I386_DR_LOW_RESET_ADDR} and @code{I386_DR_LOW_SET_CONTROL} whenthe count goes to zero.@findex i386_insert_hw_breakpoint@findex i386_remove_hw_breakpoint@item i386_insert_hw_breakpoint (@var{addr}, @var{shadow}@itemx i386_remove_hw_breakpoint (@var{addr}, @var{shadow})These functions insert and remove hardware-assisted breakpoints.  Themacros @code{target_insert_hw_breakpoint} and@code{target_remove_hw_breakpoint} are set to call these functions.These functions work like @code{i386_insert_watchpoint} and@code{i386_remove_watchpoint}, respectively, except that they set upthe debug registers to watch instruction execution, and eachhardware-assisted breakpoint always requires exactly one debugregister.@findex i386_stopped_by_hwbp@item i386_stopped_by_hwbp (void)This function returns non-zero if the inferior has some watchpoint orhardware breakpoint that triggered.  It works like@code{i386_stopped_data_address}, except that it doesn't record theaddress whose watchpoint triggered.@findex i386_cleanup_dregs@item i386_cleanup_dregs (void)This function clears all the reference counts, addresses, and control

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