makefile.in

这个是LINUX下的GDB调度工具的源码

#
#   This file is part of the program psim.
#
#   Copyright 1994, 1995, 1996, 1997, 2003 Andrew Cagney
#
#   This program is free software; you can redistribute it and/or modify
#   it under the terms of the GNU General Public License as published by
#   the Free Software Foundation; either version 2 of the License, or
#   (at your option) any later version.
#
#   This program is distributed in the hope that it will be useful,
#   but WITHOUT ANY WARRANTY; without even the implied warranty of
#   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
#   GNU General Public License for more details.
#
#   You should have received a copy of the GNU General Public License
#   along with this program; if not, write to the Free Software
#   Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
#

default: all

VPATH = @srcdir@
srcdir = @srcdir@
srcroot = $(srcdir)/../..

prefix = @prefix@
exec_prefix = @exec_prefix@

host_alias = @host_alias@
target_alias = @target_alias@
program_transform_name = @program_transform_name@
bindir = @bindir@
libdir = @libdir@
tooldir = $(libdir)/$(target_alias)

datadir = @datadir@
mandir = @mandir@
man1dir = $(mandir)/man1
man2dir = $(mandir)/man2
man3dir = $(mandir)/man3
man4dir = $(mandir)/man4
man5dir = $(mandir)/man5
man6dir = $(mandir)/man6
man7dir = $(mandir)/man7
man8dir = $(mandir)/man8
man9dir = $(mandir)/man9
infodir = @infodir@
includedir = @includedir@

# This can be referenced by the gettext configuration code.
top_builddir = ..

EXEEXT = @EXEEXT@
SHELL = /bin/sh

INSTALL = @INSTALL@
INSTALL_PROGRAM = @INSTALL_PROGRAM@
INSTALL_DATA = @INSTALL_DATA@

AR = @AR@
AR_FLAGS = rc
CC = @CC@
CFLAGS = @CFLAGS@
CC_FOR_BUILD = @CC_FOR_BUILD@
BISON = bison
MAKEINFO = makeinfo
RANLIB = @RANLIB@

SIM_CFLAGS = @sim_cflags@
INLINE_CFLAGS = @sim_inline@
BSWAP_CFLAGS = @sim_bswap@
ENDIAN_CFLAGS = @sim_endian@
REGPARM_CFLAGS = @sim_regparm@
STDCALL_CFLAGS = @sim_stdcall@
HOSTENDIAN_CFLAGS = @sim_hostendian@
SMP_CFLAGS = @sim_smp@
XOR_ENDIAN_CFLAGS = @sim_xor_endian@
BITSIZE_CFLAGS = @sim_bitsize@
HOSTBITSIZE_CFLAGS = @sim_hostbitsize@
ENV_CFLAGS = @sim_env@
TIMEBASE_CFLAGS = @sim_timebase@
ALIGNMENT_CFLAGS = @sim_alignment@
FLOAT_CFLAGS = @sim_float@
TRACE_CFLAGS = @sim_trace@
ASSERT_CFLAGS = @sim_assert@
RESERVED_CFLAGS = @sim_reserved@
MONITOR_CFLAGS = @sim_monitor@
MODEL_CFLAGS = @sim_model@ @sim_default_model@ @sim_model_issue@
STDIO_CFLAGS = @sim_stdio@
TERMIO_CFLAGS = @sim_termio@
WARNING_CFLAGS = @sim_warnings@
DEVZERO_CFLAGS = @sim_devzero@
CONFIG_CFLAGS = $(BSWAP_CFLAGS) \
  $(ENDIAN_CFLAGS) \
  $(REGPARM_CFLAGS) \
  $(STDCALL_CFLAGS) \
  $(HOSTENDIAN_CFLAGS) \
  $(SMP_CFLAGS) \
  $(XOR_ENDIAN_CFLAGS) \
  $(BITSIZE_CFLAGS) \
  $(HOSTBITSIZE_CFLAGS) \
  $(ENV_CFLAGS) \
  $(TIMEBASE_CFLAGS) \
  $(ALIGNMENT_CFLAGS) \
  $(FLOAT_CFLAGS) \
  $(TRACE_CFLAGS) \
  $(ASSERT_CFLAGS) \
  $(RESERVED_CFLAGS) \
  $(MONITOR_CFLAGS) \
  $(MODEL_CFLAGS) \
  $(STDIO_CFLAGS) \
  $(TERMIO_CFLAGS) \
  $(DEVZERO_CFLAGS)
SIM_FPU_CFLAGS = @sim_fpu_cflags@

STD_CFLAGS	= $(CFLAGS) $(INLINE_CFLAGS) $(CONFIG_CFLAGS) $(WARNING_CFLAGS) $(SIM_CFLAGS) $(HDEFINES) $(TDEFINES) $(INCLUDES) $(INTL_CFLAGS) $(SIM_FPU_CFLAGS)
NOWARN_CFLAGS	= $(CFLAGS) $(INLINE_CFLAGS) $(CONFIG_CFLAGS) $(SIM_CFLAGS) $(HDEFINES) $(TDEFINES) $(INCLUDES)  $(SIM_FPU_CFLAGS)
BUILD_CFLAGS	= -g -O $(INCLUDES) $(WARNING_CFLAGS)

BUILD_LDFLAGS	=

CONFIG_FILE = @sim_config@
IGEN_OPCODE_RULES = @sim_opcode@
IGEN_DECODE_MECHANISM = @sim_decode_mechanism@
IGEN_DUPLICATE = @sim_dup@
IGEN_JUMP = @sim_jump@
IGEN_FILTER = @sim_filter@
IGEN_ICACHE = @sim_icache@
IGEN_SMP = @sim_igen_smp@
IGEN_LINE_NR = @sim_line_nr@
DGEN_FLAGS = @sim_switch@

HDEFINES = @HDEFINES@
TDEFINES =
IGEN_FLAGS = \
	$(IGEN_DECODE_MECHANISM) \
	$(IGEN_DUPLICATE) \
	$(IGEN_JUMP) \
	$(IGEN_FILTER) \
	$(IGEN_ICACHE) \
	$(IGEN_SMP) \
	$(IGEN_LINE_NR)

.NOEXPORT:
MAKEOVERRIDES=

LIB_INCLUDES	= -I$(srcdir)/../../include
BFD_INCLUDES	= -I../../bfd -I$(srcdir)/../../bfd
GDB_INCLUDES	= -I../../gdb -I$(srcdir)/../../gdb  -I$(srcdir)/../../gdb/config

INCLUDES	= -I. -I$(srcdir) $(LIB_INCLUDES) $(BFD_INCLUDES) $(GDB_INCLUDES)

LIBIBERTY_LIB	= ../../libiberty/libiberty.a
BFD_LIB		= ../../bfd/libbfd.a

INTLLIBS = @INTLLIBS@
INTLDEPS = @INTLDEPS@
INTL_DIR = ../../intl
INTL_SRC = $(srcdir)/$(INTL_DIR)
INTL_CFLAGS = -I$(INTL_DIR) -I$(INTL_SRC)


TARGETLIB	= libsim.a

all:	run $(TARGETLIB) $(GDB_OBJ)

.c.o:
	$(CC) -c $(STD_CFLAGS) $<


# Headers outside sim/ppc.
ANSIDECL_H = $(srcroot)/include/ansidecl.h
BFD_H = ../../bfd/bfd.h
GDB_CALLBACK_H = $(srcroot)/include/gdb/callback.h
GDB_REMOTE_SIM_H = $(srcroot)/include/gdb/remote-sim.h
GDB_SIM_PPC_H = $(srcroot)/include/gdb/sim-ppc.h
COMMON_SIM_BASE_H = $(srcroot)/sim/common/sim-base.h
COMMON_SIM_BASICS_H = $(srcroot)/sim/common/sim-basics.h
COMMON_SIM_FPU_H = $(srcroot)/sim/common/sim-fpu.h
COMMON_SIM_INLINE_H = $(srcroot)/sim/common/sim-inline.h
COMMON_SIM_SIGNAL_H = $(srcroot)/sim/common/sim-signal.h

# Headers in sim/ppc.
ACCONFIG_H = \
	acconfig.h

ALTIVEC_EXPRESSION_H = \
	altivec_expression.h

ALTIVEC_REGISTERS_H = \
	altivec_registers.h

BASICS_H = \
	basics.h \
	$(CONFIG_H) \
	$(PPC_CONFIG_H) \
	$(INLINE_H) \
	$(SIM_CALLBACKS_H) \
	$(DEBUG_H) \
	$(WORDS_H) \
	$(BITS_H) \
	$(SIM_ENDIAN_H)

BITS_H = \
	bits.h \
	bits.c

CAP_H = \
	cap.h \
	$(BASICS_H)

COREFILE_H = \
	corefile.h

COREFILE_N_H = \
	corefile-n.h

CPU_H = \
	cpu.h \
	$(BASICS_H) \
	$(REGISTERS_H) \
	$(DEVICE_H) \
	$(COREFILE_H) \
	$(VM_H) \
	$(EVENTS_H) \
	$(INTERRUPTS_H) \
	$(PSIM_H) \
	$(IDECODE_H) \
	$(ITABLE_H) \
	$(OS_EMUL_H) \
	$(MON_H) \
	$(MODEL_H) \
	cpu.c

DEBUG_H = \
	debug.h \
	$(FILTER_FILENAME_H)

DEVICE_H = \
	device.h

DEVICE_TABLE_H = \
	device_table.h \
	$(BASICS_H) \
	$(DEVICE_H) \
	$(TREE_H) \
	$(HW_H)

E500_EXPRESSION_H = \
	e500_expression.h

E500_REGISTERS_H = \
	e500_registers.h

EMUL_BUGAPI_H = \
	emul_bugapi.h

EMUL_CHIRP_H = \
	emul_chirp.h

EMUL_GENERIC_H = \
	emul_generic.h \
	$(CPU_H) \
	$(IDECODE_H) \
	$(OS_EMUL_H) \
	$(TREE_H) \
	$(BFD_H)

EMUL_NETBSD_H = \
	emul_netbsd.h

EMUL_UNIX_H = \
	emul_unix.h

EVENTS_H = \
	events.h

FILTER_FILENAME_H = \
	filter_filename.h

FILTER_H = \
	filter.h

GEN_ICACHE_H = \
	gen-icache.h

GEN_IDECODE_H = \
	gen-idecode.h

GEN_ITABLE_H = \
	gen-itable.h

GEN_MODEL_H = \
	gen-model.h

GEN_SEMANTICS_H = \
	gen-semantics.h

GEN_SUPPORT_H = \
	gen-support.h

HW_CPU_H = \
	hw_cpu.h

HW_PHB_H = \
	hw_phb.h

IDECODE_BRANCH_H = \
	idecode_branch.h

IDECODE_EXPRESSION_H = \
	idecode_expression.h \
	$(ALTIVEC_EXPRESSION_H) \
	$(E500_EXPRESSION_H)

IDECODE_FIELDS_H = \
	idecode_fields.h

IGEN_H = \
	igen.h

INLINE_H = \
	inline.h

INTERRUPTS_H = \
	interrupts.h

LD_CACHE_H = \
	ld-cache.h

LD_DECODE_H = \
	ld-decode.h

LD_INSN_H = \
	ld-insn.h

LF_H = \
	lf.h

MISC_H = \
	misc.h \
	$(CONFIG_H) \
	$(FILTER_FILENAME_H)

MON_H = \
	mon.h \
	$(BASICS_H) \
	$(ITABLE_H)

OPTIONS_H = \
	options.h

OS_EMUL_H = \
	os_emul.h

PSIM_H = \
	psim.h \
	$(BASICS_H)

REGISTERS_H = \
	registers.h \
	$(E500_REGISTERS_H) \
	$(ALTIVEC_REGISTERS_H) \
	$(SPREG_H)

SIM_CALLBACKS_H = \
	sim_callbacks.h

SIM_ENDIAN_H = \
	sim-endian.h \
	sim-endian.c

SIM_ENDIAN_N_H = \
	sim-endian-n.h

SIM_MAIN_H = \
	sim-main.h \
	$(COMMON_SIM_BASICS_H) \
	$(COMMON_SIM_SIGNAL_H) \
	$(COMMON_SIM_BASE_H)

STD_CONFIG_H = \
	std-config.h

TABLE_H = \
	table.h

TREE_H = \
	tree.h

VM_H = \
	vm.h

VM_N_H = \
	vm_n.h

WORDS_H = \
	words.h


# Generated headers.
CONFIG_H = \
        config.h

DEFINES_H = \
        defines.h

HW_H = \
        hw.h

ICACHE_H = \
        icache.h

IDECODE_H = \
        idecode.h \
        $(IDECODE_EXPRESSION_H) \
        $(IDECODE_FIELDS_H) \
        $(IDECODE_BRANCH_H)

ITABLE_H = \
        itable.h

MODEL_H = \
        model.h

PK_H = \
        pk.h

PPC_CONFIG_H = \
        ppc-config.h

SEMANTICS_H = \
        semantics.h

SPREG_H = \
        spreg.h

SUPPORT_H = \
        support.h \
        support.c

TARG_VALS_H = \
        targ-vals.h

TCONFIG_H = \
        tconfig.h