e500.igen

这个是LINUX下的GDB调度工具的源码

	        ev_check_guard(&d, fg, fx, processor);
	      }
	  }
	}
	return w;
	

#
# A.2.7 Integer SPE Simple Instructions
#

0.4,6.RS,11.RA,16.RB,21.512:X:e500:evaddw %RS,%RA,%RB:Vector Add Word
	unsigned32 w1, w2;
	w1 = *rBh + *rAh;
	w2 = *rB + *rA;
	EV_SET_REG2(*rSh, *rS, w1, w2);
		//printf("evaddw: *rSh = %08x; *rS = %08x; w1 = %08x w2 = %08x\n", *rSh, *rS, w1, w2);
	PPC_INSN_INT(RS_BITMASK, RA_BITMASK | RB_BITMASK, 0);

0.4,6.RS,11.IMM,16.RB,21.514:X:e500:evaddiw %RS,%RB,%IMM:Vector Add Immediate Word
	unsigned32 w1, w2;
	w1 = *rBh + IMM;
	w2 = *rB + IMM;
	EV_SET_REG2(*rSh, *rS, w1, w2);
		//printf("evaddiw: *rSh = %08x; *rS = %08x; w1 = %08x w2 = %08x\n", *rSh, *rS, w1, w2);
	PPC_INSN_INT(RS_BITMASK, RB_BITMASK, 0);

0.4,6.RS,11.RA,16.RB,21.516:X:e500:evsubfw %RS,%RA,%RB:Vector Subtract from Word
	unsigned32 w1, w2;
	w1 = *rBh - *rAh;
	w2 = *rB - *rA;
	EV_SET_REG2(*rSh, *rS, w1, w2);
		//printf("evsubfw: *rSh = %08x; *rS = %08x; w1 = %08x w2 = %08x\n", *rSh, *rS, w1, w2);
	PPC_INSN_INT(RS_BITMASK, RA_BITMASK | RB_BITMASK, 0);

0.4,6.RS,11.IMM,16.RB,21.518:X:e500:evsubifw %RS,%RB,%IMM:Vector Subtract Immediate from Word
	unsigned32 w1, w2;
	w1 = *rBh - IMM;
	w2 = *rB - IMM;
	EV_SET_REG2(*rSh, *rS, w1, w2);
		//printf("evsubifw: *rSh = %08x; *rS = %08x; IMM = %d\n", *rSh, *rS, IMM);
	PPC_INSN_INT(RS_BITMASK, RB_BITMASK, 0);

0.4,6.RS,11.RA,16.0,21.520:X:e500:evabs %RS,%RA:Vector Absolute Value
	signed32 w1, w2;
	w1 = *rAh;
	if (w1 < 0 && w1 != 0x80000000)
	  w1 = -w1;
	w2 = *rA;
	if (w2 < 0 && w2 != 0x80000000)
	  w2 = -w2;
	EV_SET_REG2(*rSh, *rS, w1, w2);
	PPC_INSN_INT(RS_BITMASK, RA_BITMASK, 0);

0.4,6.RS,11.RA,16.0,21.521:X:e500:evneg %RS,%RA:Vector Negate
	signed32 w1, w2;
	w1 = *rAh;
	/* the negative most negative number is the most negative number */
	if (w1 != 0x80000000)
	  w1 = -w1;
	w2 = *rA;
	if (w2 != 0x80000000)
	  w2 = -w2;
	EV_SET_REG2(*rSh, *rS, w1, w2);
	PPC_INSN_INT(RS_BITMASK, RA_BITMASK, 0);

0.4,6.RS,11.RA,16.0,21.522:X:e500:evextsb %RS,%RA:Vector Extend Signed Byte
	unsigned64 w1, w2;
	w1 = *rAh & 0xff;
	if (w1 & 0x80)
	  w1 |= 0xffffff00;
	w2 = *rA & 0xff;
	if (w2 & 0x80)
	  w2 |= 0xffffff00;
	EV_SET_REG2(*rSh, *rS, w1, w2);
	PPC_INSN_INT(RS_BITMASK, RA_BITMASK , 0);

0.4,6.RS,11.RA,16.0,21.523:X:e500:evextsb %RS,%RA:Vector Extend Signed Half Word
	unsigned64 w1, w2;
	w1 = *rAh & 0xffff;
	if (w1 & 0x8000)
	  w1 |= 0xffff0000;
	w2 = *rA & 0xffff;
	if (w2 & 0x8000)
	  w2 |= 0xffff0000;
	EV_SET_REG2(*rSh, *rS, w1, w2);
	PPC_INSN_INT(RS_BITMASK, RA_BITMASK, 0);

0.4,6.RS,11.RA,16.RB,21.529:X:e500:evand %RS,%RA,%RB:Vector AND
	unsigned32 w1, w2;
	w1 = *rBh & *rAh;
	w2 = *rB & *rA;
	EV_SET_REG2(*rSh, *rS, w1, w2);
	PPC_INSN_INT(RS_BITMASK, RA_BITMASK | RB_BITMASK, 0);

0.4,6.RS,11.RA,16.RB,21.535:X:e500:evor %RS,%RA,%RB:Vector OR
	unsigned32 w1, w2;
	w1 = *rBh | *rAh;
	w2 = *rB | *rA;
	EV_SET_REG2(*rSh, *rS, w1, w2);
	PPC_INSN_INT(RS_BITMASK, RA_BITMASK | RB_BITMASK, 0);

0.4,6.RS,11.RA,16.RB,21.534:X:e500:evxor %RS,%RA,%RB:Vector XOR
	unsigned32 w1, w2;
	w1 = *rBh ^ *rAh;
	w2 = *rB ^ *rA;
	EV_SET_REG2(*rSh, *rS, w1, w2);
	PPC_INSN_INT(RS_BITMASK, RA_BITMASK | RB_BITMASK, 0);

0.4,6.RS,11.RA,16.RB,21.542:X:e500:evnand %RS,%RA,%RB:Vector NAND
	unsigned32 w1, w2;
	w1 = ~(*rBh & *rAh);
	w2 = ~(*rB & *rA);
	EV_SET_REG2(*rSh, *rS, w1, w2);
	PPC_INSN_INT(RS_BITMASK, RA_BITMASK | RB_BITMASK, 0);

0.4,6.RS,11.RA,16.RB,21.536:X:e500:evnor %RS,%RA,%RB:Vector NOR
	unsigned32 w1, w2;
	w1 = ~(*rBh | *rAh);
	w2 = ~(*rB | *rA);
	EV_SET_REG2(*rSh, *rS, w1, w2);
	PPC_INSN_INT(RS_BITMASK, RA_BITMASK | RB_BITMASK, 0);

0.4,6.RS,11.RA,16.RB,21.537:X:e500:eveqv %RS,%RA,%RB:Vector Equivalent
	unsigned32 w1, w2;
	w1 = (~*rBh) ^ *rAh;
	w2 = (~*rB) ^ *rA;
	EV_SET_REG2(*rSh, *rS, w1, w2);
	PPC_INSN_INT(RS_BITMASK, RA_BITMASK | RB_BITMASK, 0);

0.4,6.RS,11.RA,16.RB,21.530:X:e500:evandc %RS,%RA,%RB:Vector AND with Compliment
	unsigned32 w1, w2;
	w1 = (~*rBh) & *rAh;
	w2 = (~*rB) & *rA;
	EV_SET_REG2(*rSh, *rS, w1, w2);
		//printf("evandc: *rSh = %08x; *rS = %08x\n", *rSh, *rS);
	PPC_INSN_INT(RS_BITMASK, RA_BITMASK | RB_BITMASK, 0);

0.4,6.RS,11.RA,16.RB,21.539:X:e500:evorc %RS,%RA,%RB:Vector OR with Compliment
	unsigned32 w1, w2;
	w1 = (~*rBh) | *rAh;
	w2 = (~*rB) | *rA;
	EV_SET_REG2(*rSh, *rS, w1, w2);
		//printf("evorc: *rSh = %08x; *rS = %08x\n", *rSh, *rS);
	PPC_INSN_INT(RS_BITMASK, RA_BITMASK | RB_BITMASK, 0);

0.4,6.RS,11.RA,16.RB,21.552:X:e500:evrlw %RS,%RA,%RB:Vector Rotate Left Word
	unsigned32 nh, nl, w1, w2;
	nh = *rBh & 0x1f;
	nl = *rB & 0x1f;
	w1 = ((unsigned32)*rAh) << nh | ((unsigned32)*rAh) >> (32 - nh);
	w2 = ((unsigned32)*rA) << nl | ((unsigned32)*rA) >> (32 - nl);
	EV_SET_REG2(*rSh, *rS, w1, w2);
		//printf("evrlw: nh %d nl %d *rSh = %08x; *rS = %08x\n", nh, nl, *rSh, *rS);
	PPC_INSN_INT(RS_BITMASK, RA_BITMASK | RB_BITMASK, 0);

0.4,6.RS,11.RA,16.UIMM,21.554:X:e500:evrlwi %RS,%RA,%UIMM:Vector Rotate Left Word Immediate
	unsigned32 w1, w2, imm;
	imm = (unsigned32)UIMM;
	w1 = ((unsigned32)*rAh) << imm | ((unsigned32)*rAh) >> (32 - imm);
	w2 = ((unsigned32)*rA) << imm | ((unsigned32)*rA) >> (32 - imm);
	EV_SET_REG2(*rSh, *rS, w1, w2);
	PPC_INSN_INT(RS_BITMASK, RA_BITMASK, 0);

0.4,6.RS,11.RA,16.RB,21.548:X:e500:evslw %RS,%RA,%RB:Vector Shift Left Word
	unsigned32 nh, nl, w1, w2;
	nh = *rBh & 0x1f;
	nl = *rB & 0x1f;
	w1 = ((unsigned32)*rAh) << nh;
	w2 = ((unsigned32)*rA) << nl;
	EV_SET_REG2(*rSh, *rS, w1, w2);
	PPC_INSN_INT(RS_BITMASK, RA_BITMASK | RB_BITMASK, 0);

0.4,6.RS,11.RA,16.UIMM,21.550:X:e500:evslwi %RS,%RA,%UIMM:Vector Shift Left Word Immediate
	unsigned32 w1, w2, imm = UIMM;
	w1 = ((unsigned32)*rAh) << imm;
	w2 = ((unsigned32)*rA) << imm;
	EV_SET_REG2(*rSh, *rS, w1, w2);
	PPC_INSN_INT(RS_BITMASK, RA_BITMASK, 0);

0.4,6.RS,11.RA,16.RB,21.545:X:e500:evsrws %RS,%RA,%RB:Vector Shift Right Word Signed
	signed32 w1, w2;
	unsigned32 nh, nl;
	nh = *rBh & 0x1f;
	nl = *rB & 0x1f;
	w1 = ((signed32)*rAh) >> nh;
	w2 = ((signed32)*rA) >> nl;
	EV_SET_REG2(*rSh, *rS, w1, w2);
		//printf("evsrws: nh %d nl %d *rSh = %08x; *rS = %08x\n", nh, nl, *rSh, *rS);
	PPC_INSN_INT(RS_BITMASK, RA_BITMASK | RB_BITMASK, 0);

0.4,6.RS,11.RA,16.RB,21.544:X:e500:evsrwu %RS,%RA,%RB:Vector Shift Right Word Unsigned
	unsigned32 w1, w2, nh, nl;
	nh = *rBh & 0x1f;
	nl = *rB & 0x1f;
	w1 = ((unsigned32)*rAh) >> nh;
	w2 = ((unsigned32)*rA) >> nl;
	EV_SET_REG2(*rSh, *rS, w1, w2);
	PPC_INSN_INT(RS_BITMASK, RA_BITMASK | RB_BITMASK, 0);

0.4,6.RS,11.RA,16.UIMM,21.547:X:e500:evsrwis %RS,%RA,%UIMM:Vector Shift Right Word Immediate Signed
	signed32 w1, w2;
	unsigned32 imm = UIMM;
	w1 = ((signed32)*rAh) >> imm;
	w2 = ((signed32)*rA) >> imm;
	EV_SET_REG2(*rSh, *rS, w1, w2);
	PPC_INSN_INT(RS_BITMASK, RA_BITMASK, 0);

0.4,6.RS,11.RA,16.UIMM,21.546:X:e500:evsrwiu %RS,%RA,%UIMM:Vector Shift Right Word Immediate Unsigned
	unsigned32 w1, w2, imm = UIMM;
	w1 = ((unsigned32)*rAh) >> imm;
	w2 = ((unsigned32)*rA) >> imm;
	EV_SET_REG2(*rSh, *rS, w1, w2);
	PPC_INSN_INT(RS_BITMASK, RA_BITMASK, 0);

0.4,6.RS,11.RA,16.0,21.525:X:e500:evcntlzw %RS,%RA:Vector Count Leading Zeros Word
	unsigned32 w1, w2, mask, c1, c2;
	for (c1 = 0, mask = 0x80000000, w1 = *rAh;
	      !(w1 & mask) && mask != 0; mask >>= 1)
	  c1++;
	for (c2 = 0, mask = 0x80000000, w2 = *rA;
	      !(w2 & mask) && mask != 0; mask >>= 1)
	  c2++;
	EV_SET_REG2(*rSh, *rS, c1, c2);
	PPC_INSN_INT(RS_BITMASK, RA_BITMASK, 0);

0.4,6.RS,11.RA,16.0,21.526:X:e500:evcntlsw %RS,%RA:Vector Count Leading Sign Bits Word
	unsigned32 w1, w2, mask, sign_bit, c1, c2;
	for (c1 = 0, mask = 0x80000000, w1 = *rAh, sign_bit = w1 & mask;
	     ((w1 & mask) == sign_bit) && mask != 0;
	     mask >>= 1, sign_bit >>= 1)
	  c1++;
	for (c2 = 0, mask = 0x80000000, w2 = *rA, sign_bit = w2 & mask;
	     ((w2 & mask) == sign_bit) && mask != 0;
	     mask >>= 1, sign_bit >>= 1)
	  c2++;
	EV_SET_REG2(*rSh, *rS, c1, c2);
	PPC_INSN_INT(RS_BITMASK, RA_BITMASK, 0);

0.4,6.RS,11.RA,16.0,21.524:X:e500:evrndw %RS,%RA:Vector Round Word
	unsigned32 w1, w2;
	w1 = ((unsigned32)*rAh + 0x8000) & 0xffff0000;
	w2 = ((unsigned32)*rA + 0x8000) & 0xffff0000;
	EV_SET_REG2(*rSh, *rS, w1, w2);
		//printf("evrndw: *rSh = %08x; *rS = %08x\n", *rSh, *rS);
	PPC_INSN_INT(RS_BITMASK, RA_BITMASK, 0);

0.4,6.RS,11.RA,16.RB,21.556:X:e500:evmergehi %RS,%RA,%RB:Vector Merge Hi
	unsigned32 w1, w2;
	w1 = *rAh;
	w2 = *rBh;
	EV_SET_REG2(*rSh, *rS, w1, w2);
	PPC_INSN_INT(RS_BITMASK, RA_BITMASK | RB_BITMASK, 0);

0.4,6.RS,11.RA,16.RB,21.557:X:e500:evmergelo %RS,%RA,%RB:Vector Merge Low
	unsigned32 w1, w2;
	w1 = *rA;
	w2 = *rB;
	EV_SET_REG2(*rSh, *rS, w1, w2);
	PPC_INSN_INT(RS_BITMASK, RA_BITMASK | RB_BITMASK, 0);

0.4,6.RS,11.RA,16.RB,21.559:X:e500:evmergelohi %RS,%RA,%RB:Vector Merge Low Hi
	unsigned32 w1, w2;
	w1 = *rA;
	w2 = *rBh;
	EV_SET_REG2(*rSh, *rS, w1, w2);
	PPC_INSN_INT(RS_BITMASK, RA_BITMASK | RB_BITMASK, 0);

0.4,6.RS,11.RA,16.RB,21.558:X:e500:evmergehilo %RS,%RA,%RB:Vector Merge Hi Low
	unsigned32 w1, w2;
	w1 = *rAh;
	w2 = *rB;
	EV_SET_REG2(*rSh, *rS, w1, w2);
	PPC_INSN_INT(RS_BITMASK, RA_BITMASK | RB_BITMASK, 0);

0.4,6.RS,11.SIMM,16.0,21.553:X:e500:evsplati %RS,%SIMM:Vector Splat Immediate
	unsigned32 w;
	w = SIMM & 0x1f;
	if (w & 0x10)
	  w |= 0xffffffe0;
	EV_SET_REG2(*rSh, *rS, w, w);
	PPC_INSN_INT(RS_BITMASK, 0, 0);

0.4,6.RS,11.SIMM,16.0,21.555:X:e500:evsplatfi %RS,%SIMM:Vector Splat Fractional Immediate
	unsigned32 w;
	w = SIMM << 27;
	EV_SET_REG2(*rSh, *rS, w, w);
	PPC_INSN_INT(RS_BITMASK, 0, 0);

0.4,6.BF,9.0,11.RA,16.RB,21.561:X:e500:evcmpgts %BF,%RA,%RB:Vector Compare Greater Than Signed
	signed32 ah, al, bh, bl;
	int w, ch, cl;
	ah = *rAh;
	al = *rA;
	bh = *rBh;
	bl = *rB;
	if (ah > bh)
	  ch = 1;
	else
	  ch = 0;
	if (al > bl)
	  cl = 1;
	else
	  cl = 0;
	w = ch << 3 | cl << 2 | (ch | cl) << 1 | (ch & cl);
	CR_SET(BF, w);
	PPC_INSN_INT_CR(0, RA_BITMASK | RB_BITMASK, BF_BITMASK);

0.4,6.BF,9.0,11.RA,16.RB,21.560:X:e500:evcmpgtu %BF,%RA,%RB:Vector Compare Greater Than Unsigned
	unsigned32 ah, al, bh, bl;
	int w, ch, cl;
	ah = *rAh;
	al = *rA;
	bh = *rBh;
	bl = *rB;
	if (ah > bh)
	  ch = 1;
	else
	  ch = 0;
	if (al > bl)
	  cl = 1;
	else
	  cl = 0;
	w = ch << 3 | cl << 2 | (ch | cl) << 1 | (ch & cl);
	CR_SET(BF, w);
	PPC_INSN_INT_CR(0, RA_BITMASK | RB_BITMASK, BF_BITMASK);

0.4,6.BF,9.0,11.RA,16.RB,21.563:X:e500:evcmplts %BF,%RA,%RB:Vector Compare Less Than Signed
	signed32 ah, al, bh, bl;
	int w, ch, cl;
	ah = *rAh;
	al = *rA;
	bh = *rBh;
	bl = *rB;
	if (ah < bh)
	  ch = 1;
	else
	  ch = 0;
	if (al < bl)
	  cl = 1;
	else
	  cl = 0;
	w = ch << 3 | cl << 2 | (ch | cl) << 1 | (ch & cl);
	CR_SET(BF, w);
	PPC_INSN_INT_CR(0, RA_BITMASK | RB_BITMASK, BF_BITMASK);

0.4,6.BF,9.0,11.RA,16.RB,21.562:X:e500:evcmpltu %BF,%RA,%RB:Vector Compare Less Than Unsigned
	unsigned32 ah, al, bh, bl;
	int w, ch, cl;
	ah = *rAh;
	al = *rA;
	bh = *rBh;
	bl = *rB;
	if (ah < bh)
	  ch = 1;
	else
	  ch = 0;
	if (al < bl)
	  cl = 1;
	else
	  cl = 0;
	w = ch << 3 | cl << 2 | (ch | cl) << 1 | (ch & cl);
	CR_SET(BF, w);
	PPC_INSN_INT_CR(0, RA_BITMASK | RB_BITMASK, BF_BITMASK);

0.4,6.BF,9.0,11.RA,16.RB,21.564:X:e500:evcmpeq %BF,%RA,%RB:Vector Compare Equal
	unsigned32 ah, al, bh, bl;
	int w, ch, cl;
	ah = *rAh;
	al = *rA;
	bh = *rBh;
	bl = *rB;
	if (ah == bh)