psim.c

这个是LINUX下的GDB调度工具的源码

    *(gpreg*)cooked_buf = cpu_registers(processor)->gpr[description.index];
    break;

  case reg_spr:
    *(spreg*)cooked_buf = cpu_registers(processor)->spr[description.index];
    break;
    
  case reg_sr:
    *(sreg*)cooked_buf = cpu_registers(processor)->sr[description.index];
    break;

  case reg_fpr:
    *(fpreg*)cooked_buf = cpu_registers(processor)->fpr[description.index];
    break;

  case reg_pc:
    *(unsigned_word*)cooked_buf = cpu_get_program_counter(processor);
    break;

  case reg_cr:
    *(creg*)cooked_buf = cpu_registers(processor)->cr;
    break;

  case reg_msr:
    *(msreg*)cooked_buf = cpu_registers(processor)->msr;
    break;

  case reg_fpscr:
    *(fpscreg*)cooked_buf = cpu_registers(processor)->fpscr;
    break;

  case reg_insns:
    *(unsigned_word*)cooked_buf = mon_get_number_of_insns(system->monitor,
							  which_cpu);
    break;

  case reg_stalls:
    if (cpu_model(processor) == NULL)
      error("$stalls only valid if processor unit model enabled (-I)\n");
    *(unsigned_word*)cooked_buf = model_get_number_of_stalls(cpu_model(processor));
    break;

  case reg_cycles:
    if (cpu_model(processor) == NULL)
      error("$cycles only valid if processor unit model enabled (-I)\n");
    *(unsigned_word*)cooked_buf = model_get_number_of_cycles(cpu_model(processor));
    break;

#ifdef WITH_ALTIVEC
  case reg_vr:
    *(vreg*)cooked_buf = cpu_registers(processor)->altivec.vr[description.index];
    break;

  case reg_vscr:
    *(vscreg*)cooked_buf = cpu_registers(processor)->altivec.vscr;
    break;
#endif

#ifdef WITH_E500
  case reg_gprh:
    *(gpreg*)cooked_buf = cpu_registers(processor)->e500.gprh[description.index];
    break;

  case reg_evr:
    *(unsigned64*)cooked_buf = EVR(description.index);
    break;

  case reg_acc:
    *(accreg*)cooked_buf = cpu_registers(processor)->e500.acc;
    break;
#endif

  default:
    printf_filtered("psim_read_register(processor=0x%lx,buf=0x%lx,reg=%s) %s\n",
		    (unsigned long)processor, (unsigned long)buf, reg,
		    "read of this register unimplemented");
    break;

  }

  /* the PSIM internal values are in host order.  To fetch raw data,
     they need to be converted into target order and then returned */
  if (mode == raw_transfer) {
    /* FIXME - assumes that all registers are simple integers */
    switch (description.size) {
    case 1: 
      *(unsigned_1*)buf = H2T_1(*(unsigned_1*)cooked_buf);
      break;
    case 2:
      *(unsigned_2*)buf = H2T_2(*(unsigned_2*)cooked_buf);
      break;
    case 4:
      *(unsigned_4*)buf = H2T_4(*(unsigned_4*)cooked_buf);
      break;
    case 8:
      *(unsigned_8*)buf = H2T_8(*(unsigned_8*)cooked_buf);
      break;
#ifdef WITH_ALTIVEC
    case 16:
      if (CURRENT_HOST_BYTE_ORDER != CURRENT_TARGET_BYTE_ORDER)
        {
	  union { vreg v; unsigned_8 d[2]; } h, t;
          memcpy(&h.v/*dest*/, cooked_buf/*src*/, description.size);
	  { _SWAP_8(t.d[0] =, h.d[1]); }
	  { _SWAP_8(t.d[1] =, h.d[0]); }
          memcpy(buf/*dest*/, &t/*src*/, description.size);
          break;
        }
      else
        memcpy(buf/*dest*/, cooked_buf/*src*/, description.size);
      break;
#endif
    }
  }
  else {
    memcpy(buf/*dest*/, cooked_buf/*src*/, description.size);
  }

  return description.size;
}



INLINE_PSIM\
(int)
psim_write_register(psim *system,
		    int which_cpu,
		    const void *buf,
		    const char reg[],
		    transfer_mode mode)
{
  cpu *processor;
  register_descriptions description;
  char *cooked_buf;

  /* find our processor */
  if (which_cpu == MAX_NR_PROCESSORS) {
    if (system->last_cpu == system->nr_cpus
	|| system->last_cpu == -1)
      which_cpu = 0;
    else
      which_cpu = system->last_cpu;
  }

  /* find the description of the register */
  description = register_description(reg);
  if (description.type == reg_invalid)
    return 0;
  cooked_buf = alloca (description.size);

  if (which_cpu == -1) {
    int i;
    for (i = 0; i < system->nr_cpus; i++)
      psim_write_register(system, i, buf, reg, mode);
    return description.size;
  }
  ASSERT(which_cpu >= 0 && which_cpu < system->nr_cpus);

  processor = system->processors[which_cpu];

  /* If the data is comming in raw (target order), need to cook it
     into host order before putting it into PSIM's internal structures */
  if (mode == raw_transfer) {
    switch (description.size) {
    case 1: 
      *(unsigned_1*)cooked_buf = T2H_1(*(unsigned_1*)buf);
      break;
    case 2:
      *(unsigned_2*)cooked_buf = T2H_2(*(unsigned_2*)buf);
      break;
    case 4:
      *(unsigned_4*)cooked_buf = T2H_4(*(unsigned_4*)buf);
      break;
    case 8:
      *(unsigned_8*)cooked_buf = T2H_8(*(unsigned_8*)buf);
      break;
#ifdef WITH_ALTIVEC
    case 16:
      if (CURRENT_HOST_BYTE_ORDER != CURRENT_TARGET_BYTE_ORDER)
        {
	  union { vreg v; unsigned_8 d[2]; } h, t;
          memcpy(&t.v/*dest*/, buf/*src*/, description.size);
	  { _SWAP_8(h.d[0] =, t.d[1]); }
	  { _SWAP_8(h.d[1] =, t.d[0]); }
          memcpy(cooked_buf/*dest*/, &h/*src*/, description.size);
          break;
        }
      else
        memcpy(cooked_buf/*dest*/, buf/*src*/, description.size);
#endif
    }
  }
  else {
    memcpy(cooked_buf/*dest*/, buf/*src*/, description.size);
  }

  /* put the cooked value into the register */
  switch (description.type) {

  case reg_gpr:
    cpu_registers(processor)->gpr[description.index] = *(gpreg*)cooked_buf;
    break;

  case reg_fpr:
    cpu_registers(processor)->fpr[description.index] = *(fpreg*)cooked_buf;
    break;

  case reg_pc:
    cpu_set_program_counter(processor, *(unsigned_word*)cooked_buf);
    break;

  case reg_spr:
    cpu_registers(processor)->spr[description.index] = *(spreg*)cooked_buf;
    break;

  case reg_sr:
    cpu_registers(processor)->sr[description.index] = *(sreg*)cooked_buf;
    break;

  case reg_cr:
    cpu_registers(processor)->cr = *(creg*)cooked_buf;
    break;

  case reg_msr:
    cpu_registers(processor)->msr = *(msreg*)cooked_buf;
    break;

  case reg_fpscr:
    cpu_registers(processor)->fpscr = *(fpscreg*)cooked_buf;
    break;

#ifdef WITH_E500
  case reg_gprh:
    cpu_registers(processor)->e500.gprh[description.index] = *(gpreg*)cooked_buf;
    break;

  case reg_evr:
    {
      unsigned64 v;
      v = *(unsigned64*)cooked_buf;
      cpu_registers(processor)->e500.gprh[description.index] = v >> 32;
      cpu_registers(processor)->gpr[description.index] = v;
      break;
    }

  case reg_acc:
    cpu_registers(processor)->e500.acc = *(accreg*)cooked_buf;
    break;
#endif

#ifdef WITH_ALTIVEC
  case reg_vr:
    cpu_registers(processor)->altivec.vr[description.index] = *(vreg*)cooked_buf;
    break;

  case reg_vscr:
    cpu_registers(processor)->altivec.vscr = *(vscreg*)cooked_buf;
    break;
#endif

  default:
    printf_filtered("psim_write_register(processor=0x%lx,cooked_buf=0x%lx,reg=%s) %s\n",
		    (unsigned long)processor, (unsigned long)cooked_buf, reg,
		    "read of this register unimplemented");
    break;

  }

  return description.size;
}



INLINE_PSIM\
(unsigned)
psim_read_memory(psim *system,
		 int which_cpu,
		 void *buffer,
		 unsigned_word vaddr,
		 unsigned nr_bytes)
{
  cpu *processor;
  if (which_cpu == MAX_NR_PROCESSORS) {
    if (system->last_cpu == system->nr_cpus
	|| system->last_cpu == -1)
      which_cpu = 0;
    else
      which_cpu = system->last_cpu;
  }
  processor = system->processors[which_cpu];
  return vm_data_map_read_buffer(cpu_data_map(processor),
				 buffer, vaddr, nr_bytes,
				 NULL, -1);
}


INLINE_PSIM\
(unsigned)
psim_write_memory(psim *system,
		  int which_cpu,
		  const void *buffer,
		  unsigned_word vaddr,
		  unsigned nr_bytes,
		  int violate_read_only_section)
{
  cpu *processor;
  if (which_cpu == MAX_NR_PROCESSORS) {
    if (system->last_cpu == system->nr_cpus
	|| system->last_cpu == -1)
      which_cpu = 0;
    else
      which_cpu = system->last_cpu;
  }
  ASSERT(which_cpu >= 0 && which_cpu < system->nr_cpus);
  processor = system->processors[which_cpu];
  return vm_data_map_write_buffer(cpu_data_map(processor),
				  buffer, vaddr, nr_bytes, 1/*violate-read-only*/,
				  NULL, -1);
}


INLINE_PSIM\
(void)
psim_print_info(psim *system,
		int verbose)
{
  mon_print_info(system, system->monitor, verbose);
}


/* Merge a device tree and a device file. */

INLINE_PSIM\
(void)
psim_merge_device_file(device *root,
		       const char *file_name)
{
  FILE *description;
  int line_nr;
  char device_path[1000];
  device *current;

  /* try opening the file */
  description = fopen(file_name, "r");
  if (description == NULL) {
    perror(file_name);
    error("Invalid file %s specified", file_name);
  }

  line_nr = 0;
  current = root;
  while (fgets(device_path, sizeof(device_path), description)) {
    char *device;
    /* check that the full line was read */
    if (strchr(device_path, '\n') == NULL) {
      fclose(description);
      error("%s:%d: line to long - %s",
	    file_name, line_nr, device_path);
    }
    else
      *strchr(device_path, '\n') = '\0';
    line_nr++;
    /* skip comments ("#" or ";") and blank lines lines */
    for (device = device_path;
	 *device != '\0' && isspace(*device);
	 device++);
    if (device[0] == '#'
	|| device[0] == ';'
	|| device[0] == '\0')
      continue;
    /* merge any appended lines */
    while (device_path[strlen(device_path) - 1] == '\\') {
      int curlen = strlen(device_path) - 1;
      /* zap \ */
      device_path[curlen] = '\0';
      /* append the next line */
      if (!fgets(device_path + curlen, sizeof(device_path) - curlen, description)) {
	fclose(description);
	error("%s:%s: unexpected eof in line continuation - %s",
	      file_name, line_nr, device_path);
      }
      if (strchr(device_path, '\n') == NULL) {
	fclose(description);
	error("%s:%d: line to long - %s",
	    file_name, line_nr, device_path);
      }
      else
	*strchr(device_path, '\n') = '\0';
      line_nr++;
    }
    /* parse this line */
    current = tree_parse(current, "%s", device);
  }
  fclose(description);
}


#endif /* _PSIM_C_ */