📄 changelog.00
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putting the values into local variables. (first_undef, last_undef): New structures to remember names to #undef if -R. (lf_print_c_extraction): If -R and this is semantics, emit names as #defines pointing to the cache structure, rather than loading the values into local variables. (lf_print_c_semantic_function): If -R, #undef all of the names defined in lf_print_c_extraction. (main): Recognize -R. * idecode_fields.h (SPR_*): Redefine spr_* macros as SPR_* to avoid a name confict if -R passed to igen. * ppc-instructions (mfspr, mtspr): Rename spr field to SPR. (model_data): Add field to count the various # of CRs that the mtcrf instruction used. (model_mon_info): Return structures counting the # of CRs that the mtcrf instruction used. (branches, sync instructions): Do not call model functions if WITH_MODEL_ISSUE is 0. * mon.c (stdlib.h): Include if the system supplies one. (mon_sort_instruction_names): New function to sort instruction names alphabetically. (mon_print_info): Call qsort with mon_sort_instruction_names to sort instruction names. Don't abort if WITH_MODEL_ISSUE is 0. * debug.h (ITRACE): Make printf_filtered arguments type correct. * idecode_expression.h (CR0_COMPARE): Ditto. * psim.c (psim_read_register): Ditto. * igen.c (lf_print_my_prefix): Use __attribute__((__unused__)) to silence compiler warnings about unused automatically generated variables. (lf_print_c_extraction): Ditto. * idecode_expression.h (FPSCR_BEGIN): Ditto. * ppc-cache-rules: Define rules for making a bitmask for all registers. * ppc-instructions: Rewrite model specific functions to use the bitmask of the register number, instead of using the register pointer to get the register number, and then making the bitmask.Wed Nov 22 15:24:27 1995 Michael Meissner <meissner@tiktok.cygnus.com> * ppc-instructions (model_branches): Add conditional argument to count the number of times each type of conditional branch is used. (conditional branches): Pass B0 or -1 to model_branches. (model_mon_info): Print out conditional branch counts. (model-data): Add support for printing out conditional branch types.Tue Nov 21 16:31:25 1995 Michael Meissner <meissner@tiktok.cygnus.com> * igen.c (insn_table_load_insns): Add support for model-static for internal functions that should not be inlined. (lf_print_c_semantic): Remove model_cleanup. (gen_model_{c,h}): Ditto. * ppc-instructions: Redo model specific support once again. Add floating point support to the model specific information. Flesh out all of the floating mutiply add/subtract instructions. Add better tracing support to the model specific information.Sun Nov 19 23:00:52 1995 Michael Meissner <meissner@tiktok.cygnus.com> * ppc-instructions (model data, model_busy): Rather than using a bit mask for the busy units, just use a char array. Also, only support 2 function units an insn can use, rather than a loop.Fri Nov 17 14:08:08 1995 Michael Meissner <meissner@tiktok.cygnus.com> * table.c (table_entry_read): Move setting entry->line_nr to after the model specific fields so the line numbers for the annex are correct. * cpu.c (cpu_{create,init,halt}): Check for WITH_MODEL_ISSUE before calling the model functions. * debug.c (trace_descriptor): Add trace_model support. * debug.h (trace_options): Ditto. * igen.c (gen_icache_h): Create type idecode_cache as void if not caching instructions. (gen_model_{c,h}): Drop model_issue support. Add support for model_cleanup. (lf_print_my_prefix): Initialize a const itable_index with the current index. (lf_print_c_semantic): Call model_cleanup at the end of the function to check for instructions that aren't supported yet by the scheduling code. * mon.h (count_type): New type for counters. * mon.c: Use count_type instead of unsigned. * ppc-instructions: Redo scheduling code once again. Make it all inline friendly. Instead of having general code emitted by igen, go the route of having each semantic routine call the appropriate module.Thu Nov 16 09:52:26 1995 Michael Meissner <meissner@tiktok.cygnus.com> * table.c (table_entry_read): Allow the annex to have blank lines. * ppc-instructions: Change lines in model stuff that just have a tab to just newline. Add 601 support. Document most instructions in terms of model specific timing information. Drop 'FUNCTION' from PPC_FUNCTION_UNIT_xxx enums. Change PPC_UNIT_UNKNOWN -> PPC_UNIT_BAD. Add TRACE(trace_tbd) for all data cache instruction.s. Signal illegal instruciton if data cache block invalidate is issued from problem state. * igen.c (max_model_fields_len): New static to keep track of the max size for the model specific fields. (model_c_insn): Use max_model_fields_len to size fields. (insn_table_insert_insn): Set max_model_fields_len. (model_table_insert): Ditto. (gen_model_{c,h}): Model_issue is now called with a processor argument. * debug.c (trace_description): Add support for trace_tbd. * mon.c (mon_issue): Pass processor argument to model_issue. * Makefile.in: Delete all function unit support, since the newer table driven model support replaces it. * cpu.{c,h}: Ditto. * mon.c: Ditto. * inline.{c,h}: Ditto. * std-config.h: Ditto. * options.c: Ditto. * configure{,.in}: Ditto. * Makefile.in: Ditto. * psim.c: Ditto. * function_unit.{c,h}: Delete these now usused files. * std-config.h (WITH_MODEL_ISSUE): Add new macro on whether to trace instructions in a model specific manor. * options.c (print_options): Print it out. * configure{,.in}: Add --enable-sim-model-issue option. * Makefile.in: Add --enable-sim-model-issue flags. * igen.c (lf_print_c_semantic): Add call to mon_issue here. Check for WITH_MODEL_ISSUE. * mon.c (mon_issue): Remove call to mon_issue_here. * ppc-instructions: Move branch tracing to the actual branch instructions, rather than testing it in model_issue. Add code to code successful/unsuccessful branch predictions, and the number of conditional branches that fell through.Wed Nov 15 17:32:13 1995 Michael Meissner <meissner@tiktok.cygnus.com> * cpu.h (cpu_model): Add declaration. * cpu.c (struct _cpu): Add model_ptr to hold model specific information. (cpu_model): Return the model internal pointer. (cpu_{create,init,halt}): Call the appropriate model function. * inline.c (mon.c): Move include of mon.c after model.c. * mon.c (_cpu_mon): Add fields to count unaligned memory references. (mon_issue): Call model_issue, not function_unit_issue. (mon_{read,write}): Count # of unaligned memory accesses. (mon_print_info): Switch to calling model_mon_info and model_mon_info_free instead of function_unit version. Print out number of unaligned reads/writes. * {ppc-instructions,igen.c}: More global changes to add model specific features. * inline.{c,h}: Provide for inlining options.c. * options.{c,h}: Ditto. * std-config.h: Add OPTIONS_INLINE.Tue Nov 14 04:47:25 1995 Michael Meissner <meissner@tiktok.cygnus.com> * Makefile.in (devices.o, main.o): Update dependency. * igen.c (gen_model_h): Use correct variable in loop. (gen_model_c): Use strcmp, strcasecmp. (gen_model_c): Use EXTERN_MODEL for arrays. (gen_model_h): Use STATIC_MODEL for arrays. (lf_print_c_semantic_function_header): Delete unused function. * main.c (cpu.h): Include cpu.h to get model.h. * inline.h ({EXTERN,STATIC}_MODEL): Define.Mon Nov 13 09:14:13 1995 Michael Meissner <meissner@tiktok.cygnus.com> * igen.c ({insn,model}_table_fields): Spell mnemonic correctly. (gen_itable_h,itable_c_insn): Ditto. (model support): Move model support around, add support for model-data, model-internal. Use annex field for model-macros now. * configure.in (--enable-sim-inline): If --enable-sim-inline=no, also define INLINE as nothing. * configure: Regenerate. * std-config.h (INLINE): Rather than nuking INLINE, only define it as __inline__ if any of the INLINE flags are non-zero. * options.c (print_options): Print out WITH_XOR_ENDAIN.Mon Nov 13 23:03:45 1995 Andrew Cagney <cagneyhighland.com.au> * ppc-instructions (rfi): Add missing code. * cpu.c (cpu_get_time_base): Fix calculation of current value of time base register. * ppc-spr-table (TBL, TBU): Fix TBL/TBU entries - was confusing m[tf]tb with m[tf]spr. * ppc-instructions (mtspr, mfspr): Fix mttbl - wasn't storing lower word.Mon Nov 13 21:35:37 1995 Andrew Cagney <cagneyhighland.com.au> * std-config.h (INLINE, STATIC_INLINE): Was being set to static inline.. Only problem being that with ppc-opcode-simple this gave it the chance to inline all the idecode functions with potentially disasterous results on a 16mb PC. For moment hobble INLINE. * configure.in, std-config.h (WITH_SMP): Make that 5 processors by default ... * configure.in: Tweek flags passed to gcc for --with-sim-warnings. Firstly make them errors and secondly remove the options gcc-245 doesn't reconize.Mon Nov 13 17:57:24 1995 Andrew Cagney <cagney@highland.com.au> * misc.c (zalloc), cpu.c (cpu_init), devices (console_io_read_buffer_callback, icu_io_read_buffer_callback, vm_io_read_buffer_callback), main.c (zalloc), mon.c (memset), sim_calls.c (zalloc) : replace bzero() with memset(). * emul_netbsd.c (write_direntries), psim.c (psim_read_register, psim_write_register): replace bcopy() with memcpy(). Sun Nov 12 20:55:41 1995 Andrew Cagney <cagneyhighland.com.au> * configure.in: for --disable-sim-inline (--enable-sim-inline=no), force DEFAULT_INLINE to 0 rather then trusting the std configuration.Sun Nov 12 20:55:41 1995 Andrew Cagney <cagneyhighland.com.au> * igen.c (lf_print_idecode_table, idecode_table_leaf): Fix generation of switch entries in tables - treat the same as cracking/semantic functions. * igen.c (idecode_switch_end, idecode_switch_leaf): Fix generation of a boolean switch statement (field zero or non-zero). * ppc-opcode-test-1, ppc-opcode-test-2: New files. These test the switch/table generation ability of igen. * igen.c (idecode_switch_leaf): Fix code output when a switch statement needs to look up a table. * igen.c (idecode_declare_if_switch): New function called from gen_idecode_c - need to declare any idecode switch functions before they are used in idecode tables. * igen.c (lf_print_c_cracker_function, idecode_crack_leaf, idecode_crack_insn): Add is_inline_function argument to code printing cracker functions which indicates if STATIC_IDECODE or STATIC_INLINE_IDECODE should be used for definition. For idecode_crack_insn (which implies not duplicating/expanding) don't declare function as inline - we assume that the only time this is code is generated is when things are being tested. For idecode_crack_leaf, make static (instead of INLINE) if the instructions parent is a table as function will always be called via a table. * igen.c (idecode_expand_if_switch): Declare as STATIC_IDECODE not STATIC_INLINE_IDECODE. Only the outermost idecode switch will be called directly, all others are called via a table. * igen.c (lf_print_semantic_function_header, semantics_h_leaf, semantics_h_insn, semantics_h_function, lf_print_c_semantic_function, semantics_c_function): Add is_inline_function argument to lf_print_semantic_function_header to indicate if an inline or static function declaration/definition should be output. Depending on situtation call accordingly: functions (not instruction semantic routines) are always inline; Semantic routines are made inline when there is no icache (cache will contain the function address) and are duplicating (see above) and the parent of the instruction is a switch statement. * igen.c (opcode_field_new): Delete. Code changed to use ZALLOC and moved to insn_table_find_opcode_field. * table.c (table_open): Fix typo (nr_model_fields vs nr_fields). * igen.c (model_c_insn): Suggestion - document the name of the instruction on each line of the instruction model table.Fri Nov 10 00:44:38 1995 Andrew Cagney <cagneyhighland.com.au> * emul_netbsd.c (do_ioctl): Cleanup compilation. * sim_callbacks.h (__attribute__): Only define if not defined (was already defined on NetBSD host).Wed Nov 8 21:49:52 1995 Andrew Cagney <cagneyhighland.com.au> * std-config.h (WITH_XOR_ENDIAN), configure.in, Makefile.in: New macro, indicates if the PowerPC's horrible XOR endian mode should be suported. Add to configure and make. * vm_n.h (vm_data_map_read_N, vm_data_map_write_N), vm.c (vm_instruction_map_read): If XOR endian, xor the address with a value from an xor table (indexed by size of access). * vm.c (vm_synchronize_context), cpu.c (cpu_synchronize_context): set up xor table to xor if there is a conflict between the CURRENT_TARGET_ENDIAN and the endian indicated in the MSR. Move check of suported change of endian mode from cpu.c to vm.c. * vm.c (vm_data_map_write_buffer, vm_data_map_read_buffer): Hopefully added correct hack to handle XOR endian mode. FIXME: If NONSTRICT alignment and XOR ENDIAN and MSR indicates little endian mode, the model accepts miss aligned transfers. FIXME: Need to create an `init' device that, during initializatioin for XOR mode, it mushes (XOR address) all the dma data before passing it on to the core for storage. Just like the real thing really.Wed Nov 8 21:49:52 1995 Andrew Cagney <cagneyhighland.com.au> * devices.c (halt_io_write_buffer_callback): Use value written to halt device to determine exit status. Thus allowing success/failure of OEA tests.Wed Nov 8 00:10:38 1995 Andrew Cagney <cagneyhighland.com.au> * ppc-instructions (icbi): If icache present flush it.
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