📄 decode.c
字号:
case 172 : itype = M32RBF_INSN_LD_D; goto extract_sfmt_ld_d; case 176 : itype = M32RBF_INSN_BEQ; goto extract_sfmt_beq; case 177 : itype = M32RBF_INSN_BNE; goto extract_sfmt_beq; case 184 : itype = M32RBF_INSN_BEQZ; goto extract_sfmt_beqz; case 185 : itype = M32RBF_INSN_BNEZ; goto extract_sfmt_beqz; case 186 : itype = M32RBF_INSN_BLTZ; goto extract_sfmt_beqz; case 187 : itype = M32RBF_INSN_BGEZ; goto extract_sfmt_beqz; case 188 : itype = M32RBF_INSN_BLEZ; goto extract_sfmt_beqz; case 189 : itype = M32RBF_INSN_BGTZ; goto extract_sfmt_beqz; case 220 : itype = M32RBF_INSN_SETH; goto extract_sfmt_seth; case 224 : /* fall through */ case 225 : /* fall through */ case 226 : /* fall through */ case 227 : /* fall through */ case 228 : /* fall through */ case 229 : /* fall through */ case 230 : /* fall through */ case 231 : /* fall through */ case 232 : /* fall through */ case 233 : /* fall through */ case 234 : /* fall through */ case 235 : /* fall through */ case 236 : /* fall through */ case 237 : /* fall through */ case 238 : /* fall through */ case 239 : itype = M32RBF_INSN_LD24; goto extract_sfmt_ld24; case 240 : /* fall through */ case 241 : /* fall through */ case 242 : /* fall through */ case 243 : /* fall through */ case 244 : /* fall through */ case 245 : /* fall through */ case 246 : /* fall through */ case 247 : /* fall through */ case 248 : /* fall through */ case 249 : /* fall through */ case 250 : /* fall through */ case 251 : /* fall through */ case 252 : /* fall through */ case 253 : /* fall through */ case 254 : /* fall through */ case 255 : { unsigned int val = (((insn >> 8) & (3 << 0))); switch (val) { case 0 : itype = M32RBF_INSN_BC24; goto extract_sfmt_bc24; case 1 : itype = M32RBF_INSN_BNC24; goto extract_sfmt_bc24; case 2 : itype = M32RBF_INSN_BL24; goto extract_sfmt_bl24; case 3 : itype = M32RBF_INSN_BRA24; goto extract_sfmt_bra24; default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty; } } default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty; } } } /* The instruction has been decoded, now extract the fields. */ extract_sfmt_empty: { const IDESC *idesc = &m32rbf_insn_data[itype];#define FLD(f) abuf->fields.fmt_empty.f /* Record the fields for the semantic handler. */ TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_empty", (char *) 0));#undef FLD return idesc; } extract_sfmt_add: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn;#define FLD(f) abuf->fields.sfmt_add.f UINT f_r1; UINT f_r2; f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); /* Record the fields for the semantic handler. */ FLD (f_r1) = f_r1; FLD (f_r2) = f_r2; FLD (i_dr) = & CPU (h_gr)[f_r1]; FLD (i_sr) = & CPU (h_gr)[f_r2]; TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));#if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ if (PROFILE_MODEL_P (current_cpu)) { FLD (in_dr) = f_r1; FLD (in_sr) = f_r2; FLD (out_dr) = f_r1; }#endif#undef FLD return idesc; } extract_sfmt_add3: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn;#define FLD(f) abuf->fields.sfmt_add3.f UINT f_r1; UINT f_r2; INT f_simm16; f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; FLD (f_r2) = f_r2; FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0));#if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ if (PROFILE_MODEL_P (current_cpu)) { FLD (in_sr) = f_r2; FLD (out_dr) = f_r1; }#endif#undef FLD return idesc; } extract_sfmt_and3: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn;#define FLD(f) abuf->fields.sfmt_and3.f UINT f_r1; UINT f_r2; UINT f_uimm16; f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); f_uimm16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_r2) = f_r2; FLD (f_uimm16) = f_uimm16; FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_and3", "f_r2 0x%x", 'x', f_r2, "f_uimm16 0x%x", 'x', f_uimm16, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0));#if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ if (PROFILE_MODEL_P (current_cpu)) { FLD (in_sr) = f_r2; FLD (out_dr) = f_r1; }#endif#undef FLD return idesc; } extract_sfmt_or3: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn;#define FLD(f) abuf->fields.sfmt_and3.f UINT f_r1; UINT f_r2; UINT f_uimm16; f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); f_uimm16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_r2) = f_r2; FLD (f_uimm16) = f_uimm16; FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_or3", "f_r2 0x%x", 'x', f_r2, "f_uimm16 0x%x", 'x', f_uimm16, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0));#if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ if (PROFILE_MODEL_P (current_cpu)) { FLD (in_sr) = f_r2; FLD (out_dr) = f_r1; }#endif#undef FLD return idesc; } extract_sfmt_addi: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn;#define FLD(f) abuf->fields.sfmt_addi.f UINT f_r1; INT f_simm8; f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); f_simm8 = EXTRACT_MSB0_INT (insn, 16, 8, 8); /* Record the fields for the semantic handler. */ FLD (f_r1) = f_r1; FLD (f_simm8) = f_simm8; FLD (i_dr) = & CPU (h_gr)[f_r1]; TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addi", "f_r1 0x%x", 'x', f_r1, "f_simm8 0x%x", 'x', f_simm8, "dr 0x%x", 'x', f_r1, (char *) 0));#if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ if (PROFILE_MODEL_P (current_cpu)) { FLD (in_dr) = f_r1; FLD (out_dr) = f_r1; }#endif#undef FLD return idesc; } extract_sfmt_addv: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn;#define FLD(f) abuf->fields.sfmt_add.f UINT f_r1; UINT f_r2; f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); /* Record the fields for the semantic handler. */ FLD (f_r1) = f_r1; FLD (f_r2) = f_r2; FLD (i_dr) = & CPU (h_gr)[f_r1]; FLD (i_sr) = & CPU (h_gr)[f_r2]; TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addv", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));#if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ if (PROFILE_MODEL_P (current_cpu)) { FLD (in_dr) = f_r1; FLD (in_sr) = f_r2; FLD (out_dr) = f_r1; }#endif#undef FLD return idesc; } extract_sfmt_addv3: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn;#define FLD(f) abuf->fields.sfmt_add3.f UINT f_r1; UINT f_r2; INT f_simm16; f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); /* Record the fields for the semantic handler. */ FLD (f_simm16) = f_simm16; FLD (f_r2) = f_r2; FLD (f_r1) = f_r1; FLD (i_sr) = & CPU (h_gr)[f_r2]; FLD (i_dr) = & CPU (h_gr)[f_r1]; TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addv3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0));#if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ if (PROFILE_MODEL_P (current_cpu)) { FLD (in_sr) = f_r2; FLD (out_dr) = f_r1; }#endif#undef FLD return idesc; } extract_sfmt_addx: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn;#define FLD(f) abuf->fields.sfmt_add.f UINT f_r1; UINT f_r2; f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); /* Record the fields for the semantic handler. */ FLD (f_r1) = f_r1; FLD (f_r2) = f_r2; FLD (i_dr) = & CPU (h_gr)[f_r1]; FLD (i_sr) = & CPU (h_gr)[f_r2]; TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addx", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));#if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ if (PROFILE_MODEL_P (current_cpu)) { FLD (in_dr) = f_r1; FLD (in_sr) = f_r2; FLD (out_dr) = f_r1; }#endif#undef FLD return idesc; } extract_sfmt_bc8: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn;#define FLD(f) abuf->fields.sfmt_bl8.f SI f_disp8; f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); /* Record the fields for the semantic handler. */ FLD (i_disp8) = f_disp8; TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bc8", "disp8 0x%x", 'x', f_disp8, (char *) 0));#if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ if (PROFILE_MODEL_P (current_cpu)) { }#endif#undef FLD return idesc; } extract_sfmt_bc24: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn;#define FLD(f) abuf->fields.sfmt_bl24.f SI f_disp24; f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc)); /* Record the fields for the semantic handler. */ FLD (i_disp24) = f_disp24; TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bc24", "disp24 0x%x", 'x', f_disp24, (char *) 0));#if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ if (PROFILE_MODEL_P (current_cpu)) { }#endif#undef FLD return idesc; } extract_sfmt_beq: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn;#define FLD(f) abuf->fields.sfmt_beq.f UINT f_r1; UINT f_r2; SI f_disp16; f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc)); /* Record the fields for the semantic handler. */ FLD (f_r1) = f_r1; FLD (f_r2) = f_r2; FLD (i_disp16) = f_disp16; FLD (i_src1) = & CPU (h_gr)[f_r1]; FLD (i_src2) = & CPU (h_gr)[f_r2]; TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_beq", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));#if WITH_PROFILE_MODEL_P /* Record the fields for profiling. */ if (PROFILE_MODEL_P (current_cpu)) { FLD (in_src1) = f_r1; FLD (in_src2) = f_r2; }#endif#undef FLD return idesc; } extract_sfmt_beqz: { const IDESC *idesc = &m32rbf_insn_data[itype]; CGEN_INSN_INT insn = entire_insn;#define FLD(f) abuf->fields.sfmt_beq.f UINT f_r2; SI f_disp16;
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -