cpu2.h

这个是LINUX下的GDB调度工具的源码

#define EXTRACT_IFMT_JC_VARS \
  UINT f_op1; \
  UINT f_r1; \
  UINT f_op2; \
  UINT f_r2; \
  unsigned int length;
#define EXTRACT_IFMT_JC_CODE \
  length = 2; \
  f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
  f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
  f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
  f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \

#define EXTRACT_IFMT_LD24_VARS \
  UINT f_op1; \
  UINT f_r1; \
  UINT f_uimm24; \
  unsigned int length;
#define EXTRACT_IFMT_LD24_CODE \
  length = 4; \
  f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \
  f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
  f_uimm24 = EXTRACT_MSB0_UINT (insn, 32, 8, 24); \

#define EXTRACT_IFMT_LDI16_VARS \
  UINT f_op1; \
  UINT f_r1; \
  UINT f_op2; \
  UINT f_r2; \
  INT f_simm16; \
  unsigned int length;
#define EXTRACT_IFMT_LDI16_CODE \
  length = 4; \
  f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \
  f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
  f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
  f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
  f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \

#define EXTRACT_IFMT_MACHI_A_VARS \
  UINT f_op1; \
  UINT f_r1; \
  UINT f_acc; \
  UINT f_op23; \
  UINT f_r2; \
  unsigned int length;
#define EXTRACT_IFMT_MACHI_A_CODE \
  length = 2; \
  f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
  f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
  f_acc = EXTRACT_MSB0_UINT (insn, 16, 8, 1); \
  f_op23 = EXTRACT_MSB0_UINT (insn, 16, 9, 3); \
  f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \

#define EXTRACT_IFMT_MVFACHI_A_VARS \
  UINT f_op1; \
  UINT f_r1; \
  UINT f_op2; \
  UINT f_accs; \
  UINT f_op3; \
  unsigned int length;
#define EXTRACT_IFMT_MVFACHI_A_CODE \
  length = 2; \
  f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
  f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
  f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
  f_accs = EXTRACT_MSB0_UINT (insn, 16, 12, 2); \
  f_op3 = EXTRACT_MSB0_UINT (insn, 16, 14, 2); \

#define EXTRACT_IFMT_MVFC_VARS \
  UINT f_op1; \
  UINT f_r1; \
  UINT f_op2; \
  UINT f_r2; \
  unsigned int length;
#define EXTRACT_IFMT_MVFC_CODE \
  length = 2; \
  f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
  f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
  f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
  f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \

#define EXTRACT_IFMT_MVTACHI_A_VARS \
  UINT f_op1; \
  UINT f_r1; \
  UINT f_op2; \
  UINT f_accs; \
  UINT f_op3; \
  unsigned int length;
#define EXTRACT_IFMT_MVTACHI_A_CODE \
  length = 2; \
  f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
  f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
  f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
  f_accs = EXTRACT_MSB0_UINT (insn, 16, 12, 2); \
  f_op3 = EXTRACT_MSB0_UINT (insn, 16, 14, 2); \

#define EXTRACT_IFMT_MVTC_VARS \
  UINT f_op1; \
  UINT f_r1; \
  UINT f_op2; \
  UINT f_r2; \
  unsigned int length;
#define EXTRACT_IFMT_MVTC_CODE \
  length = 2; \
  f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
  f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
  f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
  f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \

#define EXTRACT_IFMT_NOP_VARS \
  UINT f_op1; \
  UINT f_r1; \
  UINT f_op2; \
  UINT f_r2; \
  unsigned int length;
#define EXTRACT_IFMT_NOP_CODE \
  length = 2; \
  f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
  f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
  f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
  f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \

#define EXTRACT_IFMT_RAC_DSI_VARS \
  UINT f_op1; \
  UINT f_accd; \
  UINT f_bits67; \
  UINT f_op2; \
  UINT f_accs; \
  UINT f_bit14; \
  SI f_imm1; \
  unsigned int length;
#define EXTRACT_IFMT_RAC_DSI_CODE \
  length = 2; \
  f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
  f_accd = EXTRACT_MSB0_UINT (insn, 16, 4, 2); \
  f_bits67 = EXTRACT_MSB0_UINT (insn, 16, 6, 2); \
  f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
  f_accs = EXTRACT_MSB0_UINT (insn, 16, 12, 2); \
  f_bit14 = EXTRACT_MSB0_UINT (insn, 16, 14, 1); \
  f_imm1 = ((EXTRACT_MSB0_UINT (insn, 16, 15, 1)) + (1)); \

#define EXTRACT_IFMT_SETH_VARS \
  UINT f_op1; \
  UINT f_r1; \
  UINT f_op2; \
  UINT f_r2; \
  UINT f_hi16; \
  unsigned int length;
#define EXTRACT_IFMT_SETH_CODE \
  length = 4; \
  f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \
  f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
  f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
  f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
  f_hi16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16); \

#define EXTRACT_IFMT_SLLI_VARS \
  UINT f_op1; \
  UINT f_r1; \
  UINT f_shift_op2; \
  UINT f_uimm5; \
  unsigned int length;
#define EXTRACT_IFMT_SLLI_CODE \
  length = 2; \
  f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
  f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
  f_shift_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 3); \
  f_uimm5 = EXTRACT_MSB0_UINT (insn, 16, 11, 5); \

#define EXTRACT_IFMT_ST_D_VARS \
  UINT f_op1; \
  UINT f_r1; \
  UINT f_op2; \
  UINT f_r2; \
  INT f_simm16; \
  unsigned int length;
#define EXTRACT_IFMT_ST_D_CODE \
  length = 4; \
  f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \
  f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
  f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
  f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
  f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \

#define EXTRACT_IFMT_TRAP_VARS \
  UINT f_op1; \
  UINT f_r1; \
  UINT f_op2; \
  UINT f_uimm4; \
  unsigned int length;
#define EXTRACT_IFMT_TRAP_CODE \
  length = 2; \
  f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
  f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
  f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
  f_uimm4 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \

#define EXTRACT_IFMT_SATB_VARS \
  UINT f_op1; \
  UINT f_r1; \
  UINT f_op2; \
  UINT f_r2; \
  UINT f_uimm16; \
  unsigned int length;
#define EXTRACT_IFMT_SATB_CODE \
  length = 4; \
  f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \
  f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
  f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
  f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
  f_uimm16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16); \

#define EXTRACT_IFMT_CLRPSW_VARS \
  UINT f_op1; \
  UINT f_r1; \
  UINT f_uimm8; \
  unsigned int length;
#define EXTRACT_IFMT_CLRPSW_CODE \
  length = 2; \
  f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
  f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
  f_uimm8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8); \

#define EXTRACT_IFMT_BSET_VARS \
  UINT f_op1; \
  UINT f_bit4; \
  UINT f_uimm3; \
  UINT f_op2; \
  UINT f_r2; \
  INT f_simm16; \
  unsigned int length;
#define EXTRACT_IFMT_BSET_CODE \
  length = 4; \
  f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \
  f_bit4 = EXTRACT_MSB0_UINT (insn, 32, 4, 1); \
  f_uimm3 = EXTRACT_MSB0_UINT (insn, 32, 5, 3); \
  f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
  f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
  f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \

#define EXTRACT_IFMT_BTST_VARS \
  UINT f_op1; \
  UINT f_bit4; \
  UINT f_uimm3; \
  UINT f_op2; \
  UINT f_r2; \
  unsigned int length;
#define EXTRACT_IFMT_BTST_CODE \
  length = 2; \
  f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
  f_bit4 = EXTRACT_MSB0_UINT (insn, 16, 4, 1); \
  f_uimm3 = EXTRACT_MSB0_UINT (insn, 16, 5, 3); \
  f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
  f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \

/* Queued output values of an instruction.  */

struct parexec {
  union {
    struct { /* empty sformat for unspecified field list */
      int empty;
    } sfmt_empty;
    struct { /* e.g. add $dr,$sr */
      SI dr;
    } sfmt_add;
    struct { /* e.g. add3 $dr,$sr,$hash$slo16 */
      SI dr;
    } sfmt_add3;
    struct { /* e.g. and3 $dr,$sr,$uimm16 */
      SI dr;
    } sfmt_and3;
    struct { /* e.g. or3 $dr,$sr,$hash$ulo16 */
      SI dr;
    } sfmt_or3;
    struct { /* e.g. addi $dr,$simm8 */
      SI dr;
    } sfmt_addi;
    struct { /* e.g. addv $dr,$sr */
      BI condbit;
      SI dr;
    } sfmt_addv;
    struct { /* e.g. addv3 $dr,$sr,$simm16 */
      BI condbit;
      SI dr;
    } sfmt_addv3;
    struct { /* e.g. addx $dr,$sr */
      BI condbit;
      SI dr;
    } sfmt_addx;
    struct { /* e.g. bc.s $disp8 */
      USI pc;
    } sfmt_bc8;
    struct { /* e.g. bc.l $disp24 */
      USI pc;
    } sfmt_bc24;
    struct { /* e.g. beq $src1,$src2,$disp16 */
      USI pc;
    } sfmt_beq;
    struct { /* e.g. beqz $src2,$disp16 */
      USI pc;
    } sfmt_beqz;
    struct { /* e.g. bl.s $disp8 */
      SI h_gr_SI_14;
      USI pc;
    } sfmt_bl8;
    struct { /* e.g. bl.l $disp24 */
      SI h_gr_SI_14;
      USI pc;
    } sfmt_bl24;
    struct { /* e.g. bcl.s $disp8 */
      SI h_gr_SI_14;
      USI pc;
    } sfmt_bcl8;
    struct { /* e.g. bcl.l $disp24 */
      SI h_gr_SI_14;
      USI pc;
    } sfmt_bcl24;
    struct { /* e.g. bra.s $disp8 */
      USI pc;
    } sfmt_bra8;
    struct { /* e.g. bra.l $disp24 */
      USI pc;
    } sfmt_bra24;
    struct { /* e.g. cmp $src1,$src2 */
      BI condbit;
    } sfmt_cmp;
    struct { /* e.g. cmpi $src2,$simm16 */
      BI condbit;
    } sfmt_cmpi;
    struct { /* e.g. cmpz $src2 */
      BI condbit;
    } sfmt_cmpz;
    struct { /* e.g. div $dr,$sr */
      SI dr;
    } sfmt_div;
    struct { /* e.g. jc $sr */
      USI pc;
    } sfmt_jc;
    struct { /* e.g. jl $sr */
      SI h_gr_SI_14;
      USI pc;
    } sfmt_jl;
    struct { /* e.g. jmp $sr */
      USI pc;
    } sfmt_jmp;
    struct { /* e.g. ld $dr,@$sr */
      SI dr;
    } sfmt_ld;
    struct { /* e.g. ld $dr,@($slo16,$sr) */
      SI dr;
    } sfmt_ld_d;
    struct { /* e.g. ldb $dr,@$sr */
      SI dr;
    } sfmt_ldb;
    struct { /* e.g. ldb $dr,@($slo16,$sr) */
      SI dr;
    } sfmt_ldb_d;
    struct { /* e.g. ldh $dr,@$sr */
      SI dr;
    } sfmt_ldh;
    struct { /* e.g. ldh $dr,@($slo16,$sr) */
      SI dr;
    } sfmt_ldh_d;
    struct { /* e.g. ld $dr,@$sr+ */
      SI dr;
      SI sr;
    } sfmt_ld_plus;
    struct { /* e.g. ld24 $dr,$uimm24 */
      SI dr;
    } sfmt_ld24;
    struct { /* e.g. ldi8 $dr,$simm8 */
      SI dr;
    } sfmt_ldi8;
    struct { /* e.g. ldi16 $dr,$hash$slo16 */
      SI dr;
    } sfmt_ldi16;
    struct { /* e.g. lock $dr,@$sr */
      SI dr;
      BI h_lock_BI;
    } sfmt_lock;
    struct { /* e.g. machi $src1,$src2,$acc */
      DI acc;
    } sfmt_machi_a;
    struct { /* e.g. mulhi $src1,$src2,$acc */
      DI acc;
    } sfmt_mulhi_a;
    struct { /* e.g. mv $dr,$sr */
      SI dr;
    } sfmt_mv;
    struct { /* e.g. mvfachi $dr,$accs */
      SI dr;
    } sfmt_mvfachi_a;
    struct { /* e.g. mvfc $dr,$scr */
      SI dr;
    } sfmt_mvfc;
    struct { /* e.g. mvtachi $src1,$accs */
      DI accs;
    } sfmt_mvtachi_a;
    struct { /* e.g. mvtc $sr,$dcr */
      USI dcr;
    } sfmt_mvtc;
    struct { /* e.g. nop */
      int empty;
    } sfmt_nop;
    struct { /* e.g. rac $accd,$accs,$imm1 */
      DI accd;
    } sfmt_rac_dsi;
    struct { /* e.g. rte */
      UQI h_bpsw_UQI;
      USI h_cr_USI_6;
      UQI h_psw_UQI;
      USI pc;
    } sfmt_rte;
    struct { /* e.g. seth $dr,$hash$hi16 */
      SI dr;
    } sfmt_seth;
    struct { /* e.g. sll3 $dr,$sr,$simm16 */
      SI dr;
    } sfmt_sll3;
    struct { /* e.g. slli $dr,$uimm5 */
      SI dr;
    } sfmt_slli;
    struct { /* e.g. st $src1,@$src2 */
      SI h_memory_SI_src2;
      USI h_memory_SI_src2_idx;
    } sfmt_st;
    struct { /* e.g. st $src1,@($slo16,$src2) */
      SI h_memory_SI_add__DFLT_src2_slo16;
      USI h_memory_SI_add__DFLT_src2_slo16_idx;
    } sfmt_st_d;
    struct { /* e.g. stb $src1,@$src2 */
      QI h_memory_QI_src2;
      USI h_memory_QI_src2_idx;
    } sfmt_stb;
    struct { /* e.g. stb $src1,@($slo16,$src2) */
      QI h_memory_QI_add__DFLT_src2_slo16;
      USI h_memory_QI_add__DFLT_src2_slo16_idx;
    } sfmt_stb_d;
    struct { /* e.g. sth $src1,@$src2 */
      HI h_memory_HI_src2;
      USI h_memory_HI_src2_idx;
    } sfmt_sth;
    struct { /* e.g. sth $src1,@($slo16,$src2) */
      HI h_memory_HI_add__DFLT_src2_slo16;
      USI h_memory_HI_add__DFLT_src2_slo16_idx;
    } sfmt_sth_d;
    struct { /* e.g. st $src1,@+$src2 */
      SI h_memory_SI_new_src2;
      USI h_memory_SI_new_src2_idx;
      SI src2;
    } sfmt_st_plus;
    struct { /* e.g. sth $src1,@$src2+ */
      HI h_memory_HI_new_src2;
      USI h_memory_HI_new_src2_idx;
      SI src2;
    } sfmt_sth_plus;
    struct { /* e.g. stb $src1,@$src2+ */
      QI h_memory_QI_new_src2;
      USI h_memory_QI_new_src2_idx;
      SI src2;
    } sfmt_stb_plus;
    struct { /* e.g. trap $uimm4 */
      UQI h_bbpsw_UQI;
      UQI h_bpsw_UQI;
      USI h_cr_USI_14;
      USI h_cr_USI_6;
      UQI h_psw_UQI;
      SI pc;
    } sfmt_trap;
    struct { /* e.g. unlock $src1,@$src2 */
      BI h_lock_BI;
      SI h_memory_SI_src2;
      USI h_memory_SI_src2_idx;
    } sfmt_unlock;
    struct { /* e.g. satb $dr,$sr */
      SI dr;
    } sfmt_satb;
    struct { /* e.g. sat $dr,$sr */
      SI dr;
    } sfmt_sat;
    struct { /* e.g. sadd */
      DI h_accums_DI_0;
    } sfmt_sadd;
    struct { /* e.g. macwu1 $src1,$src2 */
      DI h_accums_DI_1;
    } sfmt_macwu1;
    struct { /* e.g. msblo $src1,$src2 */
      DI accum;
    } sfmt_msblo;
    struct { /* e.g. mulwu1 $src1,$src2 */
      DI h_accums_DI_1;
    } sfmt_mulwu1;
    struct { /* e.g. sc */
      int empty;
    } sfmt_sc;
    struct { /* e.g. clrpsw $uimm8 */
      USI h_cr_USI_0;
    } sfmt_clrpsw;
    struct { /* e.g. setpsw $uimm8 */
      USI h_cr_USI_0;
    } sfmt_setpsw;
    struct { /* e.g. bset $uimm3,@($slo16,$sr) */
      QI h_memory_QI_add__DFLT_sr_slo16;
      USI h_memory_QI_add__DFLT_sr_slo16_idx;
    } sfmt_bset;
    struct { /* e.g. btst $uimm3,$sr */
      BI condbit;
    } sfmt_btst;
  } operands;
  /* For conditionally written operands, bitmask of which ones were.  */
  int written;
};

/* Collection of various things for the trace handler to use.  */

typedef struct trace_record {
  IADDR pc;
  /* FIXME:wip */
} TRACE_RECORD;

#endif /* CPU_M32R2F_H */