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📄 sem.c

📁 这个是LINUX下的GDB调度工具的源码
💻 C
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/* srli: srli $dr,$uimm5 */static SEM_PCSEM_FN_NAME (m32rbf,srli) (SIM_CPU *current_cpu, SEM_ARG sem_arg){#define FLD(f) abuf->fields.sfmt_slli.f  ARGBUF *abuf = SEM_ARGBUF (sem_arg);  int UNUSED written = 0;  IADDR UNUSED pc = abuf->addr;  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);  {    SI opval = SRLSI (* FLD (i_dr), FLD (f_uimm5));    * FLD (i_dr) = opval;    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);  }  return vpc;#undef FLD}/* st: st $src1,@$src2 */static SEM_PCSEM_FN_NAME (m32rbf,st) (SIM_CPU *current_cpu, SEM_ARG sem_arg){#define FLD(f) abuf->fields.sfmt_st_plus.f  ARGBUF *abuf = SEM_ARGBUF (sem_arg);  int UNUSED written = 0;  IADDR UNUSED pc = abuf->addr;  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);  {    SI opval = * FLD (i_src1);    SETMEMSI (current_cpu, pc, * FLD (i_src2), opval);    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);  }  return vpc;#undef FLD}/* st-d: st $src1,@($slo16,$src2) */static SEM_PCSEM_FN_NAME (m32rbf,st_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg){#define FLD(f) abuf->fields.sfmt_st_d.f  ARGBUF *abuf = SEM_ARGBUF (sem_arg);  int UNUSED written = 0;  IADDR UNUSED pc = abuf->addr;  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);  {    SI opval = * FLD (i_src1);    SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval);    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);  }  return vpc;#undef FLD}/* stb: stb $src1,@$src2 */static SEM_PCSEM_FN_NAME (m32rbf,stb) (SIM_CPU *current_cpu, SEM_ARG sem_arg){#define FLD(f) abuf->fields.sfmt_st_plus.f  ARGBUF *abuf = SEM_ARGBUF (sem_arg);  int UNUSED written = 0;  IADDR UNUSED pc = abuf->addr;  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);  {    QI opval = * FLD (i_src1);    SETMEMQI (current_cpu, pc, * FLD (i_src2), opval);    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);  }  return vpc;#undef FLD}/* stb-d: stb $src1,@($slo16,$src2) */static SEM_PCSEM_FN_NAME (m32rbf,stb_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg){#define FLD(f) abuf->fields.sfmt_st_d.f  ARGBUF *abuf = SEM_ARGBUF (sem_arg);  int UNUSED written = 0;  IADDR UNUSED pc = abuf->addr;  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);  {    QI opval = * FLD (i_src1);    SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval);    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);  }  return vpc;#undef FLD}/* sth: sth $src1,@$src2 */static SEM_PCSEM_FN_NAME (m32rbf,sth) (SIM_CPU *current_cpu, SEM_ARG sem_arg){#define FLD(f) abuf->fields.sfmt_st_plus.f  ARGBUF *abuf = SEM_ARGBUF (sem_arg);  int UNUSED written = 0;  IADDR UNUSED pc = abuf->addr;  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);  {    HI opval = * FLD (i_src1);    SETMEMHI (current_cpu, pc, * FLD (i_src2), opval);    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);  }  return vpc;#undef FLD}/* sth-d: sth $src1,@($slo16,$src2) */static SEM_PCSEM_FN_NAME (m32rbf,sth_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg){#define FLD(f) abuf->fields.sfmt_st_d.f  ARGBUF *abuf = SEM_ARGBUF (sem_arg);  int UNUSED written = 0;  IADDR UNUSED pc = abuf->addr;  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);  {    HI opval = * FLD (i_src1);    SETMEMHI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval);    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);  }  return vpc;#undef FLD}/* st-plus: st $src1,@+$src2 */static SEM_PCSEM_FN_NAME (m32rbf,st_plus) (SIM_CPU *current_cpu, SEM_ARG sem_arg){#define FLD(f) abuf->fields.sfmt_st_plus.f  ARGBUF *abuf = SEM_ARGBUF (sem_arg);  int UNUSED written = 0;  IADDR UNUSED pc = abuf->addr;  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);{  SI tmp_new_src2;  tmp_new_src2 = ADDSI (* FLD (i_src2), 4);  {    SI opval = * FLD (i_src1);    SETMEMSI (current_cpu, pc, tmp_new_src2, opval);    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);  }  {    SI opval = tmp_new_src2;    * FLD (i_src2) = opval;    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);  }}  return vpc;#undef FLD}/* st-minus: st $src1,@-$src2 */static SEM_PCSEM_FN_NAME (m32rbf,st_minus) (SIM_CPU *current_cpu, SEM_ARG sem_arg){#define FLD(f) abuf->fields.sfmt_st_plus.f  ARGBUF *abuf = SEM_ARGBUF (sem_arg);  int UNUSED written = 0;  IADDR UNUSED pc = abuf->addr;  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);{  SI tmp_new_src2;  tmp_new_src2 = SUBSI (* FLD (i_src2), 4);  {    SI opval = * FLD (i_src1);    SETMEMSI (current_cpu, pc, tmp_new_src2, opval);    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);  }  {    SI opval = tmp_new_src2;    * FLD (i_src2) = opval;    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);  }}  return vpc;#undef FLD}/* sub: sub $dr,$sr */static SEM_PCSEM_FN_NAME (m32rbf,sub) (SIM_CPU *current_cpu, SEM_ARG sem_arg){#define FLD(f) abuf->fields.sfmt_add.f  ARGBUF *abuf = SEM_ARGBUF (sem_arg);  int UNUSED written = 0;  IADDR UNUSED pc = abuf->addr;  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);  {    SI opval = SUBSI (* FLD (i_dr), * FLD (i_sr));    * FLD (i_dr) = opval;    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);  }  return vpc;#undef FLD}/* subv: subv $dr,$sr */static SEM_PCSEM_FN_NAME (m32rbf,subv) (SIM_CPU *current_cpu, SEM_ARG sem_arg){#define FLD(f) abuf->fields.sfmt_add.f  ARGBUF *abuf = SEM_ARGBUF (sem_arg);  int UNUSED written = 0;  IADDR UNUSED pc = abuf->addr;  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);{  SI temp0;BI temp1;  temp0 = SUBSI (* FLD (i_dr), * FLD (i_sr));  temp1 = SUBOFSI (* FLD (i_dr), * FLD (i_sr), 0);  {    SI opval = temp0;    * FLD (i_dr) = opval;    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);  }  {    BI opval = temp1;    CPU (h_cond) = opval;    TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);  }}  return vpc;#undef FLD}/* subx: subx $dr,$sr */static SEM_PCSEM_FN_NAME (m32rbf,subx) (SIM_CPU *current_cpu, SEM_ARG sem_arg){#define FLD(f) abuf->fields.sfmt_add.f  ARGBUF *abuf = SEM_ARGBUF (sem_arg);  int UNUSED written = 0;  IADDR UNUSED pc = abuf->addr;  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);{  SI temp0;BI temp1;  temp0 = SUBCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));  temp1 = SUBCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));  {    SI opval = temp0;    * FLD (i_dr) = opval;    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);  }  {    BI opval = temp1;    CPU (h_cond) = opval;    TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);  }}  return vpc;#undef FLD}/* trap: trap $uimm4 */static SEM_PCSEM_FN_NAME (m32rbf,trap) (SIM_CPU *current_cpu, SEM_ARG sem_arg){#define FLD(f) abuf->fields.sfmt_trap.f  ARGBUF *abuf = SEM_ARGBUF (sem_arg);  int UNUSED written = 0;  IADDR UNUSED pc = abuf->addr;  SEM_BRANCH_INIT  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);{  {    USI opval = GET_H_CR (((UINT) 6));    SET_H_CR (((UINT) 14), opval);    TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);  }  {    USI opval = ADDSI (pc, 4);    SET_H_CR (((UINT) 6), opval);    TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);  }  {    UQI opval = CPU (h_bpsw);    CPU (h_bbpsw) = opval;    TRACE_RESULT (current_cpu, abuf, "bbpsw", 'x', opval);  }  {    UQI opval = GET_H_PSW ();    CPU (h_bpsw) = opval;    TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval);  }  {    UQI opval = ANDQI (GET_H_PSW (), 128);    SET_H_PSW (opval);    TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval);  }  {    SI opval = m32r_trap (current_cpu, pc, FLD (f_uimm4));    SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);  }}  SEM_BRANCH_FINI (vpc);  return vpc;#undef FLD}/* unlock: unlock $src1,@$src2 */static SEM_PCSEM_FN_NAME (m32rbf,unlock) (SIM_CPU *current_cpu, SEM_ARG sem_arg){#define FLD(f) abuf->fields.sfmt_st_plus.f  ARGBUF *abuf = SEM_ARGBUF (sem_arg);  int UNUSED written = 0;  IADDR UNUSED pc = abuf->addr;  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);{if (CPU (h_lock)) {  {    SI opval = * FLD (i_src1);    SETMEMSI (current_cpu, pc, * FLD (i_src2), opval);    written |= (1 << 4);    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);  }}  {    BI opval = 0;    CPU (h_lock) = opval;    TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval);  }}  abuf->written = written;  return vpc;#undef FLD}/* clrpsw: clrpsw $uimm8 */static SEM_PCSEM_FN_NAME (m32rbf,clrpsw) (SIM_CPU *current_cpu, SEM_ARG sem_arg){#define FLD(f) abuf->fields.sfmt_clrpsw.f  ARGBUF *abuf = SEM_ARGBUF (sem_arg);  int UNUSED written = 0;  IADDR UNUSED pc = abuf->addr;  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);  {    SI opval = ANDSI (GET_H_CR (((UINT) 0)), ORSI (INVBI (FLD (f_uimm8)), 65280));    SET_H_CR (((UINT) 0), opval);    TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);  }  return vpc;#undef FLD}/* setpsw: setpsw $uimm8 */static SEM_PCSEM_FN_NAME (m32rbf,setpsw) (SIM_CPU *current_cpu, SEM_ARG sem_arg){#define FLD(f) abuf->fields.sfmt_clrpsw.f  ARGBUF *abuf = SEM_ARGBUF (sem_arg);  int UNUSED written = 0;  IADDR UNUSED pc = abuf->addr;  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);  {    SI opval = FLD (f_uimm8);    SET_H_CR (((UINT) 0), opval);    TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);  }  return vpc;#undef FLD}/* bset: bset $uimm3,@($slo16,$sr) */static SEM_PCSEM_FN_NAME (m32rbf,bset) (SIM_CPU *current_cpu, SEM_ARG sem_arg){#define FLD(f) abuf->fields.sfmt_bset.f  ARGBUF *abuf = SEM_ARGBUF (sem_arg);  int UNUSED written = 0;  IADDR UNUSED pc = abuf->addr;  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);  {    QI opval = ORQI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))), SLLSI (1, SUBSI (7, FLD (f_uimm3))));    SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)), opval);    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);  }  return vpc;#undef FLD}/* bclr: bclr $uimm3,@($slo16,$sr) */static SEM_PCSEM_FN_NAME (m32rbf,bclr) (SIM_CPU *current_cpu, SEM_ARG sem_arg){#define FLD(f) abuf->fields.sfmt_bset.f  ARGBUF *abuf = SEM_ARGBUF (sem_arg);  int UNUSED written = 0;  IADDR UNUSED pc = abuf->addr;  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);  {    QI opval = ANDQI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))), INVQI (SLLSI (1, SUBSI (7, FLD (f_uimm3)))));    SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)), opval);    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);  }  return vpc;#undef FLD}/* btst: btst $uimm3,$sr */static SEM_PCSEM_FN_NAME (m32rbf,btst) (SIM_CPU *current_cpu, SEM_ARG sem_arg){#define FLD(f) abuf->fields.sfmt_bset.f  ARGBUF *abuf = SEM_ARGBUF (sem_arg);  int UNUSED written = 0;  IADDR UNUSED pc = abuf->addr;  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);  {    BI opval = ANDQI (SRLSI (* FLD (i_sr), SUBSI (7, FLD (f_uimm3))), 1);    CPU (h_cond) = opval;    TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);  }  return vpc;#undef FLD}/* Table of all semantic fns.  */static const struct sem_fn_desc sem_fns[] = {  { M32RBF_INSN_X_INVALID, SEM_FN_NAME (m32rbf,x_invalid) },  { M32RBF_INSN_X_AFTER, SEM_FN_NAME (m32rbf,x_after) },  { M32RBF_INSN_X_BEFORE, SEM_FN_NAME (m32rbf,x_before) },  { M32RBF_INSN_X_CTI_CHAIN, SEM_FN_NAME (m32rbf,x_cti_chain) },  { M32RBF_INSN_X_CHAIN, SEM_FN_NAME (m32rbf,x_chain) },  { M32RBF_INSN_X_BEGIN, SEM_FN_NAME (m32rbf,x_begin) },  { M32RBF_INSN_ADD, SEM_FN_NAME (m32rbf,add) },  { M32RBF_INSN_ADD3, SEM_FN_NAME (m32rbf,add3) },  { M32RBF_INSN_AND, SEM_FN_NAME (m32rbf,and) },  { M32RBF_INSN_AND3, SEM_FN_NAME (m32rbf,and3) },  { M32RBF_INSN_OR, SEM_FN_NAME (m32rbf,or) },  { M32RBF_INSN_OR3, SEM_FN_NAME (m32rbf,or3) },  { M32RBF_INSN_XOR, SEM_FN_NAME (m32rbf,xor) },  { M32RBF_INSN_XOR3, SEM_FN_NAME (m32rbf,xor3) },  { M32RBF_INSN_ADDI, SEM_FN_NAME (m32rbf,addi) },  { M32RBF_INSN_ADDV, SEM_FN_NAME (m32rbf,addv) },  { M32RBF_INSN_ADDV3, SEM_FN_NAME (m32rbf,addv3) },  { M32RBF_INSN_ADDX, SEM_FN_NAME (m32rbf,addx) },  { M32RBF_INSN_BC8, SEM_FN_NAME (m32rbf,bc8) },  { M32RBF_INSN_BC24, SEM_FN_NAME (m32rbf,bc24) },  { M32RBF_INSN_BEQ, SEM_FN_NAME (m32rbf,beq) },  { M32RBF_INSN_BEQZ, SEM_FN_NAME (m32rbf,beqz) },  { M32RBF_INSN_BGEZ, SEM_FN_NAME (m32rbf,bgez) },  { M32RBF_INSN_BGTZ, SEM_FN_NAME (m32rbf,bgtz) },  { M32RBF_INSN_BLEZ, SEM_FN_NAME (m32rbf,blez) },  { M32RBF_INSN_BLTZ, SEM_FN_NAME (m32rbf,bltz) },  { M32RBF_INSN_BNEZ, SEM_FN_NAME (m32rbf,bnez) },  { M32RBF_INSN_BL8, SEM_FN_NAME (m32rbf,bl8) },  { M32RBF_INSN_BL24, SEM_FN_NAME (m32rbf,bl24) },  { M32RBF_INSN_BNC8, SEM_FN_NAME (m32rbf,bnc8) },  { M32RBF_INSN_BNC24, SEM_FN_NAME (m32rbf,bnc24) },  { M32RBF_INSN_BNE, SEM_FN_NAME (m32rbf,bne) },  { M32RBF_INSN_BRA8, SEM_FN_NAME (m32rbf,bra8) },  { M32RBF_INSN_BRA24, SEM_FN_NAME (m32rbf,bra24) },  { M32RBF_INSN_CMP, SEM_FN_NAME (m32rbf,cmp) },  { M32RBF_INSN_CMPI, SEM_FN_NAME (m32rbf,cmpi) },  { M32RBF_INSN_CMPU, SEM_FN_NAME (m32rbf,cmpu) },  { M32RBF_INSN_CMPUI, SEM_FN_NAME (m32rbf,cmpui) },  { M32RBF_INSN_DIV, SEM_FN_NAME (m32rbf,div) },  { M32RBF_INSN_DIVU, SEM_FN_NAME (m32rbf,divu) },  { M32RBF_INSN_REM, SEM_FN_NAME (m32rbf,rem) },  { M32RBF_INSN_REMU, SEM_FN_NAME (m32rbf,remu) },  { M32RBF_INSN_JL, SEM_FN_NAME (m32rbf,jl) },  { M32RBF_INSN_JMP, SEM_FN_NAME (m32rbf,jmp) },  { M32RBF_INSN_LD, SEM_FN_NAME (m32rbf,ld) },  { M32RBF_INSN_LD_D, SEM_FN_NAME (m32rbf,ld_d) },  { M32RBF_INSN_LDB, SEM_FN_NAME (m32rbf,ldb) },  { M32RBF_INSN_LDB_D, SEM_FN_NAME (m32rbf,ldb_d) },  { M32RBF_INSN_LDH, SEM_FN_NAME (m32rbf,ldh) },  { M32RBF_INSN_LDH_D, SEM_FN_NAME (m32rbf,ldh_d) },  { M32RBF_INSN_LDUB, SEM_FN_NAME (m32rbf,ldub) },  { M32RBF_INSN_LDUB_D, SEM_FN_NAME (m32rbf,ldub_d) },  { M32RBF_INSN_LDUH, SEM_FN_NAME (m32rbf,lduh) },  { M32RBF_INSN_LDUH_D, SEM_FN_NAME (m32rbf,lduh_d) },  { M32RBF_INSN_LD_PLUS, SEM_FN_NAME (m32rbf,ld_plus) },  { M32RBF_INSN_LD24, SEM_FN_NAME (m32rbf,ld24) },  { M32RBF_INSN_LDI8, SEM_FN_NAME (m32rbf,ldi8) },  { M32RBF_INSN_LDI16, SEM_FN_NAME (m32rbf,ldi16) },  { M32RBF_INSN_LOCK, SEM_FN_NAME (m32rbf,lock) },  { M32RBF_INSN_MACHI, SEM_FN_NAME (m32rbf,machi) },  { M32RBF_INSN_MACLO, SEM_FN_NAME (m32rbf,maclo) },  { M32RBF_INSN_MACWHI, SEM_FN_NAME (m32rbf,macwhi) },  { M32RBF_INSN_MACWLO, SEM_FN_NAME (m32rbf,macwlo) },  { M32RBF_INSN_MUL, SEM_FN_NAME (m32rbf

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