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📄 sem.c

📁 这个是LINUX下的GDB调度工具的源码
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/* Simulator instruction semantics for i960base.THIS FILE IS MACHINE GENERATED WITH CGEN.Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.This file is part of the GNU Simulators.This program is free software; you can redistribute it and/or modifyit under the terms of the GNU General Public License as published bythe Free Software Foundation; either version 2, or (at your option)any later version.This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY; without even the implied warranty ofMERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See theGNU General Public License for more details.You should have received a copy of the GNU General Public License alongwith this program; if not, write to the Free Software Foundation, Inc.,59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.*/#define WANT_CPU i960base#define WANT_CPU_I960BASE#include "sim-main.h"#include "cgen-mem.h"#include "cgen-ops.h"#undef GET_ATTR#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr)/* This is used so that we can compile two copies of the semantic code,   one with full feature support and one without that runs fast(er).   FAST_P, when desired, is defined on the command line, -DFAST_P=1.  */#if FAST_P#define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_semf_,fn)#undef TRACE_RESULT#define TRACE_RESULT(cpu, abuf, name, type, val)#else#define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_sem_,fn)#endif/* x-invalid: --invalid-- */static SEM_PCSEM_FN_NAME (i960base,x_invalid) (SIM_CPU *current_cpu, SEM_ARG sem_arg){#define FLD(f) abuf->fields.fmt_empty.f  ARGBUF *abuf = SEM_ARGBUF (sem_arg);  int UNUSED written = 0;  IADDR UNUSED pc = abuf->addr;  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);  {    /* Update the recorded pc in the cpu state struct.       Only necessary for WITH_SCACHE case, but to avoid the       conditional compilation ....  */    SET_H_PC (pc);    /* Virtual insns have zero size.  Overwrite vpc with address of next insn       using the default-insn-bitsize spec.  When executing insns in parallel       we may want to queue the fault and continue execution.  */    vpc = SEM_NEXT_VPC (sem_arg, pc, 4);    vpc = sim_engine_invalid_insn (current_cpu, pc, vpc);  }  return vpc;#undef FLD}/* x-after: --after-- */static SEM_PCSEM_FN_NAME (i960base,x_after) (SIM_CPU *current_cpu, SEM_ARG sem_arg){#define FLD(f) abuf->fields.fmt_empty.f  ARGBUF *abuf = SEM_ARGBUF (sem_arg);  int UNUSED written = 0;  IADDR UNUSED pc = abuf->addr;  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);  {#if WITH_SCACHE_PBB_I960BASE    i960base_pbb_after (current_cpu, sem_arg);#endif  }  return vpc;#undef FLD}/* x-before: --before-- */static SEM_PCSEM_FN_NAME (i960base,x_before) (SIM_CPU *current_cpu, SEM_ARG sem_arg){#define FLD(f) abuf->fields.fmt_empty.f  ARGBUF *abuf = SEM_ARGBUF (sem_arg);  int UNUSED written = 0;  IADDR UNUSED pc = abuf->addr;  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);  {#if WITH_SCACHE_PBB_I960BASE    i960base_pbb_before (current_cpu, sem_arg);#endif  }  return vpc;#undef FLD}/* x-cti-chain: --cti-chain-- */static SEM_PCSEM_FN_NAME (i960base,x_cti_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg){#define FLD(f) abuf->fields.fmt_empty.f  ARGBUF *abuf = SEM_ARGBUF (sem_arg);  int UNUSED written = 0;  IADDR UNUSED pc = abuf->addr;  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);  {#if WITH_SCACHE_PBB_I960BASE#ifdef DEFINE_SWITCH    vpc = i960base_pbb_cti_chain (current_cpu, sem_arg,			       pbb_br_type, pbb_br_npc);    BREAK (sem);#else    /* FIXME: Allow provision of explicit ifmt spec in insn spec.  */    vpc = i960base_pbb_cti_chain (current_cpu, sem_arg,			       CPU_PBB_BR_TYPE (current_cpu),			       CPU_PBB_BR_NPC (current_cpu));#endif#endif  }  return vpc;#undef FLD}/* x-chain: --chain-- */static SEM_PCSEM_FN_NAME (i960base,x_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg){#define FLD(f) abuf->fields.fmt_empty.f  ARGBUF *abuf = SEM_ARGBUF (sem_arg);  int UNUSED written = 0;  IADDR UNUSED pc = abuf->addr;  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);  {#if WITH_SCACHE_PBB_I960BASE    vpc = i960base_pbb_chain (current_cpu, sem_arg);#ifdef DEFINE_SWITCH    BREAK (sem);#endif#endif  }  return vpc;#undef FLD}/* x-begin: --begin-- */static SEM_PCSEM_FN_NAME (i960base,x_begin) (SIM_CPU *current_cpu, SEM_ARG sem_arg){#define FLD(f) abuf->fields.fmt_empty.f  ARGBUF *abuf = SEM_ARGBUF (sem_arg);  int UNUSED written = 0;  IADDR UNUSED pc = abuf->addr;  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);  {#if WITH_SCACHE_PBB_I960BASE#ifdef DEFINE_SWITCH    /* In the switch case FAST_P is a constant, allowing several optimizations       in any called inline functions.  */    vpc = i960base_pbb_begin (current_cpu, FAST_P);#else    vpc = i960base_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu)));#endif#endif  }  return vpc;#undef FLD}/* mulo: mulo $src1, $src2, $dst */static SEM_PCSEM_FN_NAME (i960base,mulo) (SIM_CPU *current_cpu, SEM_ARG sem_arg){#define FLD(f) abuf->fields.sfmt_emul.f  ARGBUF *abuf = SEM_ARGBUF (sem_arg);  int UNUSED written = 0;  IADDR UNUSED pc = abuf->addr;  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);  {    SI opval = MULSI (* FLD (i_src1), * FLD (i_src2));    * FLD (i_dst) = opval;    TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);  }  return vpc;#undef FLD}/* mulo1: mulo $lit1, $src2, $dst */static SEM_PCSEM_FN_NAME (i960base,mulo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg){#define FLD(f) abuf->fields.sfmt_emul1.f  ARGBUF *abuf = SEM_ARGBUF (sem_arg);  int UNUSED written = 0;  IADDR UNUSED pc = abuf->addr;  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);  {    SI opval = MULSI (FLD (f_src1), * FLD (i_src2));    * FLD (i_dst) = opval;    TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);  }  return vpc;#undef FLD}/* mulo2: mulo $src1, $lit2, $dst */static SEM_PCSEM_FN_NAME (i960base,mulo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg){#define FLD(f) abuf->fields.sfmt_emul2.f  ARGBUF *abuf = SEM_ARGBUF (sem_arg);  int UNUSED written = 0;  IADDR UNUSED pc = abuf->addr;  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);  {    SI opval = MULSI (* FLD (i_src1), FLD (f_src2));    * FLD (i_dst) = opval;    TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);  }  return vpc;#undef FLD}/* mulo3: mulo $lit1, $lit2, $dst */static SEM_PCSEM_FN_NAME (i960base,mulo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg){#define FLD(f) abuf->fields.sfmt_emul3.f  ARGBUF *abuf = SEM_ARGBUF (sem_arg);  int UNUSED written = 0;  IADDR UNUSED pc = abuf->addr;  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);  {    SI opval = MULSI (FLD (f_src1), FLD (f_src2));    * FLD (i_dst) = opval;    TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);  }  return vpc;#undef FLD}/* remo: remo $src1, $src2, $dst */static SEM_PCSEM_FN_NAME (i960base,remo) (SIM_CPU *current_cpu, SEM_ARG sem_arg){#define FLD(f) abuf->fields.sfmt_emul.f  ARGBUF *abuf = SEM_ARGBUF (sem_arg);  int UNUSED written = 0;  IADDR UNUSED pc = abuf->addr;  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);  {    SI opval = UMODSI (* FLD (i_src2), * FLD (i_src1));    * FLD (i_dst) = opval;    TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);  }  return vpc;#undef FLD}/* remo1: remo $lit1, $src2, $dst */static SEM_PCSEM_FN_NAME (i960base,remo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg){#define FLD(f) abuf->fields.sfmt_emul1.f  ARGBUF *abuf = SEM_ARGBUF (sem_arg);  int UNUSED written = 0;  IADDR UNUSED pc = abuf->addr;  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);  {    SI opval = UMODSI (* FLD (i_src2), FLD (f_src1));    * FLD (i_dst) = opval;    TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);  }  return vpc;#undef FLD}/* remo2: remo $src1, $lit2, $dst */static SEM_PCSEM_FN_NAME (i960base,remo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg){#define FLD(f) abuf->fields.sfmt_emul2.f  ARGBUF *abuf = SEM_ARGBUF (sem_arg);  int UNUSED written = 0;  IADDR UNUSED pc = abuf->addr;  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);  {    SI opval = UMODSI (FLD (f_src2), * FLD (i_src1));    * FLD (i_dst) = opval;    TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);  }  return vpc;#undef FLD}/* remo3: remo $lit1, $lit2, $dst */static SEM_PCSEM_FN_NAME (i960base,remo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg){#define FLD(f) abuf->fields.sfmt_emul3.f  ARGBUF *abuf = SEM_ARGBUF (sem_arg);  int UNUSED written = 0;  IADDR UNUSED pc = abuf->addr;  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);  {    SI opval = UMODSI (FLD (f_src2), FLD (f_src1));    * FLD (i_dst) = opval;    TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);  }  return vpc;#undef FLD}/* divo: divo $src1, $src2, $dst */static SEM_PCSEM_FN_NAME (i960base,divo) (SIM_CPU *current_cpu, SEM_ARG sem_arg){#define FLD(f) abuf->fields.sfmt_emul.f  ARGBUF *abuf = SEM_ARGBUF (sem_arg);  int UNUSED written = 0;  IADDR UNUSED pc = abuf->addr;  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);  {    SI opval = UDIVSI (* FLD (i_src2), * FLD (i_src1));    * FLD (i_dst) = opval;    TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);  }  return vpc;#undef FLD}/* divo1: divo $lit1, $src2, $dst */static SEM_PCSEM_FN_NAME (i960base,divo1) (SIM_CPU *current_cpu, SEM_ARG sem_arg){#define FLD(f) abuf->fields.sfmt_emul1.f  ARGBUF *abuf = SEM_ARGBUF (sem_arg);  int UNUSED written = 0;  IADDR UNUSED pc = abuf->addr;  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);  {    SI opval = UDIVSI (* FLD (i_src2), FLD (f_src1));    * FLD (i_dst) = opval;    TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);  }  return vpc;#undef FLD}/* divo2: divo $src1, $lit2, $dst */static SEM_PCSEM_FN_NAME (i960base,divo2) (SIM_CPU *current_cpu, SEM_ARG sem_arg){#define FLD(f) abuf->fields.sfmt_emul2.f  ARGBUF *abuf = SEM_ARGBUF (sem_arg);  int UNUSED written = 0;  IADDR UNUSED pc = abuf->addr;  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);  {    SI opval = UDIVSI (FLD (f_src2), * FLD (i_src1));    * FLD (i_dst) = opval;    TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);  }  return vpc;#undef FLD}/* divo3: divo $lit1, $lit2, $dst */static SEM_PCSEM_FN_NAME (i960base,divo3) (SIM_CPU *current_cpu, SEM_ARG sem_arg){#define FLD(f) abuf->fields.sfmt_emul3.f  ARGBUF *abuf = SEM_ARGBUF (sem_arg);  int UNUSED written = 0;  IADDR UNUSED pc = abuf->addr;  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);  {    SI opval = UDIVSI (FLD (f_src2), FLD (f_src1));    * FLD (i_dst) = opval;    TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);  }  return vpc;#undef FLD}/* remi: remi $src1, $src2, $dst */static SEM_PCSEM_FN_NAME (i960base,remi) (SIM_CPU *current_cpu, SEM_ARG sem_arg){#define FLD(f) abuf->fields.sfmt_emul.f  ARGBUF *abuf = SEM_ARGBUF (sem_arg);  int UNUSED written = 0;  IADDR UNUSED pc = abuf->addr;  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);  {    SI opval = MODSI (* FLD (i_src2), * FLD (i_src1));    * FLD (i_dst) = opval;    TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);  }  return vpc;#undef FLD}/* remi1: remi $lit1, $src2, $dst */static SEM_PCSEM_FN_NAME (i960base,remi1) (SIM_CPU *current_cpu, SEM_ARG sem_arg){#define FLD(f) abuf->fields.sfmt_emul1.f  ARGBUF *abuf = SEM_ARGBUF (sem_arg);  int UNUSED written = 0;  IADDR UNUSED pc = abuf->addr;  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);  {    SI opval = MODSI (* FLD (i_src2), FLD (f_src1));    * FLD (i_dst) = opval;    TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);  }  return vpc;#undef FLD}/* remi2: remi $src1, $lit2, $dst */static SEM_PCSEM_FN_NAME (i960base,remi2) (SIM_CPU *current_cpu, SEM_ARG sem_arg){#define FLD(f) abuf->fields.sfmt_emul2.f  ARGBUF *abuf = SEM_ARGBUF (sem_arg);  int UNUSED written = 0;  IADDR UNUSED pc = abuf->addr;  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);  {    SI opval = MODSI (FLD (f_src2), * FLD (i_src1));    * FLD (i_dst) = opval;    TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);  }  return vpc;#undef FLD}/* remi3: remi $lit1, $lit2, $dst */static SEM_PCSEM_FN_NAME (i960base,remi3) (SIM_CPU *current_cpu, SEM_ARG sem_arg){#define FLD(f) abuf->fields.sfmt_emul3.f  ARGBUF *abuf = SEM_ARGBUF (sem_arg);  int UNUSED written = 0;  IADDR UNUSED pc = abuf->addr;  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);  {    SI opval = MODSI (FLD (f_src2), FLD (f_src1));    * FLD (i_dst) = opval;    TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);  }  return vpc;#undef FLD}/* divi: divi $src1, $src2, $dst */static SEM_PCSEM_FN_NAME (i960base,divi) (SIM_CPU *current_cpu, SEM_ARG sem_arg){#define FLD(f) abuf->fields.sfmt_emul.f  ARGBUF *abuf = SEM_ARGBUF (sem_arg);  int UNUSED written = 0;  IADDR UNUSED pc = abuf->addr;  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);  {    SI opval = DIVSI (* FLD (i_src2), * FLD (i_src1));    * FLD (i_dst) = opval;    TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval);  }  return vpc;#undef FLD

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