📄 sem-switch.c
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#if WITH_SCACHE_PBB_I960BASE i960base_pbb_before (current_cpu, sem_arg);#endif }#undef FLD} NEXT (vpc); CASE (sem, INSN_X_CTI_CHAIN) : /* --cti-chain-- */{ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg);#define FLD(f) abuf->fields.fmt_empty.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 0); {#if WITH_SCACHE_PBB_I960BASE#ifdef DEFINE_SWITCH vpc = i960base_pbb_cti_chain (current_cpu, sem_arg, pbb_br_type, pbb_br_npc); BREAK (sem);#else /* FIXME: Allow provision of explicit ifmt spec in insn spec. */ vpc = i960base_pbb_cti_chain (current_cpu, sem_arg, CPU_PBB_BR_TYPE (current_cpu), CPU_PBB_BR_NPC (current_cpu));#endif#endif }#undef FLD} NEXT (vpc); CASE (sem, INSN_X_CHAIN) : /* --chain-- */{ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg);#define FLD(f) abuf->fields.fmt_empty.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 0); {#if WITH_SCACHE_PBB_I960BASE vpc = i960base_pbb_chain (current_cpu, sem_arg);#ifdef DEFINE_SWITCH BREAK (sem);#endif#endif }#undef FLD} NEXT (vpc); CASE (sem, INSN_X_BEGIN) : /* --begin-- */{ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg);#define FLD(f) abuf->fields.fmt_empty.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 0); {#if WITH_SCACHE_PBB_I960BASE#ifdef DEFINE_SWITCH /* In the switch case FAST_P is a constant, allowing several optimizations in any called inline functions. */ vpc = i960base_pbb_begin (current_cpu, FAST_P);#else vpc = i960base_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu)));#endif#endif }#undef FLD} NEXT (vpc); CASE (sem, INSN_MULO) : /* mulo $src1, $src2, $dst */{ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg);#define FLD(f) abuf->fields.sfmt_emul.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); { SI opval = MULSI (* FLD (i_src1), * FLD (i_src2)); * FLD (i_dst) = opval; TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); }#undef FLD} NEXT (vpc); CASE (sem, INSN_MULO1) : /* mulo $lit1, $src2, $dst */{ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg);#define FLD(f) abuf->fields.sfmt_emul1.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); { SI opval = MULSI (FLD (f_src1), * FLD (i_src2)); * FLD (i_dst) = opval; TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); }#undef FLD} NEXT (vpc); CASE (sem, INSN_MULO2) : /* mulo $src1, $lit2, $dst */{ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg);#define FLD(f) abuf->fields.sfmt_emul2.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); { SI opval = MULSI (* FLD (i_src1), FLD (f_src2)); * FLD (i_dst) = opval; TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); }#undef FLD} NEXT (vpc); CASE (sem, INSN_MULO3) : /* mulo $lit1, $lit2, $dst */{ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg);#define FLD(f) abuf->fields.sfmt_emul3.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); { SI opval = MULSI (FLD (f_src1), FLD (f_src2)); * FLD (i_dst) = opval; TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); }#undef FLD} NEXT (vpc); CASE (sem, INSN_REMO) : /* remo $src1, $src2, $dst */{ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg);#define FLD(f) abuf->fields.sfmt_emul.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); { SI opval = UMODSI (* FLD (i_src2), * FLD (i_src1)); * FLD (i_dst) = opval; TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); }#undef FLD} NEXT (vpc); CASE (sem, INSN_REMO1) : /* remo $lit1, $src2, $dst */{ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg);#define FLD(f) abuf->fields.sfmt_emul1.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); { SI opval = UMODSI (* FLD (i_src2), FLD (f_src1)); * FLD (i_dst) = opval; TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); }#undef FLD} NEXT (vpc); CASE (sem, INSN_REMO2) : /* remo $src1, $lit2, $dst */{ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg);#define FLD(f) abuf->fields.sfmt_emul2.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); { SI opval = UMODSI (FLD (f_src2), * FLD (i_src1)); * FLD (i_dst) = opval; TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); }#undef FLD} NEXT (vpc); CASE (sem, INSN_REMO3) : /* remo $lit1, $lit2, $dst */{ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg);#define FLD(f) abuf->fields.sfmt_emul3.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); { SI opval = UMODSI (FLD (f_src2), FLD (f_src1)); * FLD (i_dst) = opval; TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); }#undef FLD} NEXT (vpc); CASE (sem, INSN_DIVO) : /* divo $src1, $src2, $dst */{ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg);#define FLD(f) abuf->fields.sfmt_emul.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); { SI opval = UDIVSI (* FLD (i_src2), * FLD (i_src1)); * FLD (i_dst) = opval; TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); }#undef FLD} NEXT (vpc); CASE (sem, INSN_DIVO1) : /* divo $lit1, $src2, $dst */{ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg);#define FLD(f) abuf->fields.sfmt_emul1.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); { SI opval = UDIVSI (* FLD (i_src2), FLD (f_src1)); * FLD (i_dst) = opval; TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); }#undef FLD} NEXT (vpc); CASE (sem, INSN_DIVO2) : /* divo $src1, $lit2, $dst */{ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg);#define FLD(f) abuf->fields.sfmt_emul2.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); { SI opval = UDIVSI (FLD (f_src2), * FLD (i_src1)); * FLD (i_dst) = opval; TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); }#undef FLD} NEXT (vpc); CASE (sem, INSN_DIVO3) : /* divo $lit1, $lit2, $dst */{ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg);#define FLD(f) abuf->fields.sfmt_emul3.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); { SI opval = UDIVSI (FLD (f_src2), FLD (f_src1)); * FLD (i_dst) = opval; TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); }#undef FLD} NEXT (vpc); CASE (sem, INSN_REMI) : /* remi $src1, $src2, $dst */{ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg);#define FLD(f) abuf->fields.sfmt_emul.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); { SI opval = MODSI (* FLD (i_src2), * FLD (i_src1)); * FLD (i_dst) = opval; TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); }#undef FLD} NEXT (vpc); CASE (sem, INSN_REMI1) : /* remi $lit1, $src2, $dst */{ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg);#define FLD(f) abuf->fields.sfmt_emul1.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); { SI opval = MODSI (* FLD (i_src2), FLD (f_src1)); * FLD (i_dst) = opval; TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); }#undef FLD} NEXT (vpc); CASE (sem, INSN_REMI2) : /* remi $src1, $lit2, $dst */{ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg);#define FLD(f) abuf->fields.sfmt_emul2.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); { SI opval = MODSI (FLD (f_src2), * FLD (i_src1)); * FLD (i_dst) = opval; TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); }#undef FLD} NEXT (vpc); CASE (sem, INSN_REMI3) : /* remi $lit1, $lit2, $dst */{ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg);#define FLD(f) abuf->fields.sfmt_emul3.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); { SI opval = MODSI (FLD (f_src2), FLD (f_src1)); * FLD (i_dst) = opval; TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); }#undef FLD} NEXT (vpc); CASE (sem, INSN_DIVI) : /* divi $src1, $src2, $dst */{ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg);#define FLD(f) abuf->fields.sfmt_emul.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); { SI opval = DIVSI (* FLD (i_src2), * FLD (i_src1)); * FLD (i_dst) = opval; TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); }#undef FLD} NEXT (vpc); CASE (sem, INSN_DIVI1) : /* divi $lit1, $src2, $dst */{ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg);#define FLD(f) abuf->fields.sfmt_emul1.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); { SI opval = DIVSI (* FLD (i_src2), FLD (f_src1)); * FLD (i_dst) = opval; TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); }#undef FLD} NEXT (vpc); CASE (sem, INSN_DIVI2) : /* divi $src1, $lit2, $dst */{ SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); ARGBUF *abuf = SEM_ARGBUF (sem_arg);#define FLD(f) abuf->fields.sfmt_emul2.f int UNUSED written = 0; IADDR UNUSED pc = abuf->addr; vpc = SEM_NEXT_VPC (sem_arg, pc, 4); { SI opval = DIVSI (FLD (f_src2), * FLD (i_src1)); * FLD (i_dst) = opval; TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); }#undef FLD
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