cpu.h

这个是LINUX下的GDB调度工具的源码

/* The ARGBUF struct.  */
struct argbuf {
  /* These are the baseclass definitions.  */
  IADDR addr;
  const IDESC *idesc;
  char trace_p;
  char profile_p;
  /* ??? Temporary hack for skip insns.  */
  char skip_count;
  char unused;
  /* cpu specific data follows */
  union sem semantic;
  int written;
  union sem_fields fields;
};

/* A cached insn.

   ??? SCACHE used to contain more than just argbuf.  We could delete the
   type entirely and always just use ARGBUF, but for future concerns and as
   a level of abstraction it is left in.  */

struct scache {
  struct argbuf argbuf;
};

/* Macros to simplify extraction, reading and semantic code.
   These define and assign the local vars that contain the insn's fields.  */

#define EXTRACT_IFMT_EMPTY_VARS \
  unsigned int length;
#define EXTRACT_IFMT_EMPTY_CODE \
  length = 0; \

#define EXTRACT_IFMT_MULO_VARS \
  UINT f_opcode; \
  UINT f_srcdst; \
  UINT f_src2; \
  UINT f_m3; \
  UINT f_m2; \
  UINT f_m1; \
  UINT f_opcode2; \
  UINT f_zero; \
  UINT f_src1; \
  unsigned int length;
#define EXTRACT_IFMT_MULO_CODE \
  length = 4; \
  f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \
  f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \
  f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \
  f_m3 = EXTRACT_MSB0_UINT (insn, 32, 18, 1); \
  f_m2 = EXTRACT_MSB0_UINT (insn, 32, 19, 1); \
  f_m1 = EXTRACT_MSB0_UINT (insn, 32, 20, 1); \
  f_opcode2 = EXTRACT_MSB0_UINT (insn, 32, 21, 4); \
  f_zero = EXTRACT_MSB0_UINT (insn, 32, 25, 2); \
  f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); \

#define EXTRACT_IFMT_MULO1_VARS \
  UINT f_opcode; \
  UINT f_srcdst; \
  UINT f_src2; \
  UINT f_m3; \
  UINT f_m2; \
  UINT f_m1; \
  UINT f_opcode2; \
  UINT f_zero; \
  UINT f_src1; \
  unsigned int length;
#define EXTRACT_IFMT_MULO1_CODE \
  length = 4; \
  f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \
  f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \
  f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \
  f_m3 = EXTRACT_MSB0_UINT (insn, 32, 18, 1); \
  f_m2 = EXTRACT_MSB0_UINT (insn, 32, 19, 1); \
  f_m1 = EXTRACT_MSB0_UINT (insn, 32, 20, 1); \
  f_opcode2 = EXTRACT_MSB0_UINT (insn, 32, 21, 4); \
  f_zero = EXTRACT_MSB0_UINT (insn, 32, 25, 2); \
  f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); \

#define EXTRACT_IFMT_MULO2_VARS \
  UINT f_opcode; \
  UINT f_srcdst; \
  UINT f_src2; \
  UINT f_m3; \
  UINT f_m2; \
  UINT f_m1; \
  UINT f_opcode2; \
  UINT f_zero; \
  UINT f_src1; \
  unsigned int length;
#define EXTRACT_IFMT_MULO2_CODE \
  length = 4; \
  f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \
  f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \
  f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \
  f_m3 = EXTRACT_MSB0_UINT (insn, 32, 18, 1); \
  f_m2 = EXTRACT_MSB0_UINT (insn, 32, 19, 1); \
  f_m1 = EXTRACT_MSB0_UINT (insn, 32, 20, 1); \
  f_opcode2 = EXTRACT_MSB0_UINT (insn, 32, 21, 4); \
  f_zero = EXTRACT_MSB0_UINT (insn, 32, 25, 2); \
  f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); \

#define EXTRACT_IFMT_MULO3_VARS \
  UINT f_opcode; \
  UINT f_srcdst; \
  UINT f_src2; \
  UINT f_m3; \
  UINT f_m2; \
  UINT f_m1; \
  UINT f_opcode2; \
  UINT f_zero; \
  UINT f_src1; \
  unsigned int length;
#define EXTRACT_IFMT_MULO3_CODE \
  length = 4; \
  f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \
  f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \
  f_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \
  f_m3 = EXTRACT_MSB0_UINT (insn, 32, 18, 1); \
  f_m2 = EXTRACT_MSB0_UINT (insn, 32, 19, 1); \
  f_m1 = EXTRACT_MSB0_UINT (insn, 32, 20, 1); \
  f_opcode2 = EXTRACT_MSB0_UINT (insn, 32, 21, 4); \
  f_zero = EXTRACT_MSB0_UINT (insn, 32, 25, 2); \
  f_src1 = EXTRACT_MSB0_UINT (insn, 32, 27, 5); \

#define EXTRACT_IFMT_LDA_OFFSET_VARS \
  UINT f_opcode; \
  UINT f_srcdst; \
  UINT f_abase; \
  UINT f_modea; \
  UINT f_zeroa; \
  UINT f_offset; \
  unsigned int length;
#define EXTRACT_IFMT_LDA_OFFSET_CODE \
  length = 4; \
  f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \
  f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \
  f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \
  f_modea = EXTRACT_MSB0_UINT (insn, 32, 18, 1); \
  f_zeroa = EXTRACT_MSB0_UINT (insn, 32, 19, 1); \
  f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); \

#define EXTRACT_IFMT_LDA_INDIRECT_VARS \
  UINT f_opcode; \
  UINT f_srcdst; \
  UINT f_abase; \
  UINT f_modeb; \
  UINT f_scale; \
  UINT f_zerob; \
  UINT f_index; \
  unsigned int length;
#define EXTRACT_IFMT_LDA_INDIRECT_CODE \
  length = 4; \
  f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \
  f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \
  f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \
  f_modeb = EXTRACT_MSB0_UINT (insn, 32, 18, 4); \
  f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); \
  f_zerob = EXTRACT_MSB0_UINT (insn, 32, 25, 2); \
  f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); \

#define EXTRACT_IFMT_LDA_DISP_VARS \
  UINT f_opcode; \
  UINT f_optdisp; \
  UINT f_srcdst; \
  UINT f_abase; \
  UINT f_modeb; \
  UINT f_scale; \
  UINT f_zerob; \
  UINT f_index; \
  /* Contents of trailing part of insn.  */ \
  UINT word_1; \
  unsigned int length;
#define EXTRACT_IFMT_LDA_DISP_CODE \
  length = 8; \
  word_1 = GETIMEMUSI (current_cpu, pc + 4); \
  f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \
  f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); \
  f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \
  f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \
  f_modeb = EXTRACT_MSB0_UINT (insn, 32, 18, 4); \
  f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); \
  f_zerob = EXTRACT_MSB0_UINT (insn, 32, 25, 2); \
  f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); \

#define EXTRACT_IFMT_ST_OFFSET_VARS \
  UINT f_opcode; \
  UINT f_srcdst; \
  UINT f_abase; \
  UINT f_modea; \
  UINT f_zeroa; \
  UINT f_offset; \
  unsigned int length;
#define EXTRACT_IFMT_ST_OFFSET_CODE \
  length = 4; \
  f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \
  f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \
  f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \
  f_modea = EXTRACT_MSB0_UINT (insn, 32, 18, 1); \
  f_zeroa = EXTRACT_MSB0_UINT (insn, 32, 19, 1); \
  f_offset = EXTRACT_MSB0_UINT (insn, 32, 20, 12); \

#define EXTRACT_IFMT_ST_INDIRECT_VARS \
  UINT f_opcode; \
  UINT f_srcdst; \
  UINT f_abase; \
  UINT f_modeb; \
  UINT f_scale; \
  UINT f_zerob; \
  UINT f_index; \
  unsigned int length;
#define EXTRACT_IFMT_ST_INDIRECT_CODE \
  length = 4; \
  f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \
  f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \
  f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \
  f_modeb = EXTRACT_MSB0_UINT (insn, 32, 18, 4); \
  f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); \
  f_zerob = EXTRACT_MSB0_UINT (insn, 32, 25, 2); \
  f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); \

#define EXTRACT_IFMT_ST_DISP_VARS \
  UINT f_opcode; \
  UINT f_optdisp; \
  UINT f_srcdst; \
  UINT f_abase; \
  UINT f_modeb; \
  UINT f_scale; \
  UINT f_zerob; \
  UINT f_index; \
  /* Contents of trailing part of insn.  */ \
  UINT word_1; \
  unsigned int length;
#define EXTRACT_IFMT_ST_DISP_CODE \
  length = 8; \
  word_1 = GETIMEMUSI (current_cpu, pc + 4); \
  f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \
  f_optdisp = (0|(EXTRACT_MSB0_UINT (word_1, 32, 0, 32) << 0)); \
  f_srcdst = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \
  f_abase = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \
  f_modeb = EXTRACT_MSB0_UINT (insn, 32, 18, 4); \
  f_scale = EXTRACT_MSB0_UINT (insn, 32, 22, 3); \
  f_zerob = EXTRACT_MSB0_UINT (insn, 32, 25, 2); \
  f_index = EXTRACT_MSB0_UINT (insn, 32, 27, 5); \

#define EXTRACT_IFMT_CMPOBE_REG_VARS \
  UINT f_opcode; \
  UINT f_br_src1; \
  UINT f_br_src2; \
  UINT f_br_m1; \
  SI f_br_disp; \
  UINT f_br_zero; \
  unsigned int length;
#define EXTRACT_IFMT_CMPOBE_REG_CODE \
  length = 4; \
  f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \
  f_br_src1 = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \
  f_br_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \
  f_br_m1 = EXTRACT_MSB0_UINT (insn, 32, 18, 1); \
  f_br_disp = ((((EXTRACT_MSB0_INT (insn, 32, 19, 11)) << (2))) + (pc)); \
  f_br_zero = EXTRACT_MSB0_UINT (insn, 32, 30, 2); \

#define EXTRACT_IFMT_CMPOBE_LIT_VARS \
  UINT f_opcode; \
  UINT f_br_src1; \
  UINT f_br_src2; \
  UINT f_br_m1; \
  SI f_br_disp; \
  UINT f_br_zero; \
  unsigned int length;
#define EXTRACT_IFMT_CMPOBE_LIT_CODE \
  length = 4; \
  f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \
  f_br_src1 = EXTRACT_MSB0_UINT (insn, 32, 8, 5); \
  f_br_src2 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); \
  f_br_m1 = EXTRACT_MSB0_UINT (insn, 32, 18, 1); \
  f_br_disp = ((((EXTRACT_MSB0_INT (insn, 32, 19, 11)) << (2))) + (pc)); \
  f_br_zero = EXTRACT_MSB0_UINT (insn, 32, 30, 2); \

#define EXTRACT_IFMT_BNO_VARS \
  UINT f_opcode; \
  SI f_ctrl_disp; \
  UINT f_ctrl_zero; \
  unsigned int length;
#define EXTRACT_IFMT_BNO_CODE \
  length = 4; \
  f_opcode = EXTRACT_MSB0_UINT (insn, 32, 0, 8); \
  f_ctrl_disp = ((((EXTRACT_MSB0_INT (insn, 32, 8, 22)) << (2))) + (pc)); \
  f_ctrl_zero = EXTRACT_MSB0_UINT (insn, 32, 30, 2); \

/* Collection of various things for the trace handler to use.  */

typedef struct trace_record {
  IADDR pc;
  /* FIXME:wip */
} TRACE_RECORD;

#endif /* CPU_I960BASE_H */