compile.c

这个是LINUX下的GDB调度工具的源码

/*
 * Simulator for the Renesas (formerly Hitachi) H8/300 architecture.
 *
 * Written by Steve Chamberlain of Cygnus Support. [e-mail]
 *
 * This file is part of H8/300 sim
 *
 *
 * THIS SOFTWARE IS NOT COPYRIGHTED
 *
 * Cygnus offers the following for use in the public domain.  Cygnus makes no
 * warranty with regard to the software or its performance and the user
 * accepts the software "AS IS" with all faults.
 *
 * CYGNUS DISCLAIMS ANY WARRANTIES, EXPRESS OR IMPLIED, WITH REGARD TO THIS
 * SOFTWARE INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.
 */

#include <signal.h>
#ifdef HAVE_TIME_H
#include <time.h>
#endif
#ifdef HAVE_STDLIB_H
#include <stdlib.h>
#endif
#ifdef HAVE_SYS_PARAM_H
#include <sys/param.h>
#endif

#include "bfd.h"
#include "sim-main.h"
#include "gdb/sim-h8300.h"
#include "sys/stat.h"
#include "sys/types.h"

#ifndef SIGTRAP
# define SIGTRAP 5
#endif

int debug;

host_callback *sim_callback;

static SIM_OPEN_KIND sim_kind;
static char *myname;

/* FIXME: Needs to live in header file.
   This header should also include the things in remote-sim.h.
   One could move this to remote-sim.h but this function isn't needed
   by gdb.  */
static void set_simcache_size (SIM_DESC, int);

#define X(op, size)  (op * 4 + size)

#define SP (h8300hmode && !h8300_normal_mode ? SL : SW)

#define h8_opcodes ops
#define DEFINE_TABLE
#include "opcode/h8300.h"

/* CPU data object: */

static int
sim_state_initialize (SIM_DESC sd, sim_cpu *cpu)
{
  /* FIXME: not really necessary, since sim_cpu_alloc calls zalloc.  */

  memset (&cpu->regs, 0, sizeof(cpu->regs));
  cpu->regs[SBR_REGNUM] = 0xFFFFFF00;
  cpu->pc = 0;
  cpu->delayed_branch = 0;
  cpu->memory = NULL;
  cpu->eightbit = NULL;
  cpu->mask = 0;

  /* Initialize local simulator state.  */
  sd->sim_cache = NULL;
  sd->sim_cache_size = 0;
  sd->cache_idx = NULL;
  sd->cache_top = 0;
  sd->memory_size = 0;
  sd->compiles = 0;
#ifdef ADEBUG
  memset (&cpu->stats, 0, sizeof (cpu->stats));
#endif
  return 0;
}

static unsigned int
h8_get_pc (SIM_DESC sd)
{
  return (STATE_CPU (sd, 0)) -> pc;
}

static void
h8_set_pc (SIM_DESC sd, unsigned int val)
{
  (STATE_CPU (sd, 0)) -> pc = val;
}

static unsigned int
h8_get_ccr (SIM_DESC sd)
{
  return (STATE_CPU (sd, 0)) -> regs[CCR_REGNUM];
}

static void
h8_set_ccr (SIM_DESC sd, unsigned int val)
{
  (STATE_CPU (sd, 0)) -> regs[CCR_REGNUM] = val;
}

static unsigned int
h8_get_exr (SIM_DESC sd)
{
  return (STATE_CPU (sd, 0)) -> regs[EXR_REGNUM];
}

static void
h8_set_exr (SIM_DESC sd, unsigned int val)
{
  (STATE_CPU (sd, 0)) -> regs[EXR_REGNUM] = val;
}

static int
h8_get_sbr (SIM_DESC sd)
{
  return (STATE_CPU (sd, 0)) -> regs[SBR_REGNUM];
}

static void
h8_set_sbr (SIM_DESC sd, int val)
{
  (STATE_CPU (sd, 0)) -> regs[SBR_REGNUM] = val;
}

static int
h8_get_vbr (SIM_DESC sd)
{
  return (STATE_CPU (sd, 0)) -> regs[VBR_REGNUM];
}

static void
h8_set_vbr (SIM_DESC sd, int val)
{
  (STATE_CPU (sd, 0)) -> regs[VBR_REGNUM] = val;
}

static int
h8_get_cache_top (SIM_DESC sd)
{
  return sd -> cache_top;
}

static void
h8_set_cache_top (SIM_DESC sd, int val)
{
  sd -> cache_top = val;
}

static int
h8_get_mask (SIM_DESC sd)
{
  return (STATE_CPU (sd, 0)) -> mask;
}

static void
h8_set_mask (SIM_DESC sd, int val)
{
  (STATE_CPU (sd, 0)) -> mask = val;
}
#if 0
static int
h8_get_exception (SIM_DESC sd)
{
  return (STATE_CPU (sd, 0)) -> exception;
}

static void
h8_set_exception (SIM_DESC sd, int val)
{
  (STATE_CPU (sd, 0)) -> exception = val;
}

static enum h8300_sim_state
h8_get_state (SIM_DESC sd)
{
  return sd -> state;
}

static void
h8_set_state (SIM_DESC sd, enum h8300_sim_state val)
{
  sd -> state = val;
}
#endif
static unsigned int
h8_get_cycles (SIM_DESC sd)
{
  return (STATE_CPU (sd, 0)) -> regs[CYCLE_REGNUM];
}

static void
h8_set_cycles (SIM_DESC sd, unsigned int val)
{
  (STATE_CPU (sd, 0)) -> regs[CYCLE_REGNUM] = val;
}

static unsigned int
h8_get_insts (SIM_DESC sd)
{
  return (STATE_CPU (sd, 0)) -> regs[INST_REGNUM];
}

static void
h8_set_insts (SIM_DESC sd, unsigned int val)
{
  (STATE_CPU (sd, 0)) -> regs[INST_REGNUM] = val;
}

static unsigned int
h8_get_ticks (SIM_DESC sd)
{
  return (STATE_CPU (sd, 0)) -> regs[TICK_REGNUM];
}

static void
h8_set_ticks (SIM_DESC sd, unsigned int val)
{
  (STATE_CPU (sd, 0)) -> regs[TICK_REGNUM] = val;
}

static unsigned int
h8_get_mach (SIM_DESC sd)
{
  return (STATE_CPU (sd, 0)) -> regs[MACH_REGNUM];
}

static void
h8_set_mach (SIM_DESC sd, unsigned int val)
{
  (STATE_CPU (sd, 0)) -> regs[MACH_REGNUM] = val;
}

static unsigned int
h8_get_macl (SIM_DESC sd)
{
  return (STATE_CPU (sd, 0)) -> regs[MACL_REGNUM];
}

static void
h8_set_macl (SIM_DESC sd, unsigned int val)
{
  (STATE_CPU (sd, 0)) -> regs[MACL_REGNUM] = val;
}

static int
h8_get_compiles (SIM_DESC sd)
{
  return sd -> compiles;
}

static void
h8_increment_compiles (SIM_DESC sd)
{
  sd -> compiles ++;
}

static unsigned int *
h8_get_reg_buf (SIM_DESC sd)
{
  return &(((STATE_CPU (sd, 0)) -> regs)[0]);
}

static unsigned int
h8_get_reg (SIM_DESC sd, int regnum)
{
  return (STATE_CPU (sd, 0)) -> regs[regnum];
}

static void
h8_set_reg (SIM_DESC sd, int regnum, int val)
{
  (STATE_CPU (sd, 0)) -> regs[regnum] = val;
}

#ifdef ADEBUG
static int
h8_get_stats (SIM_DESC sd, int idx)
{
  return sd -> stats[idx];
}

static void
h8_increment_stats (SIM_DESC sd, int idx)
{
  sd -> stats[idx] ++;
}
#endif /* ADEBUG */

static unsigned short *
h8_get_cache_idx_buf (SIM_DESC sd)
{
  return sd -> cache_idx;
}

static void
h8_set_cache_idx_buf (SIM_DESC sd, unsigned short *ptr)
{
  sd -> cache_idx = ptr;
}

static unsigned short
h8_get_cache_idx (SIM_DESC sd, unsigned int idx)
{
  if (idx > sd->memory_size)
    return (unsigned short) -1;
  return sd -> cache_idx[idx];
}

static void
h8_set_cache_idx (SIM_DESC sd, int idx, unsigned int val)
{
  sd -> cache_idx[idx] = (unsigned short) val;
}

static unsigned char *
h8_get_memory_buf (SIM_DESC sd)
{
  return (STATE_CPU (sd, 0)) -> memory;
}

static void
h8_set_memory_buf (SIM_DESC sd, unsigned char *ptr)
{
  (STATE_CPU (sd, 0)) -> memory = ptr;
}

static unsigned char
h8_get_memory (SIM_DESC sd, int idx)
{
  return (STATE_CPU (sd, 0)) -> memory[idx];
}

static void
h8_set_memory (SIM_DESC sd, int idx, unsigned int val)
{
  (STATE_CPU (sd, 0)) -> memory[idx] = (unsigned char) val;
}

static unsigned char *
h8_get_eightbit_buf (SIM_DESC sd)
{
  return (STATE_CPU (sd, 0)) -> eightbit;
}

static void
h8_set_eightbit_buf (SIM_DESC sd, unsigned char *ptr)
{
  (STATE_CPU (sd, 0)) -> eightbit = ptr;
}

static unsigned char
h8_get_eightbit (SIM_DESC sd, int idx)
{
  return (STATE_CPU (sd, 0)) -> eightbit[idx];
}

static void
h8_set_eightbit (SIM_DESC sd, int idx, unsigned int val)
{
  (STATE_CPU (sd, 0)) -> eightbit[idx] = (unsigned char) val;
}

static unsigned int
h8_get_delayed_branch (SIM_DESC sd)
{
  return (STATE_CPU (sd, 0)) -> delayed_branch;
}

static void
h8_set_delayed_branch (SIM_DESC sd, unsigned int dest)
{
  (STATE_CPU (sd, 0)) -> delayed_branch = dest;
}

static char **
h8_get_command_line (SIM_DESC sd)
{
  return (STATE_CPU (sd, 0)) -> command_line;
}

static void
h8_set_command_line (SIM_DESC sd, char ** val)
{
  (STATE_CPU (sd, 0)) -> command_line = val;
}

static char *
h8_get_cmdline_arg (SIM_DESC sd, int index)
{
  return (STATE_CPU (sd, 0)) -> command_line[index];
}

static void
h8_set_cmdline_arg (SIM_DESC sd, int index, char * val)
{
  (STATE_CPU (sd, 0)) -> command_line[index] = val;
}

/* MAC Saturation Mode */
static int
h8_get_macS (SIM_DESC sd)
{
  return (STATE_CPU (sd, 0)) -> macS;
}

static void
h8_set_macS (SIM_DESC sd, int val)
{
  (STATE_CPU (sd, 0)) -> macS = (val != 0);
}

/* MAC Zero Flag */
static int
h8_get_macZ (SIM_DESC sd)
{
  return (STATE_CPU (sd, 0)) -> macZ;
}

static void
h8_set_macZ (SIM_DESC sd, int val)
{
  (STATE_CPU (sd, 0)) -> macZ = (val != 0);
}

/* MAC Negative Flag */
static int
h8_get_macN (SIM_DESC sd)
{
  return (STATE_CPU (sd, 0)) -> macN;
}

static void
h8_set_macN (SIM_DESC sd, int val)
{
  (STATE_CPU (sd, 0)) -> macN = (val != 0);
}

/* MAC Overflow Flag */
static int
h8_get_macV (SIM_DESC sd)
{
  return (STATE_CPU (sd, 0)) -> macV;
}

static void
h8_set_macV (SIM_DESC sd, int val)
{
  (STATE_CPU (sd, 0)) -> macV = (val != 0);
}

/* End CPU data object.  */

/* The rate at which to call the host's poll_quit callback.  */

enum { POLL_QUIT_INTERVAL = 0x80000 };

#define LOW_BYTE(x) ((x) & 0xff)
#define HIGH_BYTE(x) (((x) >> 8) & 0xff)
#define P(X, Y) ((X << 8) | Y)

#define C (c != 0)
#define Z (nz == 0)
#define V (v != 0)
#define N (n != 0)
#define U (u != 0)
#define H (h != 0)
#define UI (ui != 0)
#define I (intMaskBit != 0)

#define BUILDSR(SD)						\
  h8_set_ccr (SD, (I << 7) | (UI << 6) | (H << 5) | (U << 4)	\
	     | (N << 3) | (Z << 2) | (V << 1) | C)

#define GETSR(SD) \
  /* Get Status Register (flags).  */		\
  c = (h8_get_ccr (sd) >> 0) & 1;		\
  v = (h8_get_ccr (sd) >> 1) & 1;		\
  nz = !((h8_get_ccr (sd) >> 2) & 1);		\
  n = (h8_get_ccr (sd) >> 3) & 1;		\
  u = (h8_get_ccr (sd) >> 4) & 1;		\
  h = (h8_get_ccr (sd) >> 5) & 1;		\
  ui = ((h8_get_ccr (sd) >> 6) & 1);		\
  intMaskBit = (h8_get_ccr (sd) >> 7) & 1


#ifdef __CHAR_IS_SIGNED__
#define SEXTCHAR(x) ((char) (x))
#endif

#ifndef SEXTCHAR
#define SEXTCHAR(x) ((x & 0x80) ? (x | ~0xff) : x & 0xff)
#endif

#define UEXTCHAR(x) ((x) & 0xff)
#define UEXTSHORT(x) ((x) & 0xffff)
#define SEXTSHORT(x) ((short) (x))

int h8300hmode  = 0;
int h8300smode  = 0;
int h8300_normal_mode  = 0;
int h8300sxmode = 0;

static int memory_size;

static int
get_now (void)
{
  return time (0);	/* WinXX HAS UNIX like 'time', so why not use it? */
}

static int
now_persec (void)
{
  return 1;
}

static int
bitfrom (int x)
{
  switch (x & SIZE)
    {
    case L_8:
      return SB;
    case L_16:
    case L_16U:
      return SW;
    case L_32:
      return SL;
    case L_P:
      return (h8300hmode && !h8300_normal_mode)? SL : SW;
    }
  return 0;
}

/* Simulate an indirection / dereference.  
   return 0 for success, -1 for failure.
*/

static unsigned int
lvalue (SIM_DESC sd, int x, int rn, unsigned int *val)