simops.c

这个是LINUX下的GDB调度工具的源码

#include "config.h"

#include <signal.h>
#ifdef HAVE_UNISTD_H
#include <unistd.h>
#endif
#include "mn10200_sim.h"
#include "simops.h"
#include "targ-vals.h"
#include "bfd.h"
#include <errno.h>
#include <sys/stat.h>
#include <sys/times.h>
#include <sys/time.h>

#define REG0(X) ((X) & 0x3)
#define REG1(X) (((X) & 0xc) >> 2)
#define REG0_4(X) (((X) & 0x30) >> 4)
#define REG0_8(X) (((X) & 0x300) >> 8)
#define REG1_8(X) (((X) & 0xc00) >> 10)
#define REG0_16(X) (((X) & 0x30000) >> 16)
#define REG1_16(X) (((X) & 0xc0000) >> 18)
#define TRUNC(X) ((X) & 0xffffff)

/* mov imm8, dn */
void OP_8000 (insn, extension)
     unsigned long insn, extension;
{
  State.regs[REG_D0 + REG0_8 (insn)] = SEXT8 (insn & 0xff);
}

/* mov dn, dm */
void OP_80 (insn, extension)
     unsigned long insn, extension;
{
  State.regs[REG_D0 + REG0 (insn)] = State.regs[REG_D0 + REG1 (insn)];
}

/* mov dm, an */
void OP_F230 (insn, extension)
     unsigned long insn, extension;
{
  State.regs[REG_A0 + REG0 (insn)] = State.regs[REG_D0 + REG1 (insn)];
}

/* mov an, dm */
void OP_F2F0 (insn, extension)
     unsigned long insn, extension;
{
  State.regs[REG_D0 + REG0 (insn)] = State.regs[REG_A0 + REG1 (insn)];
}

/* mov an, am */
void OP_F270 (insn, extension)
     unsigned long insn, extension;
{
  State.regs[REG_A0 + REG0 (insn)] = State.regs[REG_A0 + REG1 (insn)];
}

/* mov psw, dn */
void OP_F3F0 (insn, extension)
     unsigned long insn, extension;
{
  State.regs[REG_D0 + REG0 (insn)] = PSW & 0xffff;
}

/* mov dn, psw */
void OP_F3D0 (insn, extension)
     unsigned long insn, extension;
{
  PSW = State.regs[REG_D0 + REG1 (insn)] & 0xffff ;
}

/* mov mdr, dn */
void OP_F3E0 (insn, extension)
     unsigned long insn, extension;
{
  State.regs[REG_D0 + REG0 (insn)] = State.regs[REG_MDR] & 0xffff;
}

/* mov dn, mdr */
void OP_F3C0 (insn, extension)
     unsigned long insn, extension;
{
  State.regs[REG_MDR] = State.regs[REG_D0 + REG1 (insn)] & 0xffff;
}

/* mov (an), dm */
void OP_20 (insn, extension)
     unsigned long insn, extension;
{
  State.regs[REG_D0 + REG0 (insn)]
    = SEXT16 (load_half (State.regs[REG_A0 + REG1 (insn)]));
}

/* mov (d8,an), dm */
void OP_6000 (insn, extension)
     unsigned long insn, extension;
{
  State.regs[REG_D0 + REG0_8 (insn)]
    = SEXT16 (load_half ((State.regs[REG_A0 + REG1_8 (insn)]
			 + SEXT8 (insn & 0xff))));
}

/* mov (d16,an), dm */
void OP_F7C00000 (insn, extension)
     unsigned long insn, extension;
{
  State.regs[REG_D0 + REG0_16 (insn)]
    = SEXT16 (load_half ((State.regs[REG_A0 + REG1_16 (insn)]
	      + SEXT16 (insn & 0xffff))));
}

/* mov (d24,am), dn */
void OP_F4800000 (insn, extension)
     unsigned long insn, extension;
{
  State.regs[REG_D0 + REG0_16 (insn)]
    = SEXT16 (load_half ((State.regs[REG_A0 + REG1_16 (insn)]
			 + SEXT24 (((insn & 0xffff) << 8) + extension))));
}

/* mov (di,an), dm */
void OP_F140 (insn, extension)
     unsigned long insn, extension;
{
  State.regs[REG_D0 + REG0 (insn)]
    = SEXT16 (load_half ((State.regs[REG_A0 + REG1 (insn)]
			 + State.regs[REG_D0 + REG0_4 (insn)])));
}

/* mov (abs16), dn */
void OP_C80000 (insn, extension)
     unsigned long insn, extension;
{
  State.regs[REG_D0 + REG0_16 (insn)] = SEXT16 (load_half ((insn & 0xffff)));
}

/* mov (abs24), dn */
void OP_F4C00000 (insn, extension)
     unsigned long insn, extension;
{
  State.regs[REG_D0 + REG0_16 (insn)]
    = SEXT16 (load_half ((((insn & 0xffff) << 8) + extension)));
}

/* mov (d8,an), am */
void OP_7000 (insn, extension)
     unsigned long insn, extension;
{
  State.regs[REG_A0 + REG0_8 (insn)]
    = SEXT24 (load_3_byte ((State.regs[REG_A0 + REG1_8 (insn)]
			 + SEXT8 (insn & 0xff))));
}

/* mov (d16,an), am */
void OP_F7B00000 (insn, extension)
     unsigned long insn, extension;
{
  State.regs[REG_A0 + REG0_16 (insn)]
    = SEXT24 (load_3_byte ((State.regs[REG_A0 + REG1_16 (insn)]
			 + SEXT16 (insn & 0xffff))));
}

/* mov (d24,am), an */
void OP_F4F00000 (insn, extension)
     unsigned long insn, extension;
{
  State.regs[REG_A0 + REG0_16 (insn)]
    = SEXT24 (load_3_byte ((State.regs[REG_A0 + REG1_16 (insn)]
			   + SEXT24 (((insn & 0xffff) << 8) + extension))));
}

/* mov (di,an), am */
void OP_F100 (insn, extension)
     unsigned long insn, extension;
{
  State.regs[REG_A0 + REG0 (insn)]
    = SEXT24 (load_3_byte ((State.regs[REG_A0 + REG1 (insn)]
			   + State.regs[REG_D0 + REG0_4 (insn)])));
}

/* mov (abs16), an */
void OP_F7300000 (insn, extension)
     unsigned long insn, extension;
{
  State.regs[REG_A0 + REG0_16 (insn)] = SEXT24 (load_3_byte ((insn & 0xffff)));
}

/* mov (abs24), an */
void OP_F4D00000 (insn, extension)
     unsigned long insn, extension;
{
  State.regs[REG_A0 + REG0_16 (insn)]
    = SEXT24 (load_3_byte ((((insn & 0xffff) << 8) + extension)));
}

/* mov dm, (an) */
void OP_0 (insn, extension)
     unsigned long insn, extension;
{
  store_half (State.regs[REG_A0 + REG1 (insn)],
	      State.regs[REG_D0 + REG0 (insn)]);
}

/* mov dm, (d8,an) */
void OP_4000 (insn, extension)
     unsigned long insn, extension;
{
  store_half (State.regs[REG_A0 + REG1_8 (insn)] + SEXT8 (insn & 0xff),
	      State.regs[REG_D0 + REG0_8 (insn)]);
}

/* mov dm, (d16,an) */
void OP_F7800000 (insn, extension)
     unsigned long insn, extension;
{
  store_half (State.regs[REG_A0 + REG1_16 (insn)] + SEXT16 (insn & 0xffff),
	      State.regs[REG_D0 + REG0_16 (insn)]);
}

/* mov dm, (d24,am) */
void OP_F4000000 (insn, extension)
     unsigned long insn, extension;
{
  store_half ((State.regs[REG_A0 + REG1_16 (insn)]
	       + SEXT24 (((insn & 0xffff) << 8) + extension)),
	      State.regs[REG_D0 + REG0_16 (insn)]);
}

/* mov dm, (di,an) */
void OP_F1C0 (insn, extension)
     unsigned long insn, extension;
{
  store_half ((State.regs[REG_A0 + REG1 (insn)]
	       + State.regs[REG_D0 + REG0_4 (insn)]),
	      State.regs[REG_D0 + REG0 (insn)]);
}

/* mov dn, (abs16) */
void OP_C00000 (insn, extension)
     unsigned long insn, extension;
{
  store_half ((insn & 0xffff), State.regs[REG_D0 + REG0_16 (insn)]);
}

/* mov dn, (abs24) */
void OP_F4400000 (insn, extension)
     unsigned long insn, extension;
{
  store_half (SEXT24 (((insn & 0xffff) << 8) + extension),
	     State.regs[REG_D0 + REG0_16 (insn)]);
}

/* mov am, (d8,an) */
void OP_5000 (insn, extension)
     unsigned long insn, extension;
{
  store_3_byte (State.regs[REG_A0 + REG1_8 (insn)] + SEXT8 (insn & 0xff),
		State.regs[REG_A0 + REG0_8 (insn)]);
}

/* mov am, (d16,an) */
void OP_F7A00000 (insn, extension)
     unsigned long insn, extension;
{
  store_3_byte (State.regs[REG_A0 + REG1_16 (insn)] + SEXT16 (insn & 0xffff),
		State.regs[REG_A0 + REG0_16 (insn)]);
}

/* mov am, (d24,an) */
void OP_F4100000 (insn, extension)
     unsigned long insn, extension;
{
  store_3_byte ((State.regs[REG_A0 + REG1_16 (insn)]
		 + SEXT24 (((insn & 0xffff) << 8) + extension)),
		State.regs[REG_A0 + REG0_16 (insn)]);
}

/* mov am, (di,an) */
void OP_F180 (insn, extension)
     unsigned long insn, extension;
{
  store_3_byte ((State.regs[REG_A0 + REG1 (insn)]
	         + State.regs[REG_D0 + REG0_4 (insn)]),
		State.regs[REG_A0 + REG0 (insn)]);
}

/* mov an, (abs16) */
void OP_F7200000 (insn, extension)
     unsigned long insn, extension;
{
  store_3_byte ((insn & 0xffff), State.regs[REG_A0 + REG0_16 (insn)]);
}

/* mov an, (abs24) */
void OP_F4500000 (insn, extension)
     unsigned long insn, extension;
{
  store_3_byte (SEXT24 (((insn & 0xffff) << 8) + extension),
		State.regs[REG_A0 + REG0_16 (insn)]);
}

/* mov imm16, dn */
void OP_F80000 (insn, extension)
     unsigned long insn, extension;
{
  State.regs[REG_D0 + REG0_16 (insn)] = SEXT16 (insn & 0xffff);
}

/* mov imm24, dn */
void OP_F4700000 (insn, extension)
     unsigned long insn, extension;
{
  State.regs[REG_D0 + REG0_16 (insn)]
    = SEXT24 (((insn & 0xffff) << 8) + extension);
}

/* mov imm16, an */
void OP_DC0000 (insn, extension)
     unsigned long insn, extension;
{
  State.regs[REG_A0 + REG0_16 (insn)] = insn & 0xffff;
}

/* mov imm24, an */
void OP_F4740000 (insn, extension)
     unsigned long insn, extension;
{
  State.regs[REG_A0 + REG0_16 (insn)]
    = SEXT24 (((insn & 0xffff) << 8) + extension);
}

/* movx (d8,an), dm */
void OP_F57000 (insn, extension)
     unsigned long insn, extension;
{
  State.regs[REG_D0 + REG0_8 (insn)]
    = SEXT24 (load_3_byte ((State.regs[REG_A0 + REG1_8 (insn)]
			   + SEXT8 (insn & 0xff))));
}

/* movx (d16,an), dm */
void OP_F7700000 (insn, extension)
     unsigned long insn, extension;
{
  State.regs[REG_D0 + REG0_16 (insn)]
    = SEXT24 (load_3_byte ((State.regs[REG_A0 + REG1_16 (insn)]
			   + SEXT16 (insn & 0xffff))));
}

/* movx (d24,am), dn */
void OP_F4B00000 (insn, extension)
     unsigned long insn, extension;
{
  State.regs[REG_D0 + REG0_16 (insn)]
    = SEXT24 (load_3_byte ((State.regs[REG_A0 + REG1_16 (insn)]
			   + SEXT24 (((insn & 0xffff) << 8) + extension))));
}

/* movx dm, (d8,an) */
void OP_F55000 (insn, extension)
     unsigned long insn, extension;
{
  store_3_byte (State.regs[REG_A0 + REG1_8 (insn)] + SEXT8 (insn & 0xff),
		State.regs[REG_D0 + REG0_8 (insn)]);
}

/* movx dm, (d16,an) */
void OP_F7600000 (insn, extension)
     unsigned long insn, extension;
{
  store_3_byte (State.regs[REG_A0 + REG1_16 (insn)] + SEXT16 (insn & 0xffff),
		State.regs[REG_D0 + REG0_16 (insn)]);
}

/* movx dm, (d24,am) */
void OP_F4300000 (insn, extension)
     unsigned long insn, extension;
{
  store_3_byte ((State.regs[REG_A0 + REG1_16 (insn)]
		 + SEXT24 (((insn & 0xffff) << 8) + extension)),
		State.regs[REG_D0 + REG0_16 (insn)]);
}

/* movb (d8,an), dm */
void OP_F52000 (insn, extension)
     unsigned long insn, extension;
{
  State.regs[REG_D0 + REG0_8 (insn)]
    = SEXT8 (load_byte ((State.regs[REG_A0 + REG1_8 (insn)]
			+ SEXT8 (insn & 0xff))));
}

/* movb (d16,an), dm */
void OP_F7D00000 (insn, extension)
     unsigned long insn, extension;
{
  State.regs[REG_D0 + REG0_16 (insn)]
    = SEXT8 (load_byte ((State.regs[REG_A0 + REG1_16 (insn)]
			+ SEXT16 (insn & 0xffff))));
}

/* movb (d24,am), dn */
void OP_F4A00000 (insn, extension)
     unsigned long insn, extension;
{
  State.regs[REG_D0 + REG0_16 (insn)]
    = SEXT8 (load_byte ((State.regs[REG_A0 + REG1_16 (insn)]
			+ SEXT24 (((insn & 0xffff) << 8) + extension))));
}

/* movb (di,an), dm */
void OP_F040 (insn, extension)
     unsigned long insn, extension;
{
  State.regs[REG_D0 + REG0 (insn)]
    = SEXT8 (load_byte ((State.regs[REG_A0 + REG1 (insn)]
			+ State.regs[REG_D0 + REG0_4 (insn)])));
}

/* mov (abs24), dn */
void OP_F4C40000 (insn, extension)
     unsigned long insn, extension;
{
  State.regs[REG_D0 + REG0_16 (insn)]
    = SEXT8 (load_byte ((((insn & 0xffff) << 8) + extension)));
}

/* movb dm, (an) */
void OP_10 (insn, extension)
     unsigned long insn, extension;
{
  store_byte (State.regs[REG_A0 + REG1 (insn)],
	      State.regs[REG_D0 + REG0 (insn)]);
}

/* movb dm, (d8,an) */
void OP_F51000 (insn, extension)
     unsigned long insn, extension;
{
  store_byte (State.regs[REG_A0 + REG1_8 (insn)] + SEXT8 (insn & 0xff),
	      State.regs[REG_D0 + REG0_8 (insn)]);
}

/* movb dm, (d16,an) */
void OP_F7900000 (insn, extension)
     unsigned long insn, extension;
{
  store_byte (State.regs[REG_A0 + REG1_16 (insn)] + SEXT16 (insn & 0xffff),
	      State.regs[REG_D0 + REG0_16 (insn)]);
}

/* movb dm, (d24,am) */
void OP_F4200000 (insn, extension)