dv-m68hc11eepr.c

这个是LINUX下的GDB调度工具的源码

  me->to_ioctl = m68hc11eepr_ioctl;
#endif

  attach_m68hc11eepr_regs (me, controller);
}
 


static io_reg_desc pprog_desc[] = {
  { M6811_BYTE,  "BYTE  ", "Byte Program Mode" },
  { M6811_ROW,   "ROW   ", "Row Program Mode" },
  { M6811_ERASE, "ERASE ", "Erase Mode" },
  { M6811_EELAT, "EELAT ", "EEProm Latch Control" },
  { M6811_EEPGM, "EEPGM ", "EEProm Programming Voltable Enable" },
  { 0,  0, 0 }
};
extern io_reg_desc config_desc[];


/* Describe the state of the EEPROM device.  */
static void
m68hc11eepr_info (struct hw *me)
{
  SIM_DESC sd;
  uint16 base = 0;
  sim_cpu *cpu;
  struct m68hc11eepr *controller;
  uint8 val;
  
  sd         = hw_system (me);
  cpu        = STATE_CPU (sd, 0);
  controller = hw_data (me);
  base       = cpu_get_io_base (cpu);
  
  sim_io_printf (sd, "M68HC11 EEprom:\n");

  val = cpu->ios[M6811_PPROG];
  print_io_byte (sd, "PPROG  ", pprog_desc, val, base + M6811_PPROG);
  sim_io_printf (sd, "\n");

  val = cpu->ios[M6811_CONFIG];
  print_io_byte (sd, "CONFIG ", config_desc, val, base + M6811_CONFIG);
  sim_io_printf (sd, "\n");

  val = controller->eeprom[controller->size - 1];
  print_io_byte (sd, "(*NEXT*) ", config_desc, val, base + M6811_CONFIG);
  sim_io_printf (sd, "\n");
  
  /* Describe internal state of EEPROM.  */
  if (controller->eeprom_wmode)
    {
      if (controller->eeprom_waddr == controller->size - 1)
        sim_io_printf (sd, "  Programming CONFIG register ");
      else
        sim_io_printf (sd, "  Programming: 0x%04x ",
                       controller->eeprom_waddr + controller->base_address);

      sim_io_printf (sd, "with 0x%02x\n",
		     controller->eeprom_wbyte);
    }

  sim_io_printf (sd, "  EEProm file: %s\n",
                 controller->file_name);
}

static int
m68hc11eepr_ioctl (struct hw *me,
		   hw_ioctl_request request,
		   va_list ap)
{
  m68hc11eepr_info (me);
  return 0;
}

/* generic read/write */

static unsigned
m68hc11eepr_io_read_buffer (struct hw *me,
			    void *dest,
			    int space,
			    unsigned_word base,
			    unsigned nr_bytes)
{
  SIM_DESC sd;
  struct m68hc11eepr *controller;
  sim_cpu *cpu;
  
  HW_TRACE ((me, "read 0x%08lx %d", (long) base, (int) nr_bytes));

  sd         = hw_system (me);
  controller = hw_data (me);
  cpu        = STATE_CPU (sd, 0);

  if (space == io_map)
    {
      unsigned cnt = 0;
      
      while (nr_bytes != 0)
        {
          switch (base)
            {
            case M6811_PPROG:
            case M6811_CONFIG:
              *((uint8*) dest) = cpu->ios[base];
              break;

            default:
              hw_abort (me, "reading wrong register 0x%04x", base);
            }
          dest = (uint8*) (dest) + 1;
          base++;
          nr_bytes--;
          cnt++;
        }
      return cnt;
    }

  /* In theory, we can't read the EEPROM when it's being programmed.  */
  if ((cpu->ios[M6811_PPROG] & M6811_EELAT) != 0
      && cpu_is_running (cpu))
    {
      sim_memory_error (cpu, SIM_SIGBUS, base,
			"EEprom not configured for reading");
    }

  base = base - controller->base_address;
  memcpy (dest, &controller->eeprom[base], nr_bytes);
  return nr_bytes;
}


static unsigned
m68hc11eepr_io_write_buffer (struct hw *me,
			     const void *source,
			     int space,
			     unsigned_word base,
			     unsigned nr_bytes)
{
  SIM_DESC sd;
  struct m68hc11eepr *controller;
  sim_cpu *cpu;
  uint8 val;

  HW_TRACE ((me, "write 0x%08lx %d", (long) base, (int) nr_bytes));

  sd         = hw_system (me);
  controller = hw_data (me);
  cpu        = STATE_CPU (sd, 0);

  /* Programming several bytes at a time is not possible.  */
  if (space != io_map && nr_bytes != 1)
    {
      sim_memory_error (cpu, SIM_SIGBUS, base,
			"EEprom write error (only 1 byte can be programmed)");
      return 0;
    }
  
  if (nr_bytes != 1)
    hw_abort (me, "Cannot write more than 1 byte to EEPROM device at a time");

  val = *((const uint8*) source);

  /* Write to the EEPROM control register.  */
  if (space == io_map && base == M6811_PPROG)
    {
      uint8 wrong_bits;
      uint16 addr;
      
      addr = base + cpu_get_io_base (cpu);

      /* Setting EELAT and EEPGM at the same time is an error.
         Clearing them both is ok.  */
      wrong_bits = (cpu->ios[M6811_PPROG] ^ val) & val;
      wrong_bits &= (M6811_EELAT | M6811_EEPGM);

      if (wrong_bits == (M6811_EEPGM|M6811_EELAT))
	{
	  sim_memory_error (cpu, SIM_SIGBUS, addr,
			    "Wrong eeprom programing value");
	  return 0;
	}

      if ((val & M6811_EELAT) == 0)
	{
	  val = 0;
	}
      if ((val & M6811_EEPGM) && !(cpu->ios[M6811_PPROG] & M6811_EELAT))
	{
	  sim_memory_error (cpu, SIM_SIGBUS, addr,
			    "EEProm high voltage applied after EELAT");
	}
      if ((val & M6811_EEPGM) && controller->eeprom_wmode == 0)
	{
	  sim_memory_error (cpu, SIM_SIGSEGV, addr,
			    "EEProm high voltage applied without address");
	}
      if (val & M6811_EEPGM)
	{
	  controller->eeprom_wcycle = cpu_current_cycle (cpu);
	}
      else if (cpu->ios[M6811_PPROG] & M6811_PPROG)
	{
	  int i;
	  unsigned long t = cpu_current_cycle (cpu);

	  t -= controller->eeprom_wcycle;
	  if (t < controller->eeprom_min_cycles)
	    {
	      sim_memory_error (cpu, SIM_SIGILL, addr,
				"EEprom programmed only for %lu cycles",
				t);
	    }

	  /* Program the byte by clearing some bits.  */
	  if (!(cpu->ios[M6811_PPROG] & M6811_ERASE))
	    {
	      controller->eeprom[controller->eeprom_waddr]
		&= controller->eeprom_wbyte;
	    }

	  /* Erase a byte, row or the complete eeprom.  Erased value is 0xFF.
             Ignore row or complete eeprom erase when we are programming the
             CONFIG register (last EEPROM byte).  */
	  else if ((cpu->ios[M6811_PPROG] & M6811_BYTE)
                   || controller->eeprom_waddr == controller->size - 1)
	    {
	      controller->eeprom[controller->eeprom_waddr] = 0xff;
	    }
	  else if (cpu->ios[M6811_BYTE] & M6811_ROW)
	    {
              size_t max_size;

              /* Size of EEPROM (-1 because the last byte is the
                 CONFIG register.  */
              max_size = controller->size;
	      controller->eeprom_waddr &= 0xFFF0;
	      for (i = 0; i < 16
                     && controller->eeprom_waddr < max_size; i++)
		{
		  controller->eeprom[controller->eeprom_waddr] = 0xff;
		  controller->eeprom_waddr ++;
		}
	    }
	  else
	    {
              size_t max_size;

              max_size = controller->size;
	      for (i = 0; i < max_size; i++)
		{
		  controller->eeprom[i] = 0xff;
		}
	    }

	  /* Save the eeprom in a file.  We have to save after each
	     change because the simulator can be stopped or crash...  */
	  if (m6811eepr_memory_rw (controller, O_WRONLY | O_CREAT) != 0)
	    {
	      sim_memory_error (cpu, SIM_SIGABRT, addr,
				"EEPROM programing failed: errno=%d", errno);
	    }
	  controller->eeprom_wmode = 0;
	}
      cpu->ios[M6811_PPROG] = val;
      return 1;
    }

  /* The CONFIG IO register is mapped at end of EEPROM.
     It's not visible.  */
  if (space == io_map && base == M6811_CONFIG)
    {
      base = controller->size - 1;
    }
  else
    {
      base = base - controller->base_address;
    }

  /* Writing the memory is allowed for the Debugger or simulator
     (cpu not running).  */
  if (cpu_is_running (cpu))
    {
      if ((cpu->ios[M6811_PPROG] & M6811_EELAT) == 0)
	{
	  sim_memory_error (cpu, SIM_SIGSEGV, base,
			    "EEprom not configured for writing");
	  return 0;
	}
      if (controller->eeprom_wmode != 0)
	{
	  sim_memory_error (cpu, SIM_SIGSEGV, base,
			    "EEprom write error");
	  return 0;
	}
      controller->eeprom_wmode = 1;
      controller->eeprom_waddr = base;
      controller->eeprom_wbyte = val;
    }
  else
    {
      controller->eeprom[base] = val;
      m6811eepr_memory_rw (controller, O_WRONLY);
    }
  
  return 1;
}

const struct hw_descriptor dv_m68hc11eepr_descriptor[] = {
  { "m68hc11eepr", m68hc11eepr_finish },
  { "m68hc12eepr", m68hc11eepr_finish },
  { NULL },
};