dv-m68hc11eepr.c

这个是LINUX下的GDB调度工具的源码

/*  dv-m68hc11eepr.c -- Simulation of the 68HC11 Internal EEPROM.
    Copyright (C) 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
    Written by Stephane Carrez ([e-mail])
    (From a driver model Contributed by Cygnus Solutions.)
    
    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 2 of the License, or
    (at your option) any later version.
    
    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.
    
    You should have received a copy of the GNU General Public License
    along with this program; if not, write to the Free Software
    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
    
    */


#include "sim-main.h"
#include "hw-main.h"
#include "sim-assert.h"
#include "sim-events.h"

#include <unistd.h>
#include <fcntl.h>
#include <errno.h>



/* DEVICE

        m68hc11eepr - m68hc11 EEPROM

   
   DESCRIPTION

        Implements the 68HC11 eeprom device described in the m68hc11
        user guide (Chapter 4 in the pink book).


   PROPERTIES

   reg <base> <length>

        Base of eeprom and its length.

   file <path>

        Path of the EEPROM file.  The default is 'm6811.eeprom'.


   PORTS

        None

   */



/* static functions */


/* port ID's */

enum
{
  RESET_PORT
};


static const struct hw_port_descriptor m68hc11eepr_ports[] = 
{
  { "reset", RESET_PORT, 0, input_port, },
  { NULL, },
};



/* The timer/counter register internal state.  Note that we store
   state using the control register images, in host endian order.  */

struct m68hc11eepr 
{
  address_word  base_address; /* control register base */
  int           attach_space;
  unsigned      size;
  int           mapped;
  
  /* Current state of the eeprom programing:
     - eeprom_wmode indicates whether the EEPROM address and byte have
       been latched.
     - eeprom_waddr indicates the EEPROM address that was latched
       and eeprom_wbyte is the byte that was latched.
     - eeprom_wcycle indicates the CPU absolute cycle type when
       the high voltage was applied (successfully) on the EEPROM.
   
     These data members are setup only when we detect good EEPROM programing
     conditions (see Motorola EEPROM Programming and PPROG register usage).
     When the high voltage is switched off, we look at the CPU absolute
     cycle time to see if the EEPROM command must succeeds or not.
     The EEPROM content is updated and saved only at that time.
     (EEPROM command is: byte zero bits program, byte erase, row erase
     and bulk erase).
    
     The CONFIG register is programmed in the same way.  It is physically
     located at the end of the EEPROM (eeprom size + 1).  It is not mapped
     in memory but it's saved in the EEPROM file.  */
  unsigned long		eeprom_wcycle;
  uint16		eeprom_waddr;
  uint8			eeprom_wbyte;
  uint8			eeprom_wmode;

  uint8*		eeprom;
  
  /* Minimum time in CPU cycles for programming the EEPROM.  */
  unsigned long         eeprom_min_cycles;

  const char*           file_name;
};



/* Finish off the partially created hw device.  Attach our local
   callbacks.  Wire up our port names etc.  */

static hw_io_read_buffer_method m68hc11eepr_io_read_buffer;
static hw_io_write_buffer_method m68hc11eepr_io_write_buffer;
static hw_ioctl_method m68hc11eepr_ioctl;

/* Read or write the memory bank content from/to a file.
   Returns 0 if the operation succeeded and -1 if it failed.  */
static int
m6811eepr_memory_rw (struct m68hc11eepr *controller, int mode)
{
  const char *name = controller->file_name;
  int fd;
  size_t size;
  
  size = controller->size;
  fd = open (name, mode, 0644);
  if (fd < 0)
    {
      if (mode == O_RDONLY)
        {
          memset (controller->eeprom, 0xFF, size);
          /* Default value for CONFIG register (0xFF should be ok):
             controller->eeprom[size - 1] = M6811_NOSEC | M6811_NOCOP
                                            | M6811_ROMON | M6811_EEON;  */
          return 0;
        }
      return -1;
    }

  if (mode == O_RDONLY)
    {
      if (read (fd, controller->eeprom, size) != size)
	{
	  close (fd);
	  return -1;
	}
    }
  else
    {
      if (write (fd, controller->eeprom, size) != size)
	{
	  close (fd);
	  return -1;
	}
    }
  close (fd);

  return 0;
}




static void
attach_m68hc11eepr_regs (struct hw *me,
                         struct m68hc11eepr *controller)
{
  unsigned_word attach_address;
  int attach_space;
  unsigned attach_size;
  reg_property_spec reg;

  if (hw_find_property (me, "reg") == NULL)
    hw_abort (me, "Missing \"reg\" property");

  if (!hw_find_reg_array_property (me, "reg", 0, &reg))
    hw_abort (me, "\"reg\" property must contain one addr/size entry");

  hw_unit_address_to_attach_address (hw_parent (me),
				     &reg.address,
				     &attach_space,
				     &attach_address,
				     me);
  hw_unit_size_to_attach_size (hw_parent (me),
			       &reg.size,
			       &attach_size, me);

  /* Attach the two IO registers that control the EEPROM.
     The EEPROM is only attached at reset time because it may
     be enabled/disabled by the EEON bit in the CONFIG register.  */
  hw_attach_address (hw_parent (me), M6811_IO_LEVEL,
                     io_map, M6811_PPROG, 1, me);
  hw_attach_address (hw_parent (me), M6811_IO_LEVEL,
                     io_map, M6811_CONFIG, 1, me);

  if (hw_find_property (me, "file") == NULL)
    controller->file_name = "m6811.eeprom";
  else
    controller->file_name = hw_find_string_property (me, "file");
  
  controller->attach_space = attach_space;
  controller->base_address = attach_address;
  controller->eeprom = (char*) hw_malloc (me, attach_size + 1);
  controller->eeprom_min_cycles = 10000;
  controller->size = attach_size + 1;
  controller->mapped = 0;
  
  m6811eepr_memory_rw (controller, O_RDONLY);
}


/* An event arrives on an interrupt port.  */

static void
m68hc11eepr_port_event (struct hw *me,
                        int my_port,
                        struct hw *source,
                        int source_port,
                        int level)
{
  SIM_DESC sd;
  struct m68hc11eepr *controller;
  sim_cpu *cpu;
  
  controller = hw_data (me);
  sd         = hw_system (me);
  cpu        = STATE_CPU (sd, 0);
  switch (my_port)
    {
    case RESET_PORT:
      {
	HW_TRACE ((me, "EEPROM reset"));

        /* Re-read the EEPROM from the file.  This gives the chance
           to users to erase this file before doing a reset and have
           a fresh EEPROM taken into account.  */
        m6811eepr_memory_rw (controller, O_RDONLY);

        /* Reset the state of EEPROM programmer.  The CONFIG register
           is also initialized from the EEPROM/file content.  */
        cpu->ios[M6811_PPROG]    = 0;
        if (cpu->cpu_use_local_config)
          cpu->ios[M6811_CONFIG] = cpu->cpu_config;
        else
          cpu->ios[M6811_CONFIG]   = controller->eeprom[controller->size-1];
        controller->eeprom_wmode = 0;
        controller->eeprom_waddr = 0;
        controller->eeprom_wbyte = 0;

        /* Attach or detach to the bus depending on the EEPROM enable bit.
           The EEPROM CONFIG register is still enabled and can be programmed
           for a next configuration (taken into account only after a reset,
           see Motorola spec).  */
        if (!(cpu->ios[M6811_CONFIG] & M6811_EEON))
          {
            if (controller->mapped)
              hw_detach_address (hw_parent (me), M6811_EEPROM_LEVEL,
                                 controller->attach_space,
                                 controller->base_address,
                                 controller->size - 1,
                                 me);
            controller->mapped = 0;
          }
        else
          {
            if (!controller->mapped)
              hw_attach_address (hw_parent (me), M6811_EEPROM_LEVEL,
                                 controller->attach_space,
                                 controller->base_address,
                                 controller->size - 1,
                                 me);
            controller->mapped = 1;
          }
        break;
      }

    default:
      hw_abort (me, "Event on unknown port %d", my_port);
      break;
    }
}


static void
m68hc11eepr_finish (struct hw *me)
{
  struct m68hc11eepr *controller;

  controller = HW_ZALLOC (me, struct m68hc11eepr);
  set_hw_data (me, controller);
  set_hw_io_read_buffer (me, m68hc11eepr_io_read_buffer);
  set_hw_io_write_buffer (me, m68hc11eepr_io_write_buffer);
  set_hw_ports (me, m68hc11eepr_ports);
  set_hw_port_event (me, m68hc11eepr_port_event);
#ifdef set_hw_ioctl
  set_hw_ioctl (me, m68hc11eepr_ioctl);
#else