📄 changelog
字号:
* d30v-insns (bnot): Correctly reset bit in question. (do_trap): Use common system call emulation support, rather than our home grown support.Sun Nov 23 22:47:20 1997 Michael Meissner <meissner@cygnus.com> * d30v-insns (mvfacc): Immediate field is unsigned, allowing shifts of up to 63 to be encoded. Also do shift signed, rather than unsigned. * ic-d30v (IMM_6S): Add field for 6 bit unsigned constants. * d30v-insns (cmpu): Short cmpu zero extends immediate, not sign extends.Sat Nov 22 19:04:34 1997 Andrew Cagney <cagney@b1.cygnus.com> * d30v-insns (illegal, wrong_slot): Replace SIGILL with SIM_SIGILL. * sim-calls.c (signal.h): Do not include, replaced by sim-signal.h. * sim-main.h (signal.h): Do not include, include sim-signal.h instead.Fri Nov 21 09:33:54 1997 Andrew Cagney <cagney@b1.cygnus.com> * cpu.c (call_occurred): Use ZALLOC instead of xmalloc. (return_occurred): Use zfree instead of free.Wed Nov 19 13:28:09 1997 Michael Meissner <meissner@cygnus.com> * Makefile.in ({l,s}_{support,semantics}.o): Depend on the include files in $(ENGINE_H). * d30v-insns (do_{add,addc,sub,subb}): ALU_{ADD,SUB}_CA now takes a VAL argument to add/subtract along with the carry.Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com> * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).Tue Nov 18 13:56:15 1997 Michael Meissner <meissner@cygnus.com> * d30v-insns (do_trap): Change to new system call numbers. Add read emulation.Mon Nov 17 14:43:45 1997 Michael Meissner <meissner@cygnus.com> * d30v-insns (mulx): Add mulx instruction.Sun Nov 16 19:06:56 1997 Michael Meissner <meissner@cygnus.com> * cpu.c ({call,return}_occurred): New trace functions to mark function calls and returns and check whether all saved registers really were saved. * cpu.h ({call,return}_occurred): Add declaration. * d30v-insns ({bsr, jsr} patterns): Call call_occurred if --trace-debug to trace function calls. (jmp register pattern): If this is a jump r62 and --trace-debug, call return_occurred to trace function calls. (bsr{tnz,tzr}): Move setting r62 inside conditional against reg. (do_ld2w): Grab memory in 64-bit chunk, to check alignment. (do_st2w): Ditto.Sat Nov 15 20:57:57 1997 Michael Meissner <meissner@cygnus.com> * d30v-insns: Undo changes from Nov. 11, allowing for odd register pairs, since the machine doesn't support such usage. Trap on odd registers, rather than give a warning. Keep do_src and do_trap changes.Fri Nov 14 11:59:29 1997 Andrew Cagney <cagney@b1.cygnus.com> * d30v-insns (do_trap): Pacify compiler warnings for printf calls.Tue Nov 11 18:26:03 1997 Michael Meissner <meissner@cygnus.com> * d30v-insns (not_r63_reg): Rename from make_even_reg, only check for register being r63. Change callers ld2{h,w}, ld4bh{,u}. (get_reg_not_r63): Rename from get_even_reg, and only check for register r63. Change callers st2{w,h}, st4b. (do_src): Correct register pair for shift left. (do_trap): Temporarily make trap 30 print out the registers.Tue Nov 4 08:51:22 1997 Michael Meissner <meissner@cygnus.com> * d30v-insns (do_trap): Make trap 31 be used for system calls. Add primitive write and exit system calls. * Makefile (FILTER): New make variable to filter out known igen warnings. (tmp-igen): Add $(FILTER) on all 3 invocations of igen to filter out warnings that should be ignored by default.Fri Oct 31 19:36:51 1997 Andrew Cagney <cagney@b1.cygnus.com> * sim-calls.c (sim_open): Change EIT to memory region.Fri Oct 17 16:51:31 1997 Andrew Cagney <cagney@b1.cygnus.com> * alu.h (ALU16_END): Get result from ALU16_OVERFLOW_RESULT. (ALU32_END): Get result from ALU32_OVERFLOW_RESULT.Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com> * configure: Regenerated to track ../common/aclocal.m4 changes.Mon Sep 29 15:23:35 1997 Stu Grossman <grossman@babylon-5.cygnus.com> * d30v-insns (MVFSYS MVTSYS): Fix bit patterns so that these instructions get recognised.Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com> * configure: Regenerated to track ../common/aclocal.m4 changes.Wed Sep 24 17:51:43 1997 Stu Grossman <grossman@babylon-5.cygnus.com> * Makefile.in (SIM_OBJS): Add sim-break.o. * (INCLUDE_DEPS): Add tconfig.h. * alu.h (MEM STORE): Change to sim_core_read/write_unaligned to allow for trapping unaligned accesses. * cpu.h: Define SIM_BREAKPOINT as syscall 5 for intrinsic breakpoint mechanism. * d30v-insn (short syscall): Use syscall 5 for breakpoint insn. * sim-calls.c (sim_fetch_register sim_store_register): Implement. * tconfig.in: Define SIM_HAVE_BREAKPOINTS to enable intrinsic breakpoint mechanism. Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com> * configure: Regenerated to track ../common/aclocal.m4 changes.Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com> * Makefile.in (SIM_WARNINGS, SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN, SIM_RESERVED_BITS): Delete, moved to common. (SIM_EXTRA_CFLAGS): Update. Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com> * configure.in: Specify strict alignment. * configure: Regenerated to track ../common/aclocal.m4 changes.Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com> * configure: Regenerated to track ../common/aclocal.m4 changes.Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com> * configure: Regenerated to track ../common/aclocal.m4 changes.Fri Sep 12 16:13:04 1997 Andrew Cagney <cagney@b1.cygnus.com> * sim-calls.c (sim_open): Change memory to internal inst. RAM h'00000000-h'0000ffff (64KB) internal data RAM h'20000000-h'20007fff (32KB) external RAM h'80000000-h'803fffff (4MB) EIT h'fffff000-h'ffffffffThu Sep 11 08:59:34 1997 Andrew Cagney <cagney@b1.cygnus.com> * Makefile.in (SIM_OBJS): Add sim-hrw.o module. * sim-calls.c (sim_read): Delete. use sim-hrw. (sim_write): Delete, use sim-hrw. Tue Sep 9 01:36:20 1997 Andrew Cagney <cagney@b1.cygnus.com> * ic-d30v (imm_5): Update nr args passed to LSMASKED. * d30v-insns (do_sat, do_sath, do_sath_p, do_satz, do_satzh): Fix, computing the max sat value incorrectly.Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba> * configure: Regenerated to track ../common/aclocal.m4 changes.Fri Sep 5 09:15:33 1997 Andrew Cagney <cagney@b1.cygnus.com> * d30v-insns (do_mac, do_macs, do_msub, do_mulxs): Use explicit type cast instead of SIGNED64 macro.Thu Sep 4 10:28:45 1997 Andrew Cagney <cagney@b1.cygnus.com> * Makefile.in (SIM_OBJS): Include sim-memopt.o module. * sim-calls.c (sim_open): Pass zero modulo arg to sim_core_attach calls. (sim_open): If no memory, use memory commands to establish d30v ram. (d30v_option_handler): Delete, replased by sim-memopt.c. (sim_create_inferior): Call sim_module_init. * sim-main.h (struct sim_state): Remove members eit_ram, sizeof_eit_ram, external_ram, baseof_external_ram, sizeof_external_ram. Using generic memory model instead.Mon Sep 1 11:04:09 1997 Andrew Cagney <cagney@b1.cygnus.com> * sim-calls.c (sim_open): Use sim_state_alloc.Sat Aug 30 10:01:51 1997 Andrew Cagney <cagney@b1.cygnus.com> * sim-main.h (INVALID_INSTRUCTION_ADDRESS): Define. * engine.c (do_2_short): Compare with INVALID_INSTRUCTION_ADDRESS not -1.Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com> * configure: Regenerated to track ../common/aclocal.m4 changes. * config.in: Ditto.Wed Aug 27 13:41:54 1997 Andrew Cagney <cagney@b1.cygnus.com> * sim-calls.c (sim_open): Add call to sim_analyze_program, update call to sim_config. * sim-calls.c (sim_create_inferior): Add ABFD argument. Initialize CPU registers including PC. (sim_load): Delete, using sim-hload. * Makefile.in (SIM_OBJS): Add sim-hload.o module.Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com> * configure: Regenerated to track ../common/aclocal.m4 changes. * config.in: Ditto.Mon Aug 25 15:41:44 1997 Andrew Cagney <cagney@b1.cygnus.com> * sim-calls.c (sim_open): Add ABFD argument. (sim_open): Move sim_config call to after sim_parse_args. (sim_open): Check sim_config return status.Fri Aug 22 16:38:59 1997 Andrew Cagney <cagney@b1.cygnus.com> * d30v-insns (do_subh_ppp): Correct name, was do_sub_ppp. (do_subh_ppp): Compute rc=rb-src instead of src-rb. (do_addh_ppp): Ditto. Fri Jun 27 14:43:20 1997 Andrew Cagney <cagney@b1.cygnus.com> * d30v-insns (mvfsys, mvtsys): Switch instruction encodings, was wrong. Update handling of PSW[DS] bit. (dbt): Fix debug trap address. * cpu.h (NR_CONTROL_REGISTERS): Allow the full 64 registers.Tue Jun 24 12:41:55 1997 Andrew Cagney <cagney@b1.cygnus.com> * d30v-insns (DBT, RTD): Swap the stack after updating the PSW. (DBT): Use PSW_SET to update PSW. * alu.h (ALU16_END): Check for 16 bit carry and not 32 bit.Tue Jun 24 12:16:14 1997 Andrew Cagney <cagney@b2.cygnus.com> * d30v-insns (ppp, ccc, pp, XX, p): Update format functions so that they are of class %s instead of class function.Tue Jun 10 12:26:39 1997 Andrew Cagney <cagney@b1.cygnus.com> * sim-main.h (engine_error, engine_restart, engine_halt, engine_run_until_stop): Delete prototypes. Functions deleted earlier. (do_interrupt_handler): Add prototype. (sim_state): Add pending_event member to struct. * sim-calls.c (sim_open): Configure interrupt handler. * engine.c (d30v_interrupt_event): New function. Deliver external interrupt to processor. * d30v-insns (do_stack_swap): Move function from here. * engine.c (do_stack_swap): To here. * sim-main.h (do_stack_swap): Add prototype. * cpu.h (registers): Change current_sp to an int. * d30v-insn (do_stack_swap): Update. Thu Jun 5 12:54:35 1997 Andrew Cagney <cagney@b1.cygnus.com> * d30v-insns (LD*, ST*): Disasemble XX == 0 as immed version of instruction. (str_XXX): Fix case of XX == 3 - return "-".Thu Jun 5 12:54:35 1997 Andrew Cagney <cagney@b1.cygnus.com> * engine.c (sim_engine_run): Issuing L->R and R->L instructions in wrong order. * d30v-insn (CMPUcc imm long): With of RB field should be 6 not three. (MUL, MUL2H, MULHX): X field 01 instead of 10.Thu Jun 5 12:54:35 1997 Andrew Cagney <cagney@b1.cygnus.com> * d30v-insns (mvtsys): Don't modify DS bit when writing to PSW. (dbt, rtd): New instructions. * cpu.h (NR_CONTROL_REGISTERS): Now 15. (debug_program_status_word_cr, debug_program_counter_cr): Add debug control registers. Renumber other control registers. (PSW_DS): New PSW bit. (DPC, DPSW): Define.Wed May 28 13:45:47 1997 Andrew Cagney <cagney@b1.cygnus.com> * engine.c (sim_engine_run): Check the event queue on every cycle. * sim-calls.c (sim_size): Delete. (sim_do_command): Call sim_args_command. (sim_open): Move eit_ram and sizeof_eit_ram to sim_state struct. (simulation): Delete global now depend on sd argument. (sim_open): Initialize sim-watch. (d30v_option_handler): New function, parse mem-size argument.Tue May 27 14:03:38 1997 Andrew Cagney <cagney@b1.cygnus.com> * sim-calls.c (sim_set_callbacks): Delete. (sim_write): Pass NULL cpu arg to sim_core_write_buffer. * engine.c (engine_init): Delete. Handled in sim_open. (engine_create): Ditto. Tue May 20 10:15:35 1997 Andrew Cagney <cagney@b1.cygnus.com> * sim-calls.c (sim_open): Add callback argument. (sim_set_callbacks): Delete SIM_DESC argument.Mon May 19 14:59:32 1997 Andrew Cagney <cagney@b1.cygnus.com> * sim-calls.c (sim_open): Set the sim.base magic number.Fri May 16 15:25:59 1997 Andrew Cagney <cagney@b1.cygnus.com> * d30v-insns: Replace engine_error with common sim_engine_abort. * cpu.c (is_condition_ok, is_wrong_slot): Ditto. * engine.c (engine_run_until_stop): Rename this.
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -