changelog

这个是LINUX下的GDB调度工具的源码

	just pcdisp.

Mon Mar 30 20:30:00 1998  Fred Fish  <[e-mail]>

	* engine.c (sim_engine_run): Add at_loop_end.  Rework end of loop
	code to use this to both reset PSW_RP when needed and to set PC
	to RPT_S for another pass through the loop.

Mon Mar 30 16:12:00 1998  Fred Fish  <[e-mail]>

	* engine.c (sim_engine_run): Change code that handles RPT_* regs
	and PSW_RP bit in PSW so that PSW_RP is always set while executing
	the loop and loop terminates upon completion of the pass for which
	RPT_C is zero.  More closely follow logic in architecture manual.

Fri Mar 27 16:15:52 1998  Andrew Cagney  <[e-mail]>

	* configure: Regenerated to track ../common/aclocal.m4 changes.

Wed Mar 25 12:35:29 1998  Andrew Cagney  <[e-mail]>

	* configure: Regenerated to track ../common/aclocal.m4 changes.

Thu Mar 19 00:25:43 1998  Andrew Cagney  <[e-mail]>

	* sim-calls.c (sim_open): Move memory-region commands back to
 	before the call to sim_parse_args.
	(d30v_option_handler): Implement extmem-size option using
 	memory-delete and memory-region commands.

	* sim-calls.c (d30v_option_handler): Use ANSI-C argument list,
 	correct number and type of arguments.
	
Wed Mar 18 12:38:12 1998  Andrew Cagney  <[e-mail]>

	* configure: Regenerated to track ../common/aclocal.m4 changes.

Wed Mar 11 13:56:32 1998  Andrew Cagney  <[e-mail]>

	* alu.h (IMEM, MEM, STORE): Replace sim_core_*_map with exec_map,
 	read_map and write_map resp.

	* cpu.c (d30v_read_mem, d30v_write_mem): Ditto.

Mon Mar  2 13:34:08 1998  Fred Fish  <[e-mail]>

	* d30v-insns (do_repeat): Abort repeat instructions that have
	a repeat count of zero.

Fri Feb 27 18:44:12 1998  Doug Evans  <[e-mail]>

	* sim-calls.c (sim_open): Update call to sim_add_option_table.

Thu Feb 26 18:34:31 1998  Andrew Cagney  <[e-mail]>

	* sim-calls.c (sim_info): Delete.

Wed Feb 25 14:44:58 1998  Michael Meissner  <[e-mail]>

	* d30v-insns (mvtsys): If moving to EIT_VB register, and with
	valid bits.  Optimize code somewhat.

	* cpu.h (eit_vector_base_cr): New CR we need to special case.
	(EIT_VALID): Valid bits for EIT_VB register.
	
	* d30v-insns (mv{f,t}sys): When moving to/from PSWH, the value is
	in the low 16 bits of the register.

	* d30v-insns (do_sra): Use a common WRITE32_QUEUE to write back
	results.
	(do_sr{a,l}h): Do shift in 32 bits, only truncate when writing
	result back to the registers.

Tue Feb 24 18:09:52 1998  Fred Fish  <[e-mail]>

	* Makefile.in (tmp-igen): Use -G gen-zero-r0 option to force
	r0 to always be zero.
	* cpu.h (GPR_SET): Define.

Tue Feb 24 14:12:57 1998  Michael Meissner  <[e-mail]>

	* d30v-insns (do_sath): Do saturation in 32 bits, before
	converting to 16.
	(sat{,2h,z,hp}): Use imm_5, not imm to get proper zero extend.
	(do_sath_p): Delete, no longer used.
	(sathp): Call do_sath, not do_sath_p.

Mon Feb 23 15:55:14 1998  Michael Meissner  <[e-mail]>

	* d30v-insns (illegal,wrong_slot): Print \n after PC and before we
	call sim_engine_halt.
	(sr{a,l}hp): Implement missing instructions.
	(do_trap): Print high order PSW bits in human readable fashion.
	(do_{dbra{,i},dbsr{,i},djmp{,i},djsr{,i},repeat}): Set PSW bit RP.

	* alu.h (PSW_SET_QUEUE): New macro to set PSW bits.

	* engine.c (sim_engine_run): Check for RP bit being set, not RPT_C
	being > 0.  If RPT_C is decremented to 0, clear PSW RP bit.

Fri Feb 20 10:13:34 1998  Fred Fish  <[e-mail]>

	* cpu.h (BASE_ADDRESS): Change from 0xfffff000 to 0xfffff020.

Tue Feb 17 12:39:52 1998  Andrew Cagney  <[e-mail]>

	* sim-calls.c (sim_store_register, sim_fetch_register): Pass in
 	length parameter.  Return -1.

Fri Feb  6 17:39:54 1998  Michael Meissner  <[e-mail]>

	* d30v-insns (do_dbrai): Correct typo, use shift, not comparison.

Sun Feb  1 16:47:51 1998  Andrew Cagney  <[e-mail]>

	* configure: Regenerated to track ../common/aclocal.m4 changes.

Sat Jan 31 18:15:41 1998  Andrew Cagney  <[e-mail]>

	* configure: Regenerated to track ../common/aclocal.m4 changes.

Fri Jan 30 08:29:20 1998  Andrew Cagney  <[e-mail]>

	* engine.c (sim_engine_run): Add parameter nr_cpus.

Fri Jan 30 17:09:37 1998  Michael Meissner  <[e-mail]>

	* d30v-insns (jsrtzr): Check for register == 0, not != 0.

Wed Jan 21 17:52:04 1998  Andrew Cagney  <[e-mail]>

	* engine.c (do_stack_swap): Make type of new_sp unsigned.

Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>

	* configure: Regenerated to track ../common/aclocal.m4 changes.

Mon Jan  5 16:04:17 1998  Andrew Cagney  <[e-mail]>

	* sim-calls.c (sim_info): Call profile_print.

	* sim-main.h: Enable instruction profiling.

Thu Dec 18 12:21:38 1997  Michael Meissner  <[e-mail]>

	* alu.h (ALU{16,32}_END): Change setting PSW to only set the carry
	and overflow bits.  Don't look at the current value of PSW.
	(PSW_FLAG_SET_QUEUE): Only queue up setting the particular bit in
	question.  Don't look at the current value of PSW.

	* d30v-insns: All instructions that set the PSW, will only queue
	up the particular bits in question that were set by the
	instruction.  Don't look at the current value of PSW.

Wed Dec 17 11:41:44 1997  Michael Meissner  <[e-mail]>

	* cpu.h (PSW_VALID): Allow EA/DB to be set in the PSW.
	(DPSW_VALID): Like PSW_VALID, but it allows the DS bit to be set.

	* engine.c (trace_alu32): When changing BPSW/DPSW, print the
	special PSW bits.

	* d30v-insns (do_cmp_cc): Fix cmpps and cmpng.
	(do_cmp{,u}_cc): Print which cc value was used if not in switch
	statement.
	(do_cmpu_cc): Remove illegal cases CMPU{EQ,NE,PS,NG}.
	(mvtsys): When setting BPSW or DPSW, and with DPSW_VALID.

Tue Dec 16 18:17:26 1997  Michael Meissner  <[e-mail]>

	* d30v-insns (mulx2h): Add missing instruction.  Complain if
	register is not even.
	(do_{add,sub}h_ppp): Get correct high/low values.  Also correctly
	handle short immediates.
	(do_ld{2w,4bh}): Don't load r0 if ra == 0.

	* engine.c (d30v_interrupt_event): Remove unused variable
	(unqueue_writes): Ditto.

Mon Dec 15 23:17:11 1997  Andrew Cagney  <[e-mail]>

	* configure: Regenerated to track ../common/aclocal.m4 changes.
	* config.in: Ditto.

Sat Dec 13 23:40:17 1997  Michael Meissner  <[e-mail]>

	* cpu.h (_write{32,64}): New structures for keeping track of
	queued writes to registers.
	(_sim_cpu): Add _write{32,64} structures.  Make is_delayed_call
	unsigned32 also.
	(WRITE{32,64}*): New macros for queueing up writes to registers.

	* alu.h (ALU16_END): Take field that says whether we are setting
	the high or low half word.  Queue up changes to registers.
	(ALU32_END): Queue up changes to registers.
	(PSW_FLAG_SET_QUEUE): Like PSW_FLAG_SET, except queues it up.

	* sim-main.h (do_stack_swap): Remove declaration.

	* engine.c (do_stack_swap): Make static.
	(unqueue_writes): New function to unqueue all changes to 32 and 64
	bit registers in order.  Implement --trace-alu.  Reset high water
	marks for # of queued registers.  If PSW changed, possibly update
	stack pointer.
	(do_{long,2_short,parallel}): Unqueue register writes at the
	appropriate time.

	* d30v-insns: Modify all insns to queue changes to registers,
	rather than do them immediately so that parallel instructions get
	the right values for inputs.  Rewrite 16 bit operations to be done
	in terms of masked 32 bit registers.  Don't call do_stack_swap any
	more here.

Thu Dec 11 10:06:02 1997  Michael Meissner  <[e-mail]>

	* sim-calls.c (d30v_option_handler): Add support for --extmem-size
	to size external memory.
	(sim_open): Ditto.  Default if no --extmem-size option is 8 meg.

Wed Dec 10 01:08:24 1997  Jim Blandy  <[e-mail]>

	* d30v-insns (do_rot2h): Clip rotate amounts to four bits.  The
 	upper bits, and the sign of the rotation amount, are red herrings.
	(do_sra, do_srl): Handle shifts greater than 32 bits.
	(do_srah, do_sral): Properly sign-extend value and shift amount.
	Handle shifts larger than 16 bits.

Thu Dec  4 09:21:05 1997  Doug Evans  <[e-mail]>

	* configure: Regenerated to track ../common/aclocal.m4 changes.

Mon Dec  1 15:10:44 1997  Michael Meissner  <[e-mail]>

	* d30v-insns (do_sub2h): For short instruction, correctly
	dupplicate lower 16 bits of immediate in upper 16 bits.
	(sat2z): Fix typo that ignored the upper half of the register.
	(do_satz): If < 0, set *ra to 0, if not call do_sat.
	(mvtsys): Before setting PSW, and with PSW_VALID.

	* cpu.h (PSW_VALID): Mask for bits in PSW that is valid.

Mon Dec  1 15:05:03 1997  Andrew Cagney  <[e-mail]>
	
	* d30v-insns (do_trap): Pacify GCC - correct type of %ld arg in
 	printf, return dummy at end.
	
Mon Dec  1 15:05:03 1997  Andrew Cagney  <[e-mail]>

	* d30v-insns (do_add, do_addh_ppp, do_adds): Replace ALU_ADD with
 	ALU_ADDC.
	(do_addc): Replace ALU_SET_CARRY / ALU_ADD_CA with ALU_ADDC_C.
	(do_sub, do_subh_ppp): Replace ALU_SUB with ALU_SUBB.
	(do_subb): Replace ALU_SET_CARRY / ALU_SUB_CA with ALU_SUBB_B.

	* alu.h (ALU16_END): Use ALU16_HAD_CARRY_BORROW instead of
 	ALU16_HAD_CARRY.
	(ALU32_END): Ditto.

	* sim-main.h (string.h, strings.h): Include.
	
	* sim-calls.c: Delete inclusion of string.h and strings.h.
	
Sun Nov 30 17:29:25 1997  Michael Meissner  <[e-mail]>

	* configure.in (--enable-sim-trapdump): New switch to control
	whether traps 0..30 dump out the registers or do the real trap.
	* configure: Regenerate.

	* Makefile.in (SIM_EXTRA_CLFAGS): Add -DTRAPDUMP={0,1} if
	appropriate --{en,dis}able-sim-trapdump is done.

	* sim-calls.c (OPTION_TRACE_CALL): Rename from OPTION_CALL_TRACE.
	(OPTION_TRACE_TRAPDUMP): New option for --trace-trapdump.
	(d30v_option_handler): Add support for --trace-trapdump.
	(d30v_options): Ditto.
	(sim_open): Ditto.

	* d30v-insns (do_trap): Do register dump if --trace-trapdump and
	not the system call trap.  Remove support for calling old function
	sim_io_syscalls.

Sat Nov 29 18:54:55 1997  Michael Meissner  <[e-mail]>

	* cpu.h (_sim_cpu): Add trace_call_p, trace_action fields.
	(TRACE_CALL_P): Non-zero if --trace-call.
	(TRACE_ACTION): Non-zero if there is a tracing action at the end
	of processing an instruction boundary.
	(TRACE_ACTION_{CALL,RETURN}): Bits to say trace call & return.
	(d30v_next_insn): Delete, now trace_action field in cpu state.

	* cpu.c (d30v_next_insn): Delete, now trace_action field in cpu
	state.
	(return_occurred): Minimum saved register to check is now 34.

	* engine.c (sim_engine_run): Change call tracing to use
	trace_action field in cpu state.

	* sim-calls.c (d30v_option_handler): Handle d30v specific options.
	(d30v_options): D30V specific options.  Right now, --trace-call.
	(sim_open): Register d30v specific options.

	* d30v-insns (call, return insns): Move --trace-debug call/return
	tracing action to d30v specific --trace-call option.

Fri Nov 28 20:12:48 1997  Michael Meissner  <[e-mail]>

	* cpu.h (CREG): Rename from CR.

	* d30v-insns (do_{addc,subb}): Explicitly import the carry bit.
	(do_trap): Use CREG, not CR.  Switch to using cb_syscall.

Thu Nov 27 19:25:43 1997  Michael Meissner  <[e-mail]>

	* cpu.h (ACC): Define as short cut to accumulators.

	* d30v-insns (do_rot): Delete explicit function, use ROT32 to do
	rotate instruction.
	(do_trap): Make trap 30 print out accumulators and first 16
	control registers as well.
	(do_avg): Sign extend to 64 bit type before doing add/shift.
	(do_avg2h): Sign extend 16 bit chunks before doing add/shift.

Wed Nov 26 15:20:24 1997  Doug Evans  <[e-mail]>

	* Makefile.in (NL_TARGET): Define.

Wed Nov 26 16:55:38 1997  Michael Meissner  <[e-mail]>

	* cpu.h (d30v_next_insn): New flag for things we are supposed to
	trace between instruction words.
	({call,return}_occurred): Remove index argument.
	(d30v_{read,write}_mem): Add declarations.

	* cpu.c (d30v_next_insn): New flag for things we are supposed to
	trace between instruction words.
	({call,return}_occurred): Remove index argument.
	(d30v_{read,write}_mem): New functions for reading/writing
	simulated memory in the new common system call support.

	* d30v-insns: Set emacs C mode.
	(call/return insns): Set bit to trace call at instruction
	boundary, rather than doing it here.
	(do_trap): Set up to use new common system call interface.

	* engine.c (sim_engine_run): If d30v_next_insn is non zero, do
	function call/return tracing.

Mon Nov 24 16:40:49 1997  Michael Meissner  <[e-mail]>