engine.c

这个是LINUX下的GDB调度工具的源码

/* OBSOLETE /*  This file is part of the program psim. */
/* OBSOLETE  */
/* OBSOLETE     Copyright (C) 1994-1997, Andrew Cagney <[e-mail]> */
/* OBSOLETE     Copyright (C) 1996, 1997, Free Software Foundation */
/* OBSOLETE  */
/* OBSOLETE     This program is free software; you can redistribute it and/or modify */
/* OBSOLETE     it under the terms of the GNU General Public License as published by */
/* OBSOLETE     the Free Software Foundation; either version 2 of the License, or */
/* OBSOLETE     (at your option) any later version. */
/* OBSOLETE  */
/* OBSOLETE     This program is distributed in the hope that it will be useful, */
/* OBSOLETE     but WITHOUT ANY WARRANTY; without even the implied warranty of */
/* OBSOLETE     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the */
/* OBSOLETE     GNU General Public License for more details. */
/* OBSOLETE   */
/* OBSOLETE     You should have received a copy of the GNU General Public License */
/* OBSOLETE     along with this program; if not, write to the Free Software */
/* OBSOLETE     Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
/* OBSOLETE   */
/* OBSOLETE     */ */
/* OBSOLETE  */
/* OBSOLETE  */
/* OBSOLETE #ifndef ENGINE_C */
/* OBSOLETE #define ENGINE_C */
/* OBSOLETE  */
/* OBSOLETE #include "sim-main.h" */
/* OBSOLETE  */
/* OBSOLETE #include <stdio.h> */
/* OBSOLETE #include <ctype.h> */
/* OBSOLETE  */
/* OBSOLETE #ifdef HAVE_STDLIB_H */
/* OBSOLETE #include <stdlib.h> */
/* OBSOLETE #endif */
/* OBSOLETE  */
/* OBSOLETE #ifdef HAVE_STRING_H */
/* OBSOLETE #include <string.h> */
/* OBSOLETE #else */
/* OBSOLETE #ifdef HAVE_STRINGS_H */
/* OBSOLETE #include <strings.h> */
/* OBSOLETE #endif */
/* OBSOLETE #endif */
/* OBSOLETE  */
/* OBSOLETE static void */
/* OBSOLETE do_stack_swap (SIM_DESC sd) */
/* OBSOLETE { */
/* OBSOLETE   sim_cpu *cpu = STATE_CPU (sd, 0); */
/* OBSOLETE   unsigned new_sp = (PSW_VAL(PSW_SM) != 0); */
/* OBSOLETE   if (cpu->regs.current_sp != new_sp) */
/* OBSOLETE     { */
/* OBSOLETE       cpu->regs.sp[cpu->regs.current_sp] = SP; */
/* OBSOLETE       cpu->regs.current_sp = new_sp; */
/* OBSOLETE       SP = cpu->regs.sp[cpu->regs.current_sp]; */
/* OBSOLETE     } */
/* OBSOLETE } */
/* OBSOLETE  */
/* OBSOLETE #if WITH_TRACE */
/* OBSOLETE /* Implement ALU tracing of 32-bit registers.  */ */
/* OBSOLETE static void */
/* OBSOLETE trace_alu32 (SIM_DESC sd, */
/* OBSOLETE 	     sim_cpu *cpu, */
/* OBSOLETE 	     address_word cia, */
/* OBSOLETE 	     unsigned32 *ptr) */
/* OBSOLETE { */
/* OBSOLETE   unsigned32 value = *ptr; */
/* OBSOLETE  */
/* OBSOLETE   if (ptr >= &GPR[0] && ptr <= &GPR[NR_GENERAL_PURPOSE_REGISTERS]) */
/* OBSOLETE     trace_one_insn (sd, cpu, cia, 1, "engine.c", __LINE__, "alu", */
/* OBSOLETE 		    "Set register r%-2d = 0x%.8lx (%ld)", */
/* OBSOLETE 		    ptr - &GPR[0], (long)value, (long)value); */
/* OBSOLETE  */
/* OBSOLETE   else if (ptr == &PSW || ptr == &bPSW || ptr == &DPSW) */
/* OBSOLETE     trace_one_insn (sd, cpu, cia, 1, "engine.c", __LINE__, "alu", */
/* OBSOLETE 		    "Set register %s = 0x%.8lx%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s", */
/* OBSOLETE 		    (ptr == &PSW) ? "psw" : ((ptr == &bPSW) ? "bpsw" : "dpsw"), */
/* OBSOLETE 		    (long)value, */
/* OBSOLETE 		    (value & (0x80000000 >> PSW_SM)) ? ", sm" : "", */
/* OBSOLETE 		    (value & (0x80000000 >> PSW_EA)) ? ", ea" : "", */
/* OBSOLETE 		    (value & (0x80000000 >> PSW_DB)) ? ", db" : "", */
/* OBSOLETE 		    (value & (0x80000000 >> PSW_DS)) ? ", ds" : "", */
/* OBSOLETE 		    (value & (0x80000000 >> PSW_IE)) ? ", ie" : "", */
/* OBSOLETE 		    (value & (0x80000000 >> PSW_RP)) ? ", rp" : "", */
/* OBSOLETE 		    (value & (0x80000000 >> PSW_MD)) ? ", md" : "", */
/* OBSOLETE 		    (value & (0x80000000 >> PSW_F0)) ? ", f0" : "", */
/* OBSOLETE 		    (value & (0x80000000 >> PSW_F1)) ? ", f1" : "", */
/* OBSOLETE 		    (value & (0x80000000 >> PSW_F2)) ? ", f2" : "", */
/* OBSOLETE 		    (value & (0x80000000 >> PSW_F3)) ? ", f3" : "", */
/* OBSOLETE 		    (value & (0x80000000 >> PSW_S))  ? ", s"  : "", */
/* OBSOLETE 		    (value & (0x80000000 >> PSW_V))  ? ", v"  : "", */
/* OBSOLETE 		    (value & (0x80000000 >> PSW_VA)) ? ", va" : "", */
/* OBSOLETE 		    (value & (0x80000000 >> PSW_C))  ? ", c"  : ""); */
/* OBSOLETE  */
/* OBSOLETE   else if (ptr >= &CREG[0] && ptr <= &CREG[NR_CONTROL_REGISTERS]) */
/* OBSOLETE     trace_one_insn (sd, cpu, cia, 1, "engine.c", __LINE__, "alu", */
/* OBSOLETE 		    "Set register cr%d = 0x%.8lx (%ld)", */
/* OBSOLETE 		    ptr - &CREG[0], (long)value, (long)value); */
/* OBSOLETE } */
/* OBSOLETE  */
/* OBSOLETE /* Implement ALU tracing of 32-bit registers.  */ */
/* OBSOLETE static void */
/* OBSOLETE trace_alu64 (SIM_DESC sd, */
/* OBSOLETE 	     sim_cpu *cpu, */
/* OBSOLETE 	     address_word cia, */
/* OBSOLETE 	     unsigned64 *ptr) */
/* OBSOLETE { */
/* OBSOLETE   unsigned64 value = *ptr; */
/* OBSOLETE  */
/* OBSOLETE   if (ptr >= &ACC[0] && ptr <= &ACC[NR_ACCUMULATORS]) */
/* OBSOLETE     trace_one_insn (sd, cpu, cia, 1, "engine.c", __LINE__, "alu", */
/* OBSOLETE 		    "Set register a%-2d = 0x%.8lx 0x%.8lx", */
/* OBSOLETE 		    ptr - &ACC[0], */
/* OBSOLETE 		    (unsigned long)(unsigned32)(value >> 32), */
/* OBSOLETE 		    (unsigned long)(unsigned32)value); */
/* OBSOLETE  */
/* OBSOLETE } */
/* OBSOLETE #endif */
/* OBSOLETE  */
/* OBSOLETE /* Process all of the queued up writes in order now */ */
/* OBSOLETE void */
/* OBSOLETE unqueue_writes (SIM_DESC sd, */
/* OBSOLETE 		sim_cpu *cpu, */
/* OBSOLETE 		address_word cia) */
/* OBSOLETE { */
/* OBSOLETE   int i, num; */
/* OBSOLETE   int did_psw = 0; */
/* OBSOLETE   unsigned32 *psw_addr = &PSW; */
/* OBSOLETE  */
/* OBSOLETE   num = WRITE32_NUM; */
/* OBSOLETE   for (i = 0; i < num; i++) */
/* OBSOLETE     { */
/* OBSOLETE       unsigned32 mask = WRITE32_MASK (i); */
/* OBSOLETE       unsigned32 *ptr = WRITE32_PTR (i); */
/* OBSOLETE       unsigned32 value = (*ptr & ~mask) | (WRITE32_VALUE (i) & mask); */
/* OBSOLETE       int j; */
/* OBSOLETE  */
/* OBSOLETE       if (ptr == psw_addr) */
/* OBSOLETE        { */
/* OBSOLETE 	 /* If MU instruction was not a MVTSYS, resolve PSW */
/* OBSOLETE              contention in favour of IU. */ */
/* OBSOLETE 	  if(! STATE_CPU (sd, 0)->mvtsys_left_p) */
/* OBSOLETE 	    { */
/* OBSOLETE 	      /* Detect contention in parallel writes to the same PSW flags. */
/* OBSOLETE 		 The hardware allows the updates from IU to prevail over */
/* OBSOLETE 		 those from MU. */ */
/* OBSOLETE 	       */
/* OBSOLETE 	      unsigned32 flag_bits = */
/* OBSOLETE 		BIT32 (PSW_F0) | BIT32 (PSW_F1) | */
/* OBSOLETE 		BIT32 (PSW_F2) | BIT32 (PSW_F3) | */
/* OBSOLETE 		BIT32 (PSW_S) | BIT32 (PSW_V) | */
/* OBSOLETE 		BIT32 (PSW_VA) | BIT32 (PSW_C); */
/* OBSOLETE 	      unsigned32 my_flag_bits = mask & flag_bits; */
/* OBSOLETE 	       */
/* OBSOLETE 	      for (j = i + 1; j < num; j++) */
/* OBSOLETE 		if (WRITE32_PTR (j) == psw_addr && /* write to PSW */ */
/* OBSOLETE 		    WRITE32_MASK (j) & my_flag_bits)  /* some of the same flags */ */
/* OBSOLETE 		  { */
/* OBSOLETE 		    /* Recompute local mask & value, to suppress this */
/* OBSOLETE 		       earlier write to the same flag bits. */ */
/* OBSOLETE 		     */
/* OBSOLETE 		    unsigned32 new_mask = mask & ~(WRITE32_MASK (j) & my_flag_bits); */
/* OBSOLETE 		     */
/* OBSOLETE 		    /* There is a special case for the VA (accumulated */
/* OBSOLETE 		       overflow) flag, in that it is only included in the */
/* OBSOLETE 		       second instruction's mask if the overflow */
/* OBSOLETE 		       occurred.  Yet the hardware still suppresses the */
/* OBSOLETE 		       first instruction's update to VA.  So we kludge */
/* OBSOLETE 		       this by inferring PSW_V -> PSW_VA for the second */
/* OBSOLETE 		       instruction. */ */
/* OBSOLETE 		     */
/* OBSOLETE 		    if (WRITE32_MASK (j) & BIT32 (PSW_V)) */
/* OBSOLETE 		      { */
/* OBSOLETE 			new_mask &= ~BIT32 (PSW_VA); */
/* OBSOLETE 		      } */
/* OBSOLETE 		     */
/* OBSOLETE 		    value = (*ptr & ~new_mask) | (WRITE32_VALUE (i) & new_mask); */
/* OBSOLETE 		  } */
/* OBSOLETE 	    } */
/* OBSOLETE 	   */
/* OBSOLETE          did_psw = 1; */
/* OBSOLETE        } */
/* OBSOLETE  */
/* OBSOLETE       *ptr = value; */
/* OBSOLETE  */
/* OBSOLETE #if WITH_TRACE */
/* OBSOLETE       if (TRACE_ALU_P (cpu)) */
/* OBSOLETE 	trace_alu32 (sd, cpu, cia, ptr); */
/* OBSOLETE #endif */
/* OBSOLETE     } */
/* OBSOLETE  */
/* OBSOLETE   num = WRITE64_NUM; */
/* OBSOLETE   for (i = 0; i < num; i++) */
/* OBSOLETE     { */
/* OBSOLETE       unsigned64 *ptr = WRITE64_PTR (i); */
/* OBSOLETE       *ptr = WRITE64_VALUE (i); */
/* OBSOLETE  */
/* OBSOLETE #if WITH_TRACE */
/* OBSOLETE       if (TRACE_ALU_P (cpu)) */
/* OBSOLETE 	trace_alu64 (sd, cpu, cia, ptr); */
/* OBSOLETE #endif */
/* OBSOLETE     } */
/* OBSOLETE  */
/* OBSOLETE   WRITE32_NUM = 0; */
/* OBSOLETE   WRITE64_NUM = 0; */
/* OBSOLETE  */
/* OBSOLETE   if (DID_TRAP == 1) /* ordinary trap */ */
/* OBSOLETE     { */
/* OBSOLETE       bPSW = PSW; */
/* OBSOLETE       PSW &= (BIT32 (PSW_DB) | BIT32 (PSW_SM)); */
/* OBSOLETE       did_psw = 1; */
/* OBSOLETE     } */
/* OBSOLETE   else if (DID_TRAP == 2) /* debug trap */ */
/* OBSOLETE     { */
/* OBSOLETE       DPSW = PSW; */
/* OBSOLETE       PSW &= BIT32 (PSW_DS); */
/* OBSOLETE       PSW |= BIT32 (PSW_DS); */
/* OBSOLETE       did_psw = 1; */
/* OBSOLETE     } */
/* OBSOLETE   DID_TRAP = 0; */
/* OBSOLETE  */
/* OBSOLETE   if (did_psw) */
/* OBSOLETE     do_stack_swap (sd); */
/* OBSOLETE } */
/* OBSOLETE  */
/* OBSOLETE  */
/* OBSOLETE /* SIMULATE INSTRUCTIONS, various different ways of achieving the same */
/* OBSOLETE    thing */ */
/* OBSOLETE  */
/* OBSOLETE static address_word */
/* OBSOLETE do_long (SIM_DESC sd, */
/* OBSOLETE 	 l_instruction_word instruction, */
/* OBSOLETE 	 address_word cia) */
/* OBSOLETE { */
/* OBSOLETE   address_word nia = l_idecode_issue(sd, */
/* OBSOLETE 				     instruction, */
/* OBSOLETE 				     cia); */
/* OBSOLETE  */
/* OBSOLETE   unqueue_writes (sd, STATE_CPU (sd, 0), cia); */
/* OBSOLETE   return nia; */
/* OBSOLETE } */
/* OBSOLETE  */
/* OBSOLETE static address_word */
/* OBSOLETE do_2_short (SIM_DESC sd, */
/* OBSOLETE 	    s_instruction_word insn1, */
/* OBSOLETE 	    s_instruction_word insn2, */
/* OBSOLETE 	    cpu_units unit, */
/* OBSOLETE 	    address_word cia) */
/* OBSOLETE { */
/* OBSOLETE   address_word nia; */
/* OBSOLETE  */
/* OBSOLETE   /* run the first instruction */ */