sem.c

这个是LINUX下的GDB调度工具的源码

#undef FLD
}

/* addcc: addcc$pack $GRi,$GRj,$GRk,$ICCi_1 */

static SEM_PC
SEM_FN_NAME (frvbf,addcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
#define FLD(f) abuf->fields.sfmt_addcc.f
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
  int UNUSED written = 0;
  IADDR UNUSED pc = abuf->addr;
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);

{
  BI tmp_tmp;
  QI tmp_cc;
  SI tmp_result;
  tmp_cc = CPU (h_iccr[FLD (f_ICCi_1)]);
  tmp_tmp = ADDOFSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj)), 0);
if (EQBI (tmp_tmp, 0)) {
  tmp_cc = ANDQI (tmp_cc, 13);
} else {
  tmp_cc = ORQI (tmp_cc, 2);
}
  tmp_tmp = ADDCFSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj)), 0);
if (EQBI (tmp_tmp, 0)) {
  tmp_cc = ANDQI (tmp_cc, 14);
} else {
  tmp_cc = ORQI (tmp_cc, 1);
}
  tmp_result = ADDSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj)));
if (EQSI (tmp_result, 0)) {
  tmp_cc = ORQI (ANDQI (tmp_cc, 7), 4);
} else {
if (LTSI (tmp_result, 0)) {
  tmp_cc = ORQI (ANDQI (tmp_cc, 11), 8);
} else {
  tmp_cc = ANDQI (tmp_cc, 3);
}
}
  {
    SI opval = tmp_result;
    sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval);
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
  }
  {
    UQI opval = tmp_cc;
    sim_queue_qi_write (current_cpu, & CPU (h_iccr[FLD (f_ICCi_1)]), opval);
    TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval);
  }
}

  return vpc;
#undef FLD
}

/* subcc: subcc$pack $GRi,$GRj,$GRk,$ICCi_1 */

static SEM_PC
SEM_FN_NAME (frvbf,subcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
#define FLD(f) abuf->fields.sfmt_addcc.f
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
  int UNUSED written = 0;
  IADDR UNUSED pc = abuf->addr;
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);

{
  BI tmp_tmp;
  QI tmp_cc;
  SI tmp_result;
  tmp_cc = CPU (h_iccr[FLD (f_ICCi_1)]);
  tmp_tmp = SUBOFSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj)), 0);
if (EQBI (tmp_tmp, 0)) {
  tmp_cc = ANDQI (tmp_cc, 13);
} else {
  tmp_cc = ORQI (tmp_cc, 2);
}
  tmp_tmp = SUBCFSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj)), 0);
if (EQBI (tmp_tmp, 0)) {
  tmp_cc = ANDQI (tmp_cc, 14);
} else {
  tmp_cc = ORQI (tmp_cc, 1);
}
  tmp_result = SUBSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj)));
if (EQSI (tmp_result, 0)) {
  tmp_cc = ORQI (ANDQI (tmp_cc, 7), 4);
} else {
if (LTSI (tmp_result, 0)) {
  tmp_cc = ORQI (ANDQI (tmp_cc, 11), 8);
} else {
  tmp_cc = ANDQI (tmp_cc, 3);
}
}
  {
    SI opval = tmp_result;
    sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval);
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
  }
  {
    UQI opval = tmp_cc;
    sim_queue_qi_write (current_cpu, & CPU (h_iccr[FLD (f_ICCi_1)]), opval);
    TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval);
  }
}

  return vpc;
#undef FLD
}

/* andcc: andcc$pack $GRi,$GRj,$GRk,$ICCi_1 */

static SEM_PC
SEM_FN_NAME (frvbf,andcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
#define FLD(f) abuf->fields.sfmt_addcc.f
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
  int UNUSED written = 0;
  IADDR UNUSED pc = abuf->addr;
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);

{
  SI tmp_tmp;
  tmp_tmp = ANDSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj)));
  {
    SI opval = tmp_tmp;
    sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval);
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
  }
if (EQSI (tmp_tmp, 0)) {
  {
    UQI opval = ORQI (ANDQI (CPU (h_iccr[FLD (f_ICCi_1)]), 7), 4);
    sim_queue_qi_write (current_cpu, & CPU (h_iccr[FLD (f_ICCi_1)]), opval);
    written |= (1 << 4);
    TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval);
  }
} else {
if (LTSI (tmp_tmp, 0)) {
  {
    UQI opval = ORQI (ANDQI (CPU (h_iccr[FLD (f_ICCi_1)]), 11), 8);
    sim_queue_qi_write (current_cpu, & CPU (h_iccr[FLD (f_ICCi_1)]), opval);
    written |= (1 << 4);
    TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval);
  }
} else {
  {
    UQI opval = ANDQI (CPU (h_iccr[FLD (f_ICCi_1)]), 3);
    sim_queue_qi_write (current_cpu, & CPU (h_iccr[FLD (f_ICCi_1)]), opval);
    written |= (1 << 4);
    TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval);
  }
}
}
}

  abuf->written = written;
  return vpc;
#undef FLD
}

/* orcc: orcc$pack $GRi,$GRj,$GRk,$ICCi_1 */

static SEM_PC
SEM_FN_NAME (frvbf,orcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
#define FLD(f) abuf->fields.sfmt_addcc.f
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
  int UNUSED written = 0;
  IADDR UNUSED pc = abuf->addr;
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);

{
  SI tmp_tmp;
  tmp_tmp = ORSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj)));
  {
    SI opval = tmp_tmp;
    sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval);
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
  }
if (EQSI (tmp_tmp, 0)) {
  {
    UQI opval = ORQI (ANDQI (CPU (h_iccr[FLD (f_ICCi_1)]), 7), 4);
    sim_queue_qi_write (current_cpu, & CPU (h_iccr[FLD (f_ICCi_1)]), opval);
    written |= (1 << 4);
    TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval);
  }
} else {
if (LTSI (tmp_tmp, 0)) {
  {
    UQI opval = ORQI (ANDQI (CPU (h_iccr[FLD (f_ICCi_1)]), 11), 8);
    sim_queue_qi_write (current_cpu, & CPU (h_iccr[FLD (f_ICCi_1)]), opval);
    written |= (1 << 4);
    TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval);
  }
} else {
  {
    UQI opval = ANDQI (CPU (h_iccr[FLD (f_ICCi_1)]), 3);
    sim_queue_qi_write (current_cpu, & CPU (h_iccr[FLD (f_ICCi_1)]), opval);
    written |= (1 << 4);
    TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval);
  }
}
}
}

  abuf->written = written;
  return vpc;
#undef FLD
}

/* xorcc: xorcc$pack $GRi,$GRj,$GRk,$ICCi_1 */

static SEM_PC
SEM_FN_NAME (frvbf,xorcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
#define FLD(f) abuf->fields.sfmt_addcc.f
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
  int UNUSED written = 0;
  IADDR UNUSED pc = abuf->addr;
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);

{
  SI tmp_tmp;
  tmp_tmp = XORSI (GET_H_GR (FLD (f_GRi)), GET_H_GR (FLD (f_GRj)));
  {
    SI opval = tmp_tmp;
    sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval);
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
  }
if (EQSI (tmp_tmp, 0)) {
  {
    UQI opval = ORQI (ANDQI (CPU (h_iccr[FLD (f_ICCi_1)]), 7), 4);
    sim_queue_qi_write (current_cpu, & CPU (h_iccr[FLD (f_ICCi_1)]), opval);
    written |= (1 << 4);
    TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval);
  }
} else {
if (LTSI (tmp_tmp, 0)) {
  {
    UQI opval = ORQI (ANDQI (CPU (h_iccr[FLD (f_ICCi_1)]), 11), 8);
    sim_queue_qi_write (current_cpu, & CPU (h_iccr[FLD (f_ICCi_1)]), opval);
    written |= (1 << 4);
    TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval);
  }
} else {
  {
    UQI opval = ANDQI (CPU (h_iccr[FLD (f_ICCi_1)]), 3);
    sim_queue_qi_write (current_cpu, & CPU (h_iccr[FLD (f_ICCi_1)]), opval);
    written |= (1 << 4);
    TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval);
  }
}
}
}

  abuf->written = written;
  return vpc;
#undef FLD
}

/* sllcc: sllcc$pack $GRi,$GRj,$GRk,$ICCi_1 */

static SEM_PC
SEM_FN_NAME (frvbf,sllcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
#define FLD(f) abuf->fields.sfmt_addcc.f
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
  int UNUSED written = 0;
  IADDR UNUSED pc = abuf->addr;
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);

{
  SI tmp_shift;
  SI tmp_tmp;
  QI tmp_cc;
  tmp_shift = ANDSI (GET_H_GR (FLD (f_GRj)), 31);
  tmp_cc = frvbf_set_icc_for_shift_left (current_cpu, GET_H_GR (FLD (f_GRi)), tmp_shift, CPU (h_iccr[FLD (f_ICCi_1)]));
  tmp_tmp = SLLSI (GET_H_GR (FLD (f_GRi)), tmp_shift);
  {
    SI opval = tmp_tmp;
    sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval);
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
  }
if (EQSI (tmp_tmp, 0)) {
  tmp_cc = ORQI (ANDQI (tmp_cc, 7), 4);
} else {
if (LTSI (tmp_tmp, 0)) {
  tmp_cc = ORQI (ANDQI (tmp_cc, 11), 8);
} else {
  tmp_cc = ANDQI (tmp_cc, 3);
}
}
  {
    UQI opval = tmp_cc;
    sim_queue_qi_write (current_cpu, & CPU (h_iccr[FLD (f_ICCi_1)]), opval);
    TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval);
  }
}

  return vpc;
#undef FLD
}

/* srlcc: srlcc$pack $GRi,$GRj,$GRk,$ICCi_1 */

static SEM_PC
SEM_FN_NAME (frvbf,srlcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
#define FLD(f) abuf->fields.sfmt_addcc.f
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
  int UNUSED written = 0;
  IADDR UNUSED pc = abuf->addr;
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);

{
  SI tmp_shift;
  SI tmp_tmp;
  QI tmp_cc;
  tmp_shift = ANDSI (GET_H_GR (FLD (f_GRj)), 31);
  tmp_cc = frvbf_set_icc_for_shift_right (current_cpu, GET_H_GR (FLD (f_GRi)), tmp_shift, CPU (h_iccr[FLD (f_ICCi_1)]));
  tmp_tmp = SRLSI (GET_H_GR (FLD (f_GRi)), tmp_shift);
  {
    SI opval = tmp_tmp;
    sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval);
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
  }
if (EQSI (tmp_tmp, 0)) {
  tmp_cc = ORQI (ANDQI (tmp_cc, 7), 4);
} else {
if (LTSI (tmp_tmp, 0)) {
  tmp_cc = ORQI (ANDQI (tmp_cc, 11), 8);
} else {
  tmp_cc = ANDQI (tmp_cc, 3);
}
}
  {
    UQI opval = tmp_cc;
    sim_queue_qi_write (current_cpu, & CPU (h_iccr[FLD (f_ICCi_1)]), opval);
    TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval);
  }
}

  return vpc;
#undef FLD
}

/* sracc: sracc$pack $GRi,$GRj,$GRk,$ICCi_1 */

static SEM_PC
SEM_FN_NAME (frvbf,sracc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
#define FLD(f) abuf->fields.sfmt_addcc.f
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
  int UNUSED written = 0;
  IADDR UNUSED pc = abuf->addr;
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);

{
  SI tmp_shift;
  SI tmp_tmp;
  QI tmp_cc;
  tmp_shift = ANDSI (GET_H_GR (FLD (f_GRj)), 31);
  tmp_cc = frvbf_set_icc_for_shift_right (current_cpu, GET_H_GR (FLD (f_GRi)), tmp_shift, CPU (h_iccr[FLD (f_ICCi_1)]));
  tmp_tmp = SRASI (GET_H_GR (FLD (f_GRi)), tmp_shift);
  {
    SI opval = tmp_tmp;
    sim_queue_fn_si_write (current_cpu, frvbf_h_gr_set, FLD (f_GRk), opval);
    TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
  }
if (EQSI (tmp_tmp, 0)) {
  tmp_cc = ORQI (ANDQI (tmp_cc, 7), 4);
} else {
if (LTSI (tmp_tmp, 0)) {
  tmp_cc = ORQI (ANDQI (tmp_cc, 11), 8);
} else {
  tmp_cc = ANDQI (tmp_cc, 3);
}
}
  {
    UQI opval = tmp_cc;
    sim_queue_qi_write (current_cpu, & CPU (h_iccr[FLD (f_ICCi_1)]), opval);
    TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval);
  }
}

  return vpc;
#undef FLD
}

/* smulcc: smulcc$pack $GRi,$GRj,$GRdoublek,$ICCi_1 */

static SEM_PC
SEM_FN_NAME (frvbf,smulcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
#define FLD(f) abuf->fields.sfmt_smulcc.f
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
  int UNUSED written = 0;
  IADDR UNUSED pc = abuf->addr;
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);

{
  DI tmp_tmp;
  QI tmp_cc;
  tmp_cc = CPU (h_iccr[FLD (f_ICCi_1)]);
  tmp_tmp = MULDI (EXTSIDI (GET_H_GR (FLD (f_GRi))), EXTSIDI (GET_H_GR (FLD (f_GRj))));
if (EQDI (SRLDI (tmp_tmp, 63), 0)) {
  tmp_cc = ANDQI (tmp_cc, 7);
} else {
  tmp_cc = ORQI (tmp_cc, 8);
}
if (EQBI (EQDI (tmp_tmp, 0), 0)) {
  tmp_cc = ANDQI (tmp_cc, 11);
} else {
  tmp_cc = ORQI (tmp_cc, 4);
}
  {
    DI opval = tmp_tmp;
    sim_queue_fn_di_write (current_cpu, frvbf_h_gr_double_set, FLD (f_GRk), opval);
    TRACE_RESULT (current_cpu, abuf, "gr_double", 'D', opval);
  }
  {
    UQI opval = tmp_cc;
    sim_queue_qi_write (current_cpu, & CPU (h_iccr[FLD (f_ICCi_1)]), opval);
    TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval);
  }
}

  return vpc;
#undef FLD
}

/* umulcc: umulcc$pack $GRi,$GRj,$GRdoublek,$ICCi_1 */

static SEM_PC
SEM_FN_NAME (frvbf,umulcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
#define FLD(f) abuf->fields.sfmt_smulcc.f
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
  int UNUSED written = 0;
  IADDR UNUSED pc = abuf->addr;
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);

{
  DI tmp_tmp;
  QI tmp_cc;
  tmp_cc = CPU (h_iccr[FLD (f_ICCi_1)]);
  tmp_tmp = MULDI (ZEXTSIDI (GET_H_GR (FLD (f_GRi))), ZEXTSIDI (GET_H_GR (FLD (f_GRj))));
if (EQDI (SRLDI (tmp_tmp, 63), 0)) {
  tmp_cc = ANDQI (tmp_cc, 7);
} else {
  tmp_cc = ORQI (tmp_cc, 8);
}
if (EQBI (EQDI (tmp_tmp, 0), 0)) {
  tmp_cc = ANDQI (tmp_cc, 11);
} else {
  tmp_cc = ORQI (tmp_cc, 4);
}
  {
    DI opval = tmp_tmp;
    sim_queue_fn_di_write (current_cpu, frvbf_h_gr_double_set, FLD (f_GRk), opval);
    TRACE_RESULT (current_cpu, abuf, "gr_double", 'D', opval);
  }
  {
    UQI opval = tmp_cc;
    sim_queue_qi_write (current_cpu, & CPU (h_iccr[FLD (f_ICCi_1)]), opval);
    TRACE_RESULT (current_cpu, abuf, "iccr", 'x', opval);
  }
}

  return vpc;
#undef FLD
}

/* caddcc: caddcc$pack $GRi,$GRj,$GRk,$CCi,$cond */

static SEM_PC
SEM_FN_NAME (frvbf,caddcc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
{
#define FLD(f) abuf->fields.sfmt_caddcc.f
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
  int UNUSED written = 0;
  IADDR UNUSED pc = abuf->addr;
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);