📄 changelog
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(frv_insn_fetch_buffer): New global variable.2000-06-12 Dave Brolley <brolley@redhat.com> * mloop.in (fetch_buffer): New static struct. (@cpu@_simulate_insn_prefetch): Rewritten. * cache.c (frv_cache_request_invalidate): Don't invalidate return buffer. (address_interference): Defer to any WAR request in either pipeline.2000-06-09 Dave Brolley <brolley@redhat.com> * pipeline.c (insns_in_slot): New Array. (frv_pipeline_add_insn): Call COUNT_INSNS_IN_SLOT. * options.c (frv_options): Remove 'NONBLOCK' argument from data-cache option. (parse_cache_option): New function. (frv_option_handler): Call parse_cache_option. * frv.c (vliw_branch_taken): New variable. (vliw_load_stall): New variable. (handle_resource_wait): Update vliw_load_stall. (frvbf_model_insn_before): Initialize vliw_branch_taken and vliw_load_stall. (frvbf_model_insn_after): Increment PROFILE_MODEL_LOAD_STALL_CYCLES. (load_wait_for_FR): Update vliw_load_stall. (load_wait_for_GR): Update vliw_load_stall. (load_wait_for_FRdouble): Update vliw_load_stall. (load_wait_for_GRdouble): Update vliw_load_stall. (frvbf_model_fr500_u_branch): Count branches taken and not taken. (slot_names): New static array. (print_parallel): Now takes second argument 'verbose'. Print cycles per VLIW insn and instructions per cycle. Also tabulate the number of insns in each type of VLIW slot. (frv_profile_info): Call print_parallel with new second argument. * frv-sim.h (insn_in_slot): New array. (COUNT_INSNS_IN_SLOT): New macro. (INSNS_IN_SLOT): New macro. * cache.c: Remove references to non_blocking_count. Remove references to last_was_hit. Remove references to req_none. (handle_req_store): Adjust statistics before requeuing the store request. (handle_req_WAR): Don't let the WAR request affect the cache statistics. * cache.h: Remove references to non_blocking_count. Remove references to last_was_hit. Remove references to req_none. * model.c: Regenerate.2000-06-08 Dave Brolley <brolley@redhat.com> * frv.c (request_complete): Copy load data from the correct return buffer.2000-06-07 Dave Brolley <brolley@redhat.com> * traps.c (frv_core_signal): Call frv_term before exiting. (frv_itrap): Call frv_term before exiting. (next_available_nesr): Make sure NECR is implemented before reading it. (next_valid_nesr): Ditto. (frvbf_check_non_excepting_load): Ditto. (frvbf_clear_ne_flags): Ditto. (frvbf_commit): Ditto. (frvbf_check_recovering_store): Delay cache operation if 'model_insn'. * sim-main.h (_sim_cpu): Add load_address, load_length, load_flag and store_flag members. (CPU_LOAD_ADDRESS): New macro. (CPU_LOAD_LENGTH): New macro. (CPU_LOAD_SIGNED): New macro. (CPU_LOAD_LOCK): New macro. * reset.c (frv_term): New function. (frv_power_on_reset): Use SETMEMSI if the cache is not enabled. (frv_hardware_reset): Use SETMEMSI if the cache is not enabled. (frv_software_reset): Use SETMEMSI if the cache is not enabled. * mloop.in (execute): Call FRV_COUNT_CYCLES to decide whether to model the insn. Model the insn in two passes. One before and one after execution. (cache_reqno): new static variable. (@cpu@_simulate_insn_prefetch): Model fetch latency by waiting for the cache rather than assuming a fixed latency. (xinit): Turn on PROFILE_MODEL_P before each vliw insn if the timer is enabled so that modeling data is collected by cgen during execution. (full-exec): Restore PROFILE_MODEL_P after each vliw insn. * memory.c (data_non_cache_access): Removed. (insn_non_cache_access): Removed. (frvbf_read_mem_QI): Delay read operation if 'model_insn'. (frvbf_read_mem_UQI): Delay read operation if 'model_insn'. (frvbf_read_mem_HI): Delay read operation if 'model_insn'. (frvbf_read_mem_UHI): Delay read operation if 'model_insn'. (frvbf_read_mem_SI): Delay read operation if 'model_insn'. (frvbf_read_mem_DI): Delay read operation if 'model_insn'. (frvbf_read_mem_DF): Delay read operation if 'model_insn'. (frvbf_read_imem_USI): Read the cache or ememory passively. (frvbf_write_mem_QI): Don't check for non-cache access here. (frvbf_write_mem_UQI): Call frvbf_write_mem_QI. (frvbf_write_mem_HI): Don't check for non-cache access here. (frvbf_write_mem_UHI): Call frvbf_write_mem_QI. (frvbf_write_mem_SI): Don't check for non-cache access here. (frvbf_write_mem_DI): Don't check for non-cache access here. (frvbf_write_mem_DF): Don't check for non-cache access here. (frvbf_mem_set_QI): Use cycle-accurate cache write if 'model_insn'. (frvbf_mem_set_HI): Use cycle-accurate cache write if 'model_insn'. (frvbf_mem_set_SI): Use cycle-accurate cache write if 'model_insn'. (frvbf_mem_set_DI): Use cycle-accurate cache write if 'model_insn'. (frvbf_mem_set_DF): Use cycle-accurate cache write if 'model_insn'. (frvbf_mem_set_XI): Use cycle-accurate cache write if 'model_insn'. * interrupts.c (check_reset): Read the cache and memory passively. (frv_program_or_software_interrupt): Call frv_term before calling sim_engine_halt. * frv.c (all modeling functions): Break into two passes. One before execuetion and one after. call load_wait_for_* for all GR and FR registers. (frvbf_load_quad_GR): Delay performing the load if 'model_insn'. (frvbf_load_quad_FRint): Delay performing the load if 'model_insn'. (frvbf_load_quad_CPR): Delay performing the load if 'model_insn'. (frvbf_insn_cache_preload): Delay cache operation if 'model_insn'. (frvbf_data_cache_preload): Delay cache operation if 'model_insn'. (frvbf_insn_cache_unlock): Delay cache operation if 'model_insn'. (frvbf_data_cache_unlock): Delay cache operation if 'model_insn'. (frvbf_insn_cache_invalidate): Delay cache operation if 'model_insn'. (frvbf_data_cache_invalidate): Delay cache operation if 'model_insn'. (frvbf_data_cache_flush): Delay cache operation if 'model_insn'. (model_insn): New global variable. (fr_ptime): New array. (cache_request): New enumeration. (CACHE_QUEUE_ELEMENT): New struct type. (CACHE_QUEUE_SIZE): New macro. (cache_queue): New static struct. (request_cache_load): New function. (request_cache_flush): New function. (request_cache_invalidate): New function. (request_cache_preload): New function. (request_cache_unlock): New function. (submit_cache_request): New function. (activate_cache_requests): New function. (load_pending_for_register): New function. (flush_pending_for_address): New function. (remove_cache_queue_element): New function. (copy_load_data): New function. (request_complete): New function. (run_caches): New function. (frv_model_trace_wait_cycles): New function. (wait_for_flush): New function. (frvbf_model_insn_before): Insn prefect wait now modeled in frvbf_simulate_insn_prefetch. Incremement vliw_insns here. Call wait_for_flush. (frvbf_model_insn_after): Call activate_cache_requests. Don't increment vliw_insns here anymore. (update_FR_latency_for_load): New function. (update_FRdouble_latency_for_load): New function. (update_FR_ptime): New function. (update_FRdouble_ptime): New function. (update_GR_latency_for_swap): New function. (load_wait_for_GR): New function. (load_wait_for_FR): New function. (load_wait_for_GRdouble): New function. (load_wait_for_FRdouble): New function. (frvbf_model_fr500_u_ici): New function. (frvbf_model_fr500_u_dci): New function. (frvbf_model_fr500_u_dcf): New function. (frvbf_model_fr500_u_icpl): New function. (frvbf_model_fr500_u_dcpl): New function. (frvbf_model_fr500_u_icul): New function. (frvbf_model_fr500_u_dcul): New function. * frv-sim.h (frv_term): New function. (insn_non_cache_access): Removed. (FRV_COUNT_CYCLES): New macro. (frv_save_peofile_model_p): New global variable. (model_insn): New enumerated global variable. (frv_model_advance_cycles): New function. (frv_model_trace_wait_cycles): New function. * cache.h (FRV_CACHE_REQUEST_KIND): New enumeration. (FRV_CACHE_WAR_REQUEST): New struct type. (FRV_CACHE_STORE_REQUEST): New struct type. (FRV_CACHE_INVALIDATE_REQUEST): New struct type. (FRV_CACHE_PRELOAD_REQUEST): New struct type. (FRV_CACHE_REQUEST): New struct type. (FRV_CACHE_RETURN_BUFFER): New struct type. (FRV_CACHE_FLUSH_STATUS): New struct type. (FRV_CACHE_STATUS): New struct type. (FRV_CACHE_STAGE): New struct type. (FRV_CACHE_STAGES): New enumeration. (FRV_CACHE_WAR): New struct type. (FRV_CACHE_PIPELINE): New struct type. (FRV_CACHE_ARS): New struct type. (FRV_CACHE_STATISTICS): New struct type. (FRV_CACHE): Add pipeline, statistics, BARS and NARS. (CACHE_RETURN_DATA): 'return_buffer' is now within 'status'. (CACHE_RETURN_DATA_ADDRESS): New macro. (frv_cache_read): Now takes pipe index as second argument. (frv_cache_enabled): New function. (frv_cache_request_load): New function. (frv_cache_request_store): New function. (frv_cache_request_invalidate): New function. (frv_cache_request_preload): New function. (frv_cache_request_unlock): New function. (frv_cache_run): New function. (frv_cache_read_passive_SI): New function. (frv_cache_data_in_buffer): New function. (frv_cache_data_flushed): New function. * cache.c (frv_cache_init): Initialize pipelines and xARS registers. (frv_cache_enabled): New function. (non_cache_access): New function. (write_data_to_memory): Count write accesses for each mode. Write to memory using sim_core_write_unaligned_1; (read_data_from_memory): New function. (fill_line_from_memory): Use read_data_from_memory. (copy_line_to_return_buffer): New function. (copy_memory_to_return_buffer): New function. (set_return_buffer_reqno): New function. (frv_cache_read): Now takes pipe index as second argument. Check for non-cache access. (frv_cache_preload): Check for non-cache access. (frv_cache_unlock): Check for non-cache access. (invalidate_return_buffer): New function. (frv_cache_invalidate): Check for non-cache access. (convert_slot_to_index): New function. (FREE_CHAIN_SIZE): New macro. (frv_cache_request_free_chain): New static variable. (frv_store_request_free_chain): New static variable. (allocate_new_cache_requests): New function. (new_cache_request): New function. (free_cache_request): New function. (new_store_request): New function. (pipeline_remove_request): New function. (pipeline_add_request): New function. (pipeline_requeue_request): New function. (next_priority): New function. (add_WAR_request): New function. (pipeline_next_request): New function. (pipeline_stage_request): New function. (advance_pipelines): New function. (frv_cache_request_load): New function. (frv_cache_request_store): New function. (frv_cache_request_invalidate): New function. (frv_cache_request_preload): New function. (frv_cache_request_unlock): New function. (address_interference): New function. (wait_for_WAR): New function. (wait_in_WAR): New function. (handle_req_load): New function. (handle_req_preload): New function. (handle_req_store): New function. (handle_req_invalidate): New function. (handle_req_unlock): New function. (handle_req_WAR): New function. (arbitrate_requests): New function. (move_ARS_to_WAR): New function. (decrease_latencies): New function. (frv_cache_run): New function. (frv_cache_read_passive_SI): New function. (frv_cache_data_in_buffer): New function. (frv_cache_data_flushed): New function. * arch.h,decode.c,decode.h,model.c,sem.c: Rebuild.Wed May 24 14:40:34 2000 Andrew Cagney <cagney@b1.cygnus.com> * configure: Regenerated to track ../common/aclocal.m4 changes.2000-05-19 Dave Brolley <brolley@redhat.com> * traps.c (frv_rett): Check for exceptions in the order specified in the architecture spec. Allow privileged_instruction interrrupt to be handled normally. * registers.c (frv_register_control_init): Handle bfd_mach_frvtomcat. * frv.c (frvbf_signed_integer_divide): Use updated dtt to decide whether to clear the NE flag. (frvbf_model_tomcat_u_exec): New function. * frv-sim.h (frvbf_division_exception): Now returns updated dtt. * Makefile.in (stamp-cpu): Add 'tomcat' to 'mach' value. * arch.c,arch.h,cpu.h,cpuall.h,model.h,decode.c,sem.c: Regenerate.2000-05-18 Dave Brolley <brolley@redhat.com> * sim-if.c (elf-bfd.h): #include it. (sim_open): Set machine amd architecture based on elf flags.2000-04-04 Dave Brolley <brolley@redhat.com> * frv-sim.h (frv_h_psr_esr_set_handler): Removed. Delete '#if 0' blocks. * frv.c: Delete '#if 0' blocks. (spr_psr_set_handler): Remove special handling for circular referencing of handlers for PSR.S and PSR.ESR. (frv_h_psr_esr_set_handler): Removed. * interrupts.c: Delete '#if 0' blocks. * memory.c: Delete '#if 0' blocks. * cpu.c,cpu.h: Regenerate.2000-04-03 Dave Brolley <brolley@redhat.com> * traps.c (frvbf_check_recovering_store): Invalidate data cache line containing the target address. (clear_nesr_neear): No longer takes hi_available and lo_available. Remove bogus check for available GR registers. (frvbf_clear_ne_flags): Update call to clear_nesr_neear. (frvbf_commit): Update call to clear_nesr_neear. * interrupts.c (next_available_esr): Removed. (next_available_edr): Removed. (next_available_fq): Removed. * frv.c (frvbf_fetch_register): Remove "FIXME" comment. (frvbf_store_register): Remove "FIXME" comment. * frv-sim.h (UART_INCHAR_ADDR): Removed. (UART_OUTCHAR_ADDR): Removed. (UART_STATUS_ADDR): Removed. (UART_INPUT_READY): Removed. (UART_OUTPUT_READY): Removed. (FRV_DEVICE_ADDR): Removed. (FRV_DEVICE_LEN): Removed. (SET_NESR): Call frvbf_force_update. (SET_NEEAR): Call frvbf_force_update. (SET_NE_FLAGS): Call frvbf_force_update.2000-03-30 Dave Brolley <brolley@redhat.com> * configure: Regenerated.2000-03-30 Dave Brolley <brolley@redhat.com> * registers.c (fr500_spr): Define ESR14-15 and EPCSR14-15 for fr500. * memory.c (frvbf_write_mem_*): Save slot containing the insn
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